Sparc64 build fix (Igor Kovalenko).
[qemu/mini2440.git] / vl.h
blobd3c56d4ce83db313b78124834bb01756ceea6fdf
1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #ifndef VL_H
25 #define VL_H
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <limits.h>
34 #include <time.h>
35 #include <ctype.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <fcntl.h>
39 #include <sys/stat.h>
41 #ifndef O_LARGEFILE
42 #define O_LARGEFILE 0
43 #endif
44 #ifndef O_BINARY
45 #define O_BINARY 0
46 #endif
48 #ifdef _WIN32
49 #include <windows.h>
50 #define fsync _commit
51 #define lseek _lseeki64
52 #define ENOTSUP 4096
53 #define ENOMEDIUM 4097
54 extern int qemu_ftruncate64(int, int64_t);
55 #define ftruncate qemu_ftruncate64
58 static inline char *realpath(const char *path, char *resolved_path)
60 _fullpath(resolved_path, path, _MAX_PATH);
61 return resolved_path;
64 #define PRId64 "I64d"
65 #define PRIx64 "I64x"
66 #define PRIu64 "I64u"
67 #define PRIo64 "I64o"
68 #endif
70 #ifdef QEMU_TOOL
72 /* we use QEMU_TOOL in the command line tools which do not depend on
73 the target CPU type */
74 #include "config-host.h"
75 #include <setjmp.h>
76 #include "osdep.h"
77 #include "bswap.h"
79 #else
81 #include "audio/audio.h"
82 #include "cpu.h"
83 #include "gdbstub.h"
85 #endif /* !defined(QEMU_TOOL) */
87 #ifndef glue
88 #define xglue(x, y) x ## y
89 #define glue(x, y) xglue(x, y)
90 #define stringify(s) tostring(s)
91 #define tostring(s) #s
92 #endif
94 #ifndef MIN
95 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
96 #endif
97 #ifndef MAX
98 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
99 #endif
101 /* vl.c */
102 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
104 void hw_error(const char *fmt, ...);
106 extern const char *bios_dir;
108 void pstrcpy(char *buf, int buf_size, const char *str);
109 char *pstrcat(char *buf, int buf_size, const char *s);
110 int strstart(const char *str, const char *val, const char **ptr);
112 extern int vm_running;
114 typedef struct vm_change_state_entry VMChangeStateEntry;
115 typedef void VMChangeStateHandler(void *opaque, int running);
116 typedef void VMStopHandler(void *opaque, int reason);
118 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
119 void *opaque);
120 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
122 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
123 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
125 void vm_start(void);
126 void vm_stop(int reason);
128 typedef void QEMUResetHandler(void *opaque);
130 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
131 void qemu_system_reset_request(void);
132 void qemu_system_shutdown_request(void);
133 void qemu_system_powerdown_request(void);
134 #if !defined(TARGET_SPARC)
135 // Please implement a power failure function to signal the OS
136 #define qemu_system_powerdown() do{}while(0)
137 #else
138 void qemu_system_powerdown(void);
139 #endif
141 void main_loop_wait(int timeout);
143 extern int ram_size;
144 extern int bios_size;
145 extern int rtc_utc;
146 extern int cirrus_vga_enabled;
147 extern int graphic_width;
148 extern int graphic_height;
149 extern int graphic_depth;
150 extern const char *keyboard_layout;
151 extern int kqemu_allowed;
152 extern int win2k_install_hack;
153 extern int usb_enabled;
154 extern int smp_cpus;
155 extern int no_quit;
157 /* XXX: make it dynamic */
158 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
159 #define BIOS_SIZE ((512 + 32) * 1024)
160 #elif defined(TARGET_MIPS)
161 #define BIOS_SIZE (128 * 1024)
162 #else
163 #define BIOS_SIZE ((256 + 64) * 1024)
164 #endif
166 /* keyboard/mouse support */
168 #define MOUSE_EVENT_LBUTTON 0x01
169 #define MOUSE_EVENT_RBUTTON 0x02
170 #define MOUSE_EVENT_MBUTTON 0x04
172 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
173 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
175 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
176 void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
178 void kbd_put_keycode(int keycode);
179 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
180 int kbd_mouse_is_absolute(void);
182 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
183 constants) */
184 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
185 #define QEMU_KEY_BACKSPACE 0x007f
186 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
187 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
188 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
189 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
190 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
191 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
192 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
193 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
194 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
196 #define QEMU_KEY_CTRL_UP 0xe400
197 #define QEMU_KEY_CTRL_DOWN 0xe401
198 #define QEMU_KEY_CTRL_LEFT 0xe402
199 #define QEMU_KEY_CTRL_RIGHT 0xe403
200 #define QEMU_KEY_CTRL_HOME 0xe404
201 #define QEMU_KEY_CTRL_END 0xe405
202 #define QEMU_KEY_CTRL_PAGEUP 0xe406
203 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
205 void kbd_put_keysym(int keysym);
207 /* async I/O support */
209 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
210 typedef int IOCanRWHandler(void *opaque);
211 typedef void IOHandler(void *opaque);
213 int qemu_set_fd_handler2(int fd,
214 IOCanRWHandler *fd_read_poll,
215 IOHandler *fd_read,
216 IOHandler *fd_write,
217 void *opaque);
218 int qemu_set_fd_handler(int fd,
219 IOHandler *fd_read,
220 IOHandler *fd_write,
221 void *opaque);
223 /* Polling handling */
225 /* return TRUE if no sleep should be done afterwards */
226 typedef int PollingFunc(void *opaque);
228 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
229 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
231 #ifdef _WIN32
232 /* Wait objects handling */
233 typedef void WaitObjectFunc(void *opaque);
235 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
236 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
237 #endif
239 /* character device */
241 #define CHR_EVENT_BREAK 0 /* serial break char */
242 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
246 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
247 typedef struct {
248 int speed;
249 int parity;
250 int data_bits;
251 int stop_bits;
252 } QEMUSerialSetParams;
254 #define CHR_IOCTL_SERIAL_SET_BREAK 2
256 #define CHR_IOCTL_PP_READ_DATA 3
257 #define CHR_IOCTL_PP_WRITE_DATA 4
258 #define CHR_IOCTL_PP_READ_CONTROL 5
259 #define CHR_IOCTL_PP_WRITE_CONTROL 6
260 #define CHR_IOCTL_PP_READ_STATUS 7
262 typedef void IOEventHandler(void *opaque, int event);
264 typedef struct CharDriverState {
265 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
266 void (*chr_add_read_handler)(struct CharDriverState *s,
267 IOCanRWHandler *fd_can_read,
268 IOReadHandler *fd_read, void *opaque);
269 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
270 IOEventHandler *chr_event;
271 void (*chr_send_event)(struct CharDriverState *chr, int event);
272 void (*chr_close)(struct CharDriverState *chr);
273 void *opaque;
274 } CharDriverState;
276 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
277 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
278 void qemu_chr_send_event(CharDriverState *s, int event);
279 void qemu_chr_add_read_handler(CharDriverState *s,
280 IOCanRWHandler *fd_can_read,
281 IOReadHandler *fd_read, void *opaque);
282 void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
283 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
285 /* consoles */
287 typedef struct DisplayState DisplayState;
288 typedef struct TextConsole TextConsole;
290 typedef void (*vga_hw_update_ptr)(void *);
291 typedef void (*vga_hw_invalidate_ptr)(void *);
292 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
294 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
295 vga_hw_invalidate_ptr invalidate,
296 vga_hw_screen_dump_ptr screen_dump,
297 void *opaque);
298 void vga_hw_update(void);
299 void vga_hw_invalidate(void);
300 void vga_hw_screen_dump(const char *filename);
302 int is_graphic_console(void);
303 CharDriverState *text_console_init(DisplayState *ds);
304 void console_select(unsigned int index);
306 /* serial ports */
308 #define MAX_SERIAL_PORTS 4
310 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
312 /* parallel ports */
314 #define MAX_PARALLEL_PORTS 3
316 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
318 /* VLANs support */
320 typedef struct VLANClientState VLANClientState;
322 struct VLANClientState {
323 IOReadHandler *fd_read;
324 /* Packets may still be sent if this returns zero. It's used to
325 rate-limit the slirp code. */
326 IOCanRWHandler *fd_can_read;
327 void *opaque;
328 struct VLANClientState *next;
329 struct VLANState *vlan;
330 char info_str[256];
333 typedef struct VLANState {
334 int id;
335 VLANClientState *first_client;
336 struct VLANState *next;
337 } VLANState;
339 VLANState *qemu_find_vlan(int id);
340 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
341 IOReadHandler *fd_read,
342 IOCanRWHandler *fd_can_read,
343 void *opaque);
344 int qemu_can_send_packet(VLANClientState *vc);
345 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
346 void qemu_handler_true(void *opaque);
348 void do_info_network(void);
350 /* TAP win32 */
351 int tap_win32_init(VLANState *vlan, const char *ifname);
353 /* NIC info */
355 #define MAX_NICS 8
357 typedef struct NICInfo {
358 uint8_t macaddr[6];
359 const char *model;
360 VLANState *vlan;
361 } NICInfo;
363 extern int nb_nics;
364 extern NICInfo nd_table[MAX_NICS];
366 /* timers */
368 typedef struct QEMUClock QEMUClock;
369 typedef struct QEMUTimer QEMUTimer;
370 typedef void QEMUTimerCB(void *opaque);
372 /* The real time clock should be used only for stuff which does not
373 change the virtual machine state, as it is run even if the virtual
374 machine is stopped. The real time clock has a frequency of 1000
375 Hz. */
376 extern QEMUClock *rt_clock;
378 /* The virtual clock is only run during the emulation. It is stopped
379 when the virtual machine is stopped. Virtual timers use a high
380 precision clock, usually cpu cycles (use ticks_per_sec). */
381 extern QEMUClock *vm_clock;
383 int64_t qemu_get_clock(QEMUClock *clock);
385 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
386 void qemu_free_timer(QEMUTimer *ts);
387 void qemu_del_timer(QEMUTimer *ts);
388 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
389 int qemu_timer_pending(QEMUTimer *ts);
391 extern int64_t ticks_per_sec;
392 extern int pit_min_timer_count;
394 int64_t cpu_get_ticks(void);
395 void cpu_enable_ticks(void);
396 void cpu_disable_ticks(void);
398 /* VM Load/Save */
400 typedef struct QEMUFile QEMUFile;
402 QEMUFile *qemu_fopen(const char *filename, const char *mode);
403 void qemu_fflush(QEMUFile *f);
404 void qemu_fclose(QEMUFile *f);
405 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
406 void qemu_put_byte(QEMUFile *f, int v);
407 void qemu_put_be16(QEMUFile *f, unsigned int v);
408 void qemu_put_be32(QEMUFile *f, unsigned int v);
409 void qemu_put_be64(QEMUFile *f, uint64_t v);
410 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
411 int qemu_get_byte(QEMUFile *f);
412 unsigned int qemu_get_be16(QEMUFile *f);
413 unsigned int qemu_get_be32(QEMUFile *f);
414 uint64_t qemu_get_be64(QEMUFile *f);
416 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
418 qemu_put_be64(f, *pv);
421 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
423 qemu_put_be32(f, *pv);
426 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
428 qemu_put_be16(f, *pv);
431 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
433 qemu_put_byte(f, *pv);
436 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
438 *pv = qemu_get_be64(f);
441 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
443 *pv = qemu_get_be32(f);
446 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
448 *pv = qemu_get_be16(f);
451 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
453 *pv = qemu_get_byte(f);
456 #if TARGET_LONG_BITS == 64
457 #define qemu_put_betl qemu_put_be64
458 #define qemu_get_betl qemu_get_be64
459 #define qemu_put_betls qemu_put_be64s
460 #define qemu_get_betls qemu_get_be64s
461 #else
462 #define qemu_put_betl qemu_put_be32
463 #define qemu_get_betl qemu_get_be32
464 #define qemu_put_betls qemu_put_be32s
465 #define qemu_get_betls qemu_get_be32s
466 #endif
468 int64_t qemu_ftell(QEMUFile *f);
469 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
471 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
472 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
474 int register_savevm(const char *idstr,
475 int instance_id,
476 int version_id,
477 SaveStateHandler *save_state,
478 LoadStateHandler *load_state,
479 void *opaque);
480 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
481 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
483 void cpu_save(QEMUFile *f, void *opaque);
484 int cpu_load(QEMUFile *f, void *opaque, int version_id);
486 void do_savevm(const char *name);
487 void do_loadvm(const char *name);
488 void do_delvm(const char *name);
489 void do_info_snapshots(void);
491 /* bottom halves */
492 typedef struct QEMUBH QEMUBH;
493 typedef void QEMUBHFunc(void *opaque);
495 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
496 void qemu_bh_schedule(QEMUBH *bh);
497 void qemu_bh_cancel(QEMUBH *bh);
498 void qemu_bh_delete(QEMUBH *bh);
499 int qemu_bh_poll(void);
501 /* block.c */
502 typedef struct BlockDriverState BlockDriverState;
503 typedef struct BlockDriver BlockDriver;
505 extern BlockDriver bdrv_raw;
506 extern BlockDriver bdrv_host_device;
507 extern BlockDriver bdrv_cow;
508 extern BlockDriver bdrv_qcow;
509 extern BlockDriver bdrv_vmdk;
510 extern BlockDriver bdrv_cloop;
511 extern BlockDriver bdrv_dmg;
512 extern BlockDriver bdrv_bochs;
513 extern BlockDriver bdrv_vpc;
514 extern BlockDriver bdrv_vvfat;
515 extern BlockDriver bdrv_qcow2;
517 typedef struct BlockDriverInfo {
518 /* in bytes, 0 if irrelevant */
519 int cluster_size;
520 /* offset at which the VM state can be saved (0 if not possible) */
521 int64_t vm_state_offset;
522 } BlockDriverInfo;
524 typedef struct QEMUSnapshotInfo {
525 char id_str[128]; /* unique snapshot id */
526 /* the following fields are informative. They are not needed for
527 the consistency of the snapshot */
528 char name[256]; /* user choosen name */
529 uint32_t vm_state_size; /* VM state info size */
530 uint32_t date_sec; /* UTC date of the snapshot */
531 uint32_t date_nsec;
532 uint64_t vm_clock_nsec; /* VM clock relative to boot */
533 } QEMUSnapshotInfo;
535 #define BDRV_O_RDONLY 0x0000
536 #define BDRV_O_RDWR 0x0002
537 #define BDRV_O_ACCESS 0x0003
538 #define BDRV_O_CREAT 0x0004 /* create an empty file */
539 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
540 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
541 use a disk image format on top of
542 it (default for
543 bdrv_file_open()) */
545 void bdrv_init(void);
546 BlockDriver *bdrv_find_format(const char *format_name);
547 int bdrv_create(BlockDriver *drv,
548 const char *filename, int64_t size_in_sectors,
549 const char *backing_file, int flags);
550 BlockDriverState *bdrv_new(const char *device_name);
551 void bdrv_delete(BlockDriverState *bs);
552 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
553 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
554 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
555 BlockDriver *drv);
556 void bdrv_close(BlockDriverState *bs);
557 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
558 uint8_t *buf, int nb_sectors);
559 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
560 const uint8_t *buf, int nb_sectors);
561 int bdrv_pread(BlockDriverState *bs, int64_t offset,
562 void *buf, int count);
563 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
564 const void *buf, int count);
565 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
566 int64_t bdrv_getlength(BlockDriverState *bs);
567 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
568 int bdrv_commit(BlockDriverState *bs);
569 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
570 /* async block I/O */
571 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
572 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
574 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
575 uint8_t *buf, int nb_sectors,
576 BlockDriverCompletionFunc *cb, void *opaque);
577 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
578 const uint8_t *buf, int nb_sectors,
579 BlockDriverCompletionFunc *cb, void *opaque);
580 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
582 void qemu_aio_init(void);
583 void qemu_aio_poll(void);
584 void qemu_aio_flush(void);
585 void qemu_aio_wait_start(void);
586 void qemu_aio_wait(void);
587 void qemu_aio_wait_end(void);
589 /* Ensure contents are flushed to disk. */
590 void bdrv_flush(BlockDriverState *bs);
592 #define BDRV_TYPE_HD 0
593 #define BDRV_TYPE_CDROM 1
594 #define BDRV_TYPE_FLOPPY 2
595 #define BIOS_ATA_TRANSLATION_AUTO 0
596 #define BIOS_ATA_TRANSLATION_NONE 1
597 #define BIOS_ATA_TRANSLATION_LBA 2
599 void bdrv_set_geometry_hint(BlockDriverState *bs,
600 int cyls, int heads, int secs);
601 void bdrv_set_type_hint(BlockDriverState *bs, int type);
602 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
603 void bdrv_get_geometry_hint(BlockDriverState *bs,
604 int *pcyls, int *pheads, int *psecs);
605 int bdrv_get_type_hint(BlockDriverState *bs);
606 int bdrv_get_translation_hint(BlockDriverState *bs);
607 int bdrv_is_removable(BlockDriverState *bs);
608 int bdrv_is_read_only(BlockDriverState *bs);
609 int bdrv_is_inserted(BlockDriverState *bs);
610 int bdrv_media_changed(BlockDriverState *bs);
611 int bdrv_is_locked(BlockDriverState *bs);
612 void bdrv_set_locked(BlockDriverState *bs, int locked);
613 void bdrv_eject(BlockDriverState *bs, int eject_flag);
614 void bdrv_set_change_cb(BlockDriverState *bs,
615 void (*change_cb)(void *opaque), void *opaque);
616 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
617 void bdrv_info(void);
618 BlockDriverState *bdrv_find(const char *name);
619 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
620 int bdrv_is_encrypted(BlockDriverState *bs);
621 int bdrv_set_key(BlockDriverState *bs, const char *key);
622 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
623 void *opaque);
624 const char *bdrv_get_device_name(BlockDriverState *bs);
625 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
626 const uint8_t *buf, int nb_sectors);
627 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
629 void bdrv_get_backing_filename(BlockDriverState *bs,
630 char *filename, int filename_size);
631 int bdrv_snapshot_create(BlockDriverState *bs,
632 QEMUSnapshotInfo *sn_info);
633 int bdrv_snapshot_goto(BlockDriverState *bs,
634 const char *snapshot_id);
635 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
636 int bdrv_snapshot_list(BlockDriverState *bs,
637 QEMUSnapshotInfo **psn_info);
638 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
640 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
641 int path_is_absolute(const char *path);
642 void path_combine(char *dest, int dest_size,
643 const char *base_path,
644 const char *filename);
646 #ifndef QEMU_TOOL
648 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
649 int boot_device,
650 DisplayState *ds, const char **fd_filename, int snapshot,
651 const char *kernel_filename, const char *kernel_cmdline,
652 const char *initrd_filename);
654 typedef struct QEMUMachine {
655 const char *name;
656 const char *desc;
657 QEMUMachineInitFunc *init;
658 struct QEMUMachine *next;
659 } QEMUMachine;
661 int qemu_register_machine(QEMUMachine *m);
663 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
664 typedef void IRQRequestFunc(void *opaque, int level);
666 /* ISA bus */
668 extern target_phys_addr_t isa_mem_base;
670 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
671 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
673 int register_ioport_read(int start, int length, int size,
674 IOPortReadFunc *func, void *opaque);
675 int register_ioport_write(int start, int length, int size,
676 IOPortWriteFunc *func, void *opaque);
677 void isa_unassign_ioport(int start, int length);
679 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
681 /* PCI bus */
683 extern target_phys_addr_t pci_mem_base;
685 typedef struct PCIBus PCIBus;
686 typedef struct PCIDevice PCIDevice;
688 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
689 uint32_t address, uint32_t data, int len);
690 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
691 uint32_t address, int len);
692 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
693 uint32_t addr, uint32_t size, int type);
695 #define PCI_ADDRESS_SPACE_MEM 0x00
696 #define PCI_ADDRESS_SPACE_IO 0x01
697 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
699 typedef struct PCIIORegion {
700 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
701 uint32_t size;
702 uint8_t type;
703 PCIMapIORegionFunc *map_func;
704 } PCIIORegion;
706 #define PCI_ROM_SLOT 6
707 #define PCI_NUM_REGIONS 7
709 #define PCI_DEVICES_MAX 64
711 #define PCI_VENDOR_ID 0x00 /* 16 bits */
712 #define PCI_DEVICE_ID 0x02 /* 16 bits */
713 #define PCI_COMMAND 0x04 /* 16 bits */
714 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
715 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
716 #define PCI_CLASS_DEVICE 0x0a /* Device class */
717 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
718 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
719 #define PCI_MIN_GNT 0x3e /* 8 bits */
720 #define PCI_MAX_LAT 0x3f /* 8 bits */
722 struct PCIDevice {
723 /* PCI config space */
724 uint8_t config[256];
726 /* the following fields are read only */
727 PCIBus *bus;
728 int devfn;
729 char name[64];
730 PCIIORegion io_regions[PCI_NUM_REGIONS];
732 /* do not access the following fields */
733 PCIConfigReadFunc *config_read;
734 PCIConfigWriteFunc *config_write;
735 /* ??? This is a PC-specific hack, and should be removed. */
736 int irq_index;
738 /* Current IRQ levels. Used internally by the generic PCI code. */
739 int irq_state[4];
742 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
743 int instance_size, int devfn,
744 PCIConfigReadFunc *config_read,
745 PCIConfigWriteFunc *config_write);
747 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
748 uint32_t size, int type,
749 PCIMapIORegionFunc *map_func);
751 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
753 uint32_t pci_default_read_config(PCIDevice *d,
754 uint32_t address, int len);
755 void pci_default_write_config(PCIDevice *d,
756 uint32_t address, uint32_t val, int len);
757 void pci_device_save(PCIDevice *s, QEMUFile *f);
758 int pci_device_load(PCIDevice *s, QEMUFile *f);
760 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
761 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
762 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
763 void *pic, int devfn_min, int nirq);
765 void pci_nic_init(PCIBus *bus, NICInfo *nd);
766 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
767 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
768 int pci_bus_num(PCIBus *s);
769 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
771 void pci_info(void);
772 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
773 pci_map_irq_fn map_irq, const char *name);
775 /* prep_pci.c */
776 PCIBus *pci_prep_init(void);
778 /* grackle_pci.c */
779 PCIBus *pci_grackle_init(uint32_t base, void *pic);
781 /* unin_pci.c */
782 PCIBus *pci_pmac_init(void *pic);
784 /* apb_pci.c */
785 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
786 void *pic);
788 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
790 /* piix_pci.c */
791 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
792 void i440fx_set_smm(PCIDevice *d, int val);
793 int piix3_init(PCIBus *bus);
794 void i440fx_init_memory_mappings(PCIDevice *d);
796 /* openpic.c */
797 typedef struct openpic_t openpic_t;
798 void openpic_set_irq(void *opaque, int n_IRQ, int level);
799 openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
800 CPUState **envp);
802 /* heathrow_pic.c */
803 typedef struct HeathrowPICS HeathrowPICS;
804 void heathrow_pic_set_irq(void *opaque, int num, int level);
805 HeathrowPICS *heathrow_pic_init(int *pmem_index);
807 #ifdef HAS_AUDIO
808 struct soundhw {
809 const char *name;
810 const char *descr;
811 int enabled;
812 int isa;
813 union {
814 int (*init_isa) (AudioState *s);
815 int (*init_pci) (PCIBus *bus, AudioState *s);
816 } init;
819 extern struct soundhw soundhw[];
820 #endif
822 /* vga.c */
824 #define VGA_RAM_SIZE (8192 * 1024)
826 struct DisplayState {
827 uint8_t *data;
828 int linesize;
829 int depth;
830 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
831 int width;
832 int height;
833 void *opaque;
835 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
836 void (*dpy_resize)(struct DisplayState *s, int w, int h);
837 void (*dpy_refresh)(struct DisplayState *s);
838 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
841 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
843 s->dpy_update(s, x, y, w, h);
846 static inline void dpy_resize(DisplayState *s, int w, int h)
848 s->dpy_resize(s, w, h);
851 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
852 unsigned long vga_ram_offset, int vga_ram_size);
853 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
854 unsigned long vga_ram_offset, int vga_ram_size,
855 unsigned long vga_bios_offset, int vga_bios_size);
857 /* cirrus_vga.c */
858 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
859 unsigned long vga_ram_offset, int vga_ram_size);
860 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
861 unsigned long vga_ram_offset, int vga_ram_size);
863 /* sdl.c */
864 void sdl_display_init(DisplayState *ds, int full_screen);
866 /* cocoa.m */
867 void cocoa_display_init(DisplayState *ds, int full_screen);
869 /* vnc.c */
870 void vnc_display_init(DisplayState *ds, const char *display);
872 /* ide.c */
873 #define MAX_DISKS 4
875 extern BlockDriverState *bs_table[MAX_DISKS + 1];
877 void isa_ide_init(int iobase, int iobase2, int irq,
878 BlockDriverState *hd0, BlockDriverState *hd1);
879 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
880 int secondary_ide_enabled);
881 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
882 int pmac_ide_init (BlockDriverState **hd_table,
883 SetIRQFunc *set_irq, void *irq_opaque, int irq);
885 /* cdrom.c */
886 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
887 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
889 /* es1370.c */
890 int es1370_init (PCIBus *bus, AudioState *s);
892 /* sb16.c */
893 int SB16_init (AudioState *s);
895 /* adlib.c */
896 int Adlib_init (AudioState *s);
898 /* gus.c */
899 int GUS_init (AudioState *s);
901 /* dma.c */
902 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
903 int DMA_get_channel_mode (int nchan);
904 int DMA_read_memory (int nchan, void *buf, int pos, int size);
905 int DMA_write_memory (int nchan, void *buf, int pos, int size);
906 void DMA_hold_DREQ (int nchan);
907 void DMA_release_DREQ (int nchan);
908 void DMA_schedule(int nchan);
909 void DMA_run (void);
910 void DMA_init (int high_page_enable);
911 void DMA_register_channel (int nchan,
912 DMA_transfer_handler transfer_handler,
913 void *opaque);
914 /* fdc.c */
915 #define MAX_FD 2
916 extern BlockDriverState *fd_table[MAX_FD];
918 typedef struct fdctrl_t fdctrl_t;
920 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
921 uint32_t io_base,
922 BlockDriverState **fds);
923 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
925 /* ne2000.c */
927 void isa_ne2000_init(int base, int irq, NICInfo *nd);
928 void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
930 /* rtl8139.c */
932 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
934 /* pcnet.c */
936 void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
937 void pcnet_h_reset(void *opaque);
938 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
941 /* pckbd.c */
943 void kbd_init(void);
945 /* mc146818rtc.c */
947 typedef struct RTCState RTCState;
949 RTCState *rtc_init(int base, int irq);
950 void rtc_set_memory(RTCState *s, int addr, int val);
951 void rtc_set_date(RTCState *s, const struct tm *tm);
953 /* serial.c */
955 typedef struct SerialState SerialState;
956 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
957 int base, int irq, CharDriverState *chr);
958 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
959 target_ulong base, int it_shift,
960 int irq, CharDriverState *chr);
962 /* parallel.c */
964 typedef struct ParallelState ParallelState;
965 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
967 /* i8259.c */
969 typedef struct PicState2 PicState2;
970 extern PicState2 *isa_pic;
971 void pic_set_irq(int irq, int level);
972 void pic_set_irq_new(void *opaque, int irq, int level);
973 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
974 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
975 void *alt_irq_opaque);
976 int pic_read_irq(PicState2 *s);
977 void pic_update_irq(PicState2 *s);
978 uint32_t pic_intack_read(PicState2 *s);
979 void pic_info(void);
980 void irq_info(void);
982 /* APIC */
983 typedef struct IOAPICState IOAPICState;
985 int apic_init(CPUState *env);
986 int apic_get_interrupt(CPUState *env);
987 IOAPICState *ioapic_init(void);
988 void ioapic_set_irq(void *opaque, int vector, int level);
990 /* i8254.c */
992 #define PIT_FREQ 1193182
994 typedef struct PITState PITState;
996 PITState *pit_init(int base, int irq);
997 void pit_set_gate(PITState *pit, int channel, int val);
998 int pit_get_gate(PITState *pit, int channel);
999 int pit_get_initial_count(PITState *pit, int channel);
1000 int pit_get_mode(PITState *pit, int channel);
1001 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1003 /* pcspk.c */
1004 void pcspk_init(PITState *);
1005 int pcspk_audio_init(AudioState *);
1007 /* acpi.c */
1008 extern int acpi_enabled;
1009 void piix4_pm_init(PCIBus *bus, int devfn);
1010 void acpi_bios_init(void);
1012 /* pc.c */
1013 extern QEMUMachine pc_machine;
1014 extern QEMUMachine isapc_machine;
1015 extern int fd_bootchk;
1017 void ioport_set_a20(int enable);
1018 int ioport_get_a20(void);
1020 /* ppc.c */
1021 extern QEMUMachine prep_machine;
1022 extern QEMUMachine core99_machine;
1023 extern QEMUMachine heathrow_machine;
1025 /* mips_r4k.c */
1026 extern QEMUMachine mips_machine;
1028 /* mips_timer.c */
1029 extern void cpu_mips_clock_init(CPUState *);
1030 extern void cpu_mips_irqctrl_init (void);
1032 /* shix.c */
1033 extern QEMUMachine shix_machine;
1035 #ifdef TARGET_PPC
1036 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1037 #endif
1038 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1040 extern CPUWriteMemoryFunc *PPC_io_write[];
1041 extern CPUReadMemoryFunc *PPC_io_read[];
1042 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1044 /* sun4m.c */
1045 extern QEMUMachine sun4m_machine;
1046 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1048 /* iommu.c */
1049 void *iommu_init(uint32_t addr);
1050 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1051 uint8_t *buf, int len, int is_write);
1052 static inline void sparc_iommu_memory_read(void *opaque,
1053 target_phys_addr_t addr,
1054 uint8_t *buf, int len)
1056 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1059 static inline void sparc_iommu_memory_write(void *opaque,
1060 target_phys_addr_t addr,
1061 uint8_t *buf, int len)
1063 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1066 /* tcx.c */
1067 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1068 unsigned long vram_offset, int vram_size, int width, int height);
1070 /* slavio_intctl.c */
1071 void *slavio_intctl_init();
1072 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1073 void slavio_pic_info(void *opaque);
1074 void slavio_irq_info(void *opaque);
1075 void slavio_pic_set_irq(void *opaque, int irq, int level);
1076 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1078 /* loader.c */
1079 int get_image_size(const char *filename);
1080 int load_image(const char *filename, uint8_t *addr);
1081 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1082 int load_aout(const char *filename, uint8_t *addr);
1084 /* slavio_timer.c */
1085 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1087 /* slavio_serial.c */
1088 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1089 void slavio_serial_ms_kbd_init(int base, int irq);
1091 /* slavio_misc.c */
1092 void *slavio_misc_init(uint32_t base, int irq);
1093 void slavio_set_power_fail(void *opaque, int power_failing);
1095 /* esp.c */
1096 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1097 void esp_reset(void *opaque);
1099 /* sparc32_dma.c */
1100 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1101 void *intctl);
1102 void ledma_set_irq(void *opaque, int isr);
1103 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1104 uint8_t *buf, int len, int do_bswap);
1105 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1106 uint8_t *buf, int len, int do_bswap);
1107 void espdma_raise_irq(void *opaque);
1108 void espdma_clear_irq(void *opaque);
1109 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1110 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1111 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1112 void *lance_opaque);
1114 /* cs4231.c */
1115 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1117 /* sun4u.c */
1118 extern QEMUMachine sun4u_machine;
1120 /* NVRAM helpers */
1121 #include "hw/m48t59.h"
1123 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1124 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1125 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1126 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1127 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1128 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1129 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1130 const unsigned char *str, uint32_t max);
1131 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1132 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1133 uint32_t start, uint32_t count);
1134 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1135 const unsigned char *arch,
1136 uint32_t RAM_size, int boot_device,
1137 uint32_t kernel_image, uint32_t kernel_size,
1138 const char *cmdline,
1139 uint32_t initrd_image, uint32_t initrd_size,
1140 uint32_t NVRAM_image,
1141 int width, int height, int depth);
1143 /* adb.c */
1145 #define MAX_ADB_DEVICES 16
1147 #define ADB_MAX_OUT_LEN 16
1149 typedef struct ADBDevice ADBDevice;
1151 /* buf = NULL means polling */
1152 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1153 const uint8_t *buf, int len);
1154 typedef int ADBDeviceReset(ADBDevice *d);
1156 struct ADBDevice {
1157 struct ADBBusState *bus;
1158 int devaddr;
1159 int handler;
1160 ADBDeviceRequest *devreq;
1161 ADBDeviceReset *devreset;
1162 void *opaque;
1165 typedef struct ADBBusState {
1166 ADBDevice devices[MAX_ADB_DEVICES];
1167 int nb_devices;
1168 int poll_index;
1169 } ADBBusState;
1171 int adb_request(ADBBusState *s, uint8_t *buf_out,
1172 const uint8_t *buf, int len);
1173 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1175 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1176 ADBDeviceRequest *devreq,
1177 ADBDeviceReset *devreset,
1178 void *opaque);
1179 void adb_kbd_init(ADBBusState *bus);
1180 void adb_mouse_init(ADBBusState *bus);
1182 /* cuda.c */
1184 extern ADBBusState adb_bus;
1185 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1187 #include "hw/usb.h"
1189 /* usb ports of the VM */
1191 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1192 usb_attachfn attach);
1194 #define VM_USB_HUB_SIZE 8
1196 void do_usb_add(const char *devname);
1197 void do_usb_del(const char *devname);
1198 void usb_info(void);
1200 /* scsi-disk.c */
1201 enum scsi_reason {
1202 SCSI_REASON_DONE, /* Command complete. */
1203 SCSI_REASON_DATA /* Transfer complete, more data required. */
1206 typedef struct SCSIDevice SCSIDevice;
1207 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1208 uint32_t arg);
1210 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1211 int tcq,
1212 scsi_completionfn completion,
1213 void *opaque);
1214 void scsi_disk_destroy(SCSIDevice *s);
1216 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1217 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1218 layer the completion routine may be called directly by
1219 scsi_{read,write}_data. */
1220 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1221 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1222 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1223 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1225 enum scsi_host_adapters {
1226 SCSI_LSI_53C895A
1228 enum scsi_devices {
1229 SCSI_CDROM,
1230 SCSI_DISK,
1231 SCSI_NONE
1233 typedef enum scsi_host_adapters scsi_host_adapters;
1234 typedef enum scsi_devices scsi_devices;
1235 typedef struct SCSIDiskInfo {
1236 scsi_host_adapters adapter;
1237 int id;
1238 scsi_devices device_type;
1239 } SCSIDiskInfo;
1241 #define MAX_SCSI_DISKS 7
1242 extern BlockDriverState *bs_scsi_table[MAX_SCSI_DISKS];
1243 extern SCSIDiskInfo scsi_disks_info[MAX_SCSI_DISKS];
1245 /* lsi53c895a.c */
1246 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1247 void *lsi_scsi_init(PCIBus *bus, int devfn);
1248 extern int scsi_hba_lsi; // Count of scsi disks/cdrom using this lsi adapter
1250 /* integratorcp.c */
1251 extern QEMUMachine integratorcp926_machine;
1252 extern QEMUMachine integratorcp1026_machine;
1254 /* versatilepb.c */
1255 extern QEMUMachine versatilepb_machine;
1256 extern QEMUMachine versatileab_machine;
1258 /* realview.c */
1259 extern QEMUMachine realview_machine;
1261 /* ps2.c */
1262 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1263 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1264 void ps2_write_mouse(void *, int val);
1265 void ps2_write_keyboard(void *, int val);
1266 uint32_t ps2_read_data(void *);
1267 void ps2_queue(void *, int b);
1268 void ps2_keyboard_set_translation(void *opaque, int mode);
1270 /* smc91c111.c */
1271 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1273 /* pl110.c */
1274 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1276 /* pl011.c */
1277 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1279 /* pl050.c */
1280 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1282 /* pl080.c */
1283 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1285 /* pl190.c */
1286 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1288 /* arm-timer.c */
1289 void sp804_init(uint32_t base, void *pic, int irq);
1290 void icp_pit_init(uint32_t base, void *pic, int irq);
1292 /* arm_sysctl.c */
1293 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1295 /* arm_gic.c */
1296 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1298 /* arm_boot.c */
1300 void arm_load_kernel(int ram_size, const char *kernel_filename,
1301 const char *kernel_cmdline, const char *initrd_filename,
1302 int board_id);
1304 /* sh7750.c */
1305 struct SH7750State;
1307 struct SH7750State *sh7750_init(CPUState * cpu);
1309 typedef struct {
1310 /* The callback will be triggered if any of the designated lines change */
1311 uint16_t portamask_trigger;
1312 uint16_t portbmask_trigger;
1313 /* Return 0 if no action was taken */
1314 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1315 uint16_t * periph_pdtra,
1316 uint16_t * periph_portdira,
1317 uint16_t * periph_pdtrb,
1318 uint16_t * periph_portdirb);
1319 } sh7750_io_device;
1321 int sh7750_register_io_device(struct SH7750State *s,
1322 sh7750_io_device * device);
1323 /* tc58128.c */
1324 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1326 /* NOR flash devices */
1327 typedef struct pflash_t pflash_t;
1329 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1330 BlockDriverState *bs,
1331 target_ulong sector_len, int nb_blocs, int width,
1332 uint16_t id0, uint16_t id1,
1333 uint16_t id2, uint16_t id3);
1335 #endif /* defined(QEMU_TOOL) */
1337 /* monitor.c */
1338 void monitor_init(CharDriverState *hd, int show_banner);
1339 void term_puts(const char *str);
1340 void term_vprintf(const char *fmt, va_list ap);
1341 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1342 void term_print_filename(const char *filename);
1343 void term_flush(void);
1344 void term_print_help(void);
1345 void monitor_readline(const char *prompt, int is_password,
1346 char *buf, int buf_size);
1348 /* readline.c */
1349 typedef void ReadLineFunc(void *opaque, const char *str);
1351 extern int completion_index;
1352 void add_completion(const char *str);
1353 void readline_handle_byte(int ch);
1354 void readline_find_completion(const char *cmdline);
1355 const char *readline_get_history(unsigned int index);
1356 void readline_start(const char *prompt, int is_password,
1357 ReadLineFunc *readline_func, void *opaque);
1359 void kqemu_record_dump(void);
1361 #endif /* VL_H */