2 * Arm PrimeCell PL110 Color LCD Controller
4 * Copyright (c) 2005-2006 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GNU LGPL
12 #define PL110_CR_EN 0x001
13 #define PL110_CR_BEBO 0x200
14 #define PL110_CR_BEPO 0x400
15 #define PL110_CR_PWR 0x800
30 /* The Versatile/PB uses a slightly modified PL110 controller. */
40 enum pl110_bppmode bpp
;
42 uint32_t pallette
[256];
43 uint32_t raw_pallette
[128];
47 static const unsigned char pl110_id
[] =
48 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
50 /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
51 has a different ID. However Linux only looks for the normal ID. */
53 static const unsigned char pl110_versatile_id
[] =
54 { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
56 #define pl110_versatile_id pl110_id
59 static inline uint32_t rgb_to_pixel8(unsigned int r
, unsigned int g
, unsigned b
)
61 return ((r
>> 5) << 5) | ((g
>> 5) << 2) | (b
>> 6);
64 static inline uint32_t rgb_to_pixel15(unsigned int r
, unsigned int g
, unsigned b
)
66 return ((r
>> 3) << 10) | ((g
>> 3) << 5) | (b
>> 3);
69 static inline uint32_t rgb_to_pixel16(unsigned int r
, unsigned int g
, unsigned b
)
71 return ((r
>> 3) << 11) | ((g
>> 2) << 5) | (b
>> 3);
74 static inline uint32_t rgb_to_pixel24(unsigned int r
, unsigned int g
, unsigned b
)
76 return (r
<< 16) | (g
<< 8) | b
;
79 static inline uint32_t rgb_to_pixel32(unsigned int r
, unsigned int g
, unsigned b
)
81 return (r
<< 16) | (g
<< 8) | b
;
84 typedef void (*drawfn
)(uint32_t *, uint8_t *, const uint8_t *, int);
87 #include "pl110_template.h"
89 #include "pl110_template.h"
91 #include "pl110_template.h"
93 #include "pl110_template.h"
95 #include "pl110_template.h"
97 static int pl110_enabled(pl110_state
*s
)
99 return (s
->cr
& PL110_CR_EN
) && (s
->cr
& PL110_CR_PWR
);
102 static void pl110_update_display(void *opaque
)
104 pl110_state
*s
= (pl110_state
*)opaque
;
115 int dirty
, new_dirty
;
118 if (!pl110_enabled(s
))
121 switch (s
->ds
->depth
) {
125 fntable
= pl110_draw_fn_8
;
129 fntable
= pl110_draw_fn_15
;
133 fntable
= pl110_draw_fn_16
;
137 fntable
= pl110_draw_fn_24
;
141 fntable
= pl110_draw_fn_32
;
145 fprintf(stderr
, "pl110: Bad color depth\n");
148 if (s
->cr
& PL110_CR_BEBO
)
149 fn
= fntable
[s
->bpp
+ 6];
150 else if (s
->cr
& PL110_CR_BEPO
)
151 fn
= fntable
[s
->bpp
+ 12];
153 fn
= fntable
[s
->bpp
];
175 dest_width
*= s
->cols
;
176 pallette
= s
->pallette
;
178 /* HACK: Arm aliases physical memory at 0x80000000. */
179 if (base
> 0x80000000)
181 src
= phys_ram_base
+ base
;
186 dirty
= cpu_physical_memory_get_dirty(addr
, VGA_DIRTY_FLAG
);
188 for (i
= 0; i
< s
->rows
; i
++) {
189 if ((addr
& ~TARGET_PAGE_MASK
) + src_width
>= TARGET_PAGE_SIZE
) {
192 for (tmp
= 0; tmp
< src_width
; tmp
+= TARGET_PAGE_SIZE
) {
193 new_dirty
|= cpu_physical_memory_get_dirty(addr
+ tmp
,
198 if (dirty
|| new_dirty
|| s
->invalidate
) {
199 fn(pallette
, dest
, src
, s
->cols
);
213 cpu_physical_memory_reset_dirty(base
+ first
* src_width
,
214 base
+ (last
+ 1) * src_width
,
216 dpy_update(s
->ds
, 0, first
, s
->cols
, last
- first
+ 1);
219 static void pl110_invalidate_display(void * opaque
)
221 pl110_state
*s
= (pl110_state
*)opaque
;
225 static void pl110_update_pallette(pl110_state
*s
, int n
)
229 unsigned int r
, g
, b
;
231 raw
= s
->raw_pallette
[n
];
233 for (i
= 0; i
< 2; i
++) {
234 r
= (raw
& 0x1f) << 3;
236 g
= (raw
& 0x1f) << 3;
238 b
= (raw
& 0x1f) << 3;
239 /* The I bit is ignored. */
241 switch (s
->ds
->depth
) {
243 s
->pallette
[n
] = rgb_to_pixel8(r
, g
, b
);
246 s
->pallette
[n
] = rgb_to_pixel15(r
, g
, b
);
249 s
->pallette
[n
] = rgb_to_pixel16(r
, g
, b
);
253 s
->pallette
[n
] = rgb_to_pixel32(r
, g
, b
);
260 static void pl110_resize(pl110_state
*s
, int width
, int height
)
262 if (width
!= s
->cols
|| height
!= s
->rows
) {
263 if (pl110_enabled(s
)) {
264 dpy_resize(s
->ds
, width
, height
);
271 /* Update interrupts. */
272 static void pl110_update(pl110_state
*s
)
274 /* TODO: Implement interrupts. */
277 static uint32_t pl110_read(void *opaque
, target_phys_addr_t offset
)
279 pl110_state
*s
= (pl110_state
*)opaque
;
282 if (offset
>= 0xfe0 && offset
< 0x1000) {
284 return pl110_versatile_id
[(offset
- 0xfe0) >> 2];
286 return pl110_id
[(offset
- 0xfe0) >> 2];
288 if (offset
>= 0x200 && offset
< 0x400) {
289 return s
->raw_pallette
[(offset
- 0x200) >> 2];
291 switch (offset
>> 2) {
292 case 0: /* LCDTiming0 */
294 case 1: /* LCDTiming1 */
296 case 2: /* LCDTiming2 */
298 case 3: /* LCDTiming3 */
300 case 4: /* LCDUPBASE */
302 case 5: /* LCDLPBASE */
304 case 6: /* LCDIMSC */
306 case 7: /* LCDControl */
309 return s
->int_status
;
311 return s
->int_status
& s
->int_mask
;
312 case 11: /* LCDUPCURR */
313 /* TODO: Implement vertical refresh. */
315 case 12: /* LCDLPCURR */
318 cpu_abort (cpu_single_env
, "pl110_read: Bad offset %x\n", offset
);
323 static void pl110_write(void *opaque
, target_phys_addr_t offset
,
326 pl110_state
*s
= (pl110_state
*)opaque
;
329 /* For simplicity invalidate the display whenever a control register
333 if (offset
>= 0x200 && offset
< 0x400) {
335 n
= (offset
- 0x200) >> 2;
336 s
->raw_pallette
[(offset
- 0x200) >> 2] = val
;
337 pl110_update_pallette(s
, n
);
340 switch (offset
>> 2) {
341 case 0: /* LCDTiming0 */
343 n
= ((val
& 0xfc) + 4) * 4;
344 pl110_resize(s
, n
, s
->rows
);
346 case 1: /* LCDTiming1 */
348 n
= (val
& 0x3ff) + 1;
349 pl110_resize(s
, s
->cols
, n
);
351 case 2: /* LCDTiming2 */
354 case 3: /* LCDTiming3 */
357 case 4: /* LCDUPBASE */
360 case 5: /* LCDLPBASE */
363 case 6: /* LCDIMSC */
370 case 7: /* LCDControl */
375 s
->bpp
= (val
>> 1) & 7;
376 if (pl110_enabled(s
)) {
377 dpy_resize(s
->ds
, s
->cols
, s
->rows
);
380 case 10: /* LCDICR */
381 s
->int_status
&= ~val
;
385 cpu_abort (cpu_single_env
, "pl110_write: Bad offset %x\n", offset
);
389 static CPUReadMemoryFunc
*pl110_readfn
[] = {
395 static CPUWriteMemoryFunc
*pl110_writefn
[] = {
401 void *pl110_init(DisplayState
*ds
, uint32_t base
, qemu_irq irq
,
407 s
= (pl110_state
*)qemu_mallocz(sizeof(pl110_state
));
408 iomemtype
= cpu_register_io_memory(0, pl110_readfn
,
410 cpu_register_physical_memory(base
, 0x00000fff, iomemtype
);
413 s
->versatile
= versatile
;
415 graphic_console_init(ds
, pl110_update_display
, pl110_invalidate_display
,
417 /* ??? Save/restore. */