ARM GDB semihosting fixes
[qemu/mini2440.git] / target-i386 / opreg_template.h
blob648063650b3840ae68a5d1d13cb4d9df62825e79
1 /*
2 * i386 micro operations (templates for various register related
3 * operations)
4 *
5 * Copyright (c) 2003 Fabrice Bellard
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 void OPPROTO glue(op_movl_A0,REGNAME)(void)
23 A0 = (uint32_t)REG;
26 void OPPROTO glue(op_addl_A0,REGNAME)(void)
28 A0 = (uint32_t)(A0 + REG);
31 void OPPROTO glue(glue(op_addl_A0,REGNAME),_s1)(void)
33 A0 = (uint32_t)(A0 + (REG << 1));
36 void OPPROTO glue(glue(op_addl_A0,REGNAME),_s2)(void)
38 A0 = (uint32_t)(A0 + (REG << 2));
41 void OPPROTO glue(glue(op_addl_A0,REGNAME),_s3)(void)
43 A0 = (uint32_t)(A0 + (REG << 3));
46 #ifdef TARGET_X86_64
47 void OPPROTO glue(op_movq_A0,REGNAME)(void)
49 A0 = REG;
52 void OPPROTO glue(op_addq_A0,REGNAME)(void)
54 A0 = (A0 + REG);
57 void OPPROTO glue(glue(op_addq_A0,REGNAME),_s1)(void)
59 A0 = (A0 + (REG << 1));
62 void OPPROTO glue(glue(op_addq_A0,REGNAME),_s2)(void)
64 A0 = (A0 + (REG << 2));
67 void OPPROTO glue(glue(op_addq_A0,REGNAME),_s3)(void)
69 A0 = (A0 + (REG << 3));
71 #endif
73 void OPPROTO glue(op_movl_T0,REGNAME)(void)
75 T0 = REG;
78 void OPPROTO glue(op_movl_T1,REGNAME)(void)
80 T1 = REG;
83 void OPPROTO glue(op_movh_T0,REGNAME)(void)
85 T0 = REG >> 8;
88 void OPPROTO glue(op_movh_T1,REGNAME)(void)
90 T1 = REG >> 8;
93 void OPPROTO glue(glue(op_movl,REGNAME),_T0)(void)
95 REG = (uint32_t)T0;
98 void OPPROTO glue(glue(op_movl,REGNAME),_T1)(void)
100 REG = (uint32_t)T1;
103 void OPPROTO glue(glue(op_movl,REGNAME),_A0)(void)
105 REG = (uint32_t)A0;
108 #ifdef TARGET_X86_64
109 void OPPROTO glue(glue(op_movq,REGNAME),_T0)(void)
111 REG = T0;
114 void OPPROTO glue(glue(op_movq,REGNAME),_T1)(void)
116 REG = T1;
119 void OPPROTO glue(glue(op_movq,REGNAME),_A0)(void)
121 REG = A0;
123 #endif
125 /* mov T1 to REG if T0 is true */
126 void OPPROTO glue(glue(op_cmovw,REGNAME),_T1_T0)(void)
128 if (T0)
129 REG = (REG & ~0xffff) | (T1 & 0xffff);
130 FORCE_RET();
133 void OPPROTO glue(glue(op_cmovl,REGNAME),_T1_T0)(void)
135 if (T0)
136 REG = (uint32_t)T1;
137 FORCE_RET();
140 #ifdef TARGET_X86_64
141 void OPPROTO glue(glue(op_cmovq,REGNAME),_T1_T0)(void)
143 if (T0)
144 REG = T1;
145 FORCE_RET();
147 #endif
149 /* NOTE: T0 high order bits are ignored */
150 void OPPROTO glue(glue(op_movw,REGNAME),_T0)(void)
152 REG = (REG & ~0xffff) | (T0 & 0xffff);
155 /* NOTE: T0 high order bits are ignored */
156 void OPPROTO glue(glue(op_movw,REGNAME),_T1)(void)
158 REG = (REG & ~0xffff) | (T1 & 0xffff);
161 /* NOTE: A0 high order bits are ignored */
162 void OPPROTO glue(glue(op_movw,REGNAME),_A0)(void)
164 REG = (REG & ~0xffff) | (A0 & 0xffff);
167 /* NOTE: T0 high order bits are ignored */
168 void OPPROTO glue(glue(op_movb,REGNAME),_T0)(void)
170 REG = (REG & ~0xff) | (T0 & 0xff);
173 /* NOTE: T0 high order bits are ignored */
174 void OPPROTO glue(glue(op_movh,REGNAME),_T0)(void)
176 REG = (REG & ~0xff00) | ((T0 & 0xff) << 8);
179 /* NOTE: T1 high order bits are ignored */
180 void OPPROTO glue(glue(op_movb,REGNAME),_T1)(void)
182 REG = (REG & ~0xff) | (T1 & 0xff);
185 /* NOTE: T1 high order bits are ignored */
186 void OPPROTO glue(glue(op_movh,REGNAME),_T1)(void)
188 REG = (REG & ~0xff00) | ((T1 & 0xff) << 8);