target-i386/op.c

   1 /*
   2  *  i386 micro operations
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #define ASM_SOFTMMU
  22 #include "exec.h"
  23
  24 /* n must be a constant to be efficient */
  25 static inline target_long lshift(target_long x, int n)
  26 {
  27     if (n >= 0)
  28         return x << n;
  29     else
  30         return x >> (-n);
  31 }
  32
  33 /* we define the various pieces of code used by the JIT */
  34
  35 #define REG EAX
  36 #define REGNAME _EAX
  37 #include "opreg_template.h"
  38 #undef REG
  39 #undef REGNAME
  40
  41 #define REG ECX
  42 #define REGNAME _ECX
  43 #include "opreg_template.h"
  44 #undef REG
  45 #undef REGNAME
  46
  47 #define REG EDX
  48 #define REGNAME _EDX
  49 #include "opreg_template.h"
  50 #undef REG
  51 #undef REGNAME
  52
  53 #define REG EBX
  54 #define REGNAME _EBX
  55 #include "opreg_template.h"
  56 #undef REG
  57 #undef REGNAME
  58
  59 #define REG ESP
  60 #define REGNAME _ESP
  61 #include "opreg_template.h"
  62 #undef REG
  63 #undef REGNAME
  64
  65 #define REG EBP
  66 #define REGNAME _EBP
  67 #include "opreg_template.h"
  68 #undef REG
  69 #undef REGNAME
  70
  71 #define REG ESI
  72 #define REGNAME _ESI
  73 #include "opreg_template.h"
  74 #undef REG
  75 #undef REGNAME
  76
  77 #define REG EDI
  78 #define REGNAME _EDI
  79 #include "opreg_template.h"
  80 #undef REG
  81 #undef REGNAME
  82
  83 #ifdef TARGET_X86_64
  84
  85 #define REG (env->regs[8])
  86 #define REGNAME _R8
  87 #include "opreg_template.h"
  88 #undef REG
  89 #undef REGNAME
  90
  91 #define REG (env->regs[9])
  92 #define REGNAME _R9
  93 #include "opreg_template.h"
  94 #undef REG
  95 #undef REGNAME
  96
  97 #define REG (env->regs[10])
  98 #define REGNAME _R10
  99 #include "opreg_template.h"
 100 #undef REG
 101 #undef REGNAME
 102
 103 #define REG (env->regs[11])
 104 #define REGNAME _R11
 105 #include "opreg_template.h"
 106 #undef REG
 107 #undef REGNAME
 108
 109 #define REG (env->regs[12])
 110 #define REGNAME _R12
 111 #include "opreg_template.h"
 112 #undef REG
 113 #undef REGNAME
 114
 115 #define REG (env->regs[13])
 116 #define REGNAME _R13
 117 #include "opreg_template.h"
 118 #undef REG
 119 #undef REGNAME
 120
 121 #define REG (env->regs[14])
 122 #define REGNAME _R14
 123 #include "opreg_template.h"
 124 #undef REG
 125 #undef REGNAME
 126
 127 #define REG (env->regs[15])
 128 #define REGNAME _R15
 129 #include "opreg_template.h"
 130 #undef REG
 131 #undef REGNAME
 132
 133 #endif
 134
 135 /* operations with flags */
 136
 137 /* update flags with T0 and T1 (add/sub case) */
 138 void OPPROTO op_update2_cc(void)
 139 {
 140     CC_SRC = T1;
 141     CC_DST = T0;
 142 }
 143
 144 /* update flags with T0 (logic operation case) */
 145 void OPPROTO op_update1_cc(void)
 146 {
 147     CC_DST = T0;
 148 }
 149
 150 void OPPROTO op_update_neg_cc(void)
 151 {
 152     CC_SRC = -T0;
 153     CC_DST = T0;
 154 }
 155
 156 void OPPROTO op_cmpl_T0_T1_cc(void)
 157 {
 158     CC_SRC = T1;
 159     CC_DST = T0 - T1;
 160 }
 161
 162 void OPPROTO op_update_inc_cc(void)
 163 {
 164     CC_SRC = cc_table[CC_OP].compute_c();
 165     CC_DST = T0;
 166 }
 167
 168 void OPPROTO op_testl_T0_T1_cc(void)
 169 {
 170     CC_DST = T0 & T1;
 171 }
 172
 173 /* operations without flags */
 174
 175 void OPPROTO op_addl_T0_T1(void)
 176 {
 177     T0 += T1;
 178 }
 179
 180 void OPPROTO op_orl_T0_T1(void)
 181 {
 182     T0 |= T1;
 183 }
 184
 185 void OPPROTO op_andl_T0_T1(void)
 186 {
 187     T0 &= T1;
 188 }
 189
 190 void OPPROTO op_subl_T0_T1(void)
 191 {
 192     T0 -= T1;
 193 }
 194
 195 void OPPROTO op_xorl_T0_T1(void)
 196 {
 197     T0 ^= T1;
 198 }
 199
 200 void OPPROTO op_negl_T0(void)
 201 {
 202     T0 = -T0;
 203 }
 204
 205 void OPPROTO op_incl_T0(void)
 206 {
 207     T0++;
 208 }
 209
 210 void OPPROTO op_decl_T0(void)
 211 {
 212     T0--;
 213 }
 214
 215 void OPPROTO op_notl_T0(void)
 216 {
 217     T0 = ~T0;
 218 }
 219
 220 void OPPROTO op_bswapl_T0(void)
 221 {
 222     T0 = bswap32(T0);
 223 }
 224
 225 #ifdef TARGET_X86_64
 226 void OPPROTO op_bswapq_T0(void)
 227 {
 228     helper_bswapq_T0();
 229 }
 230 #endif
 231
 232 /* multiply/divide */
 233
 234 /* XXX: add eflags optimizations */
 235 /* XXX: add non P4 style flags */
 236
 237 void OPPROTO op_mulb_AL_T0(void)
 238 {
 239     unsigned int res;
 240     res = (uint8_t)EAX * (uint8_t)T0;
 241     EAX = (EAX & ~0xffff) | res;
 242     CC_DST = res;
 243     CC_SRC = (res & 0xff00);
 244 }
 245
 246 void OPPROTO op_imulb_AL_T0(void)
 247 {
 248     int res;
 249     res = (int8_t)EAX * (int8_t)T0;
 250     EAX = (EAX & ~0xffff) | (res & 0xffff);
 251     CC_DST = res;
 252     CC_SRC = (res != (int8_t)res);
 253 }
 254
 255 void OPPROTO op_mulw_AX_T0(void)
 256 {
 257     unsigned int res;
 258     res = (uint16_t)EAX * (uint16_t)T0;
 259     EAX = (EAX & ~0xffff) | (res & 0xffff);
 260     EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
 261     CC_DST = res;
 262     CC_SRC = res >> 16;
 263 }
 264
 265 void OPPROTO op_imulw_AX_T0(void)
 266 {
 267     int res;
 268     res = (int16_t)EAX * (int16_t)T0;
 269     EAX = (EAX & ~0xffff) | (res & 0xffff);
 270     EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
 271     CC_DST = res;
 272     CC_SRC = (res != (int16_t)res);
 273 }
 274
 275 void OPPROTO op_mull_EAX_T0(void)
 276 {
 277     uint64_t res;
 278     res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
 279     EAX = (uint32_t)res;
 280     EDX = (uint32_t)(res >> 32);
 281     CC_DST = (uint32_t)res;
 282     CC_SRC = (uint32_t)(res >> 32);
 283 }
 284
 285 void OPPROTO op_imull_EAX_T0(void)
 286 {
 287     int64_t res;
 288     res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
 289     EAX = (uint32_t)(res);
 290     EDX = (uint32_t)(res >> 32);
 291     CC_DST = res;
 292     CC_SRC = (res != (int32_t)res);
 293 }
 294
 295 void OPPROTO op_imulw_T0_T1(void)
 296 {
 297     int res;
 298     res = (int16_t)T0 * (int16_t)T1;
 299     T0 = res;
 300     CC_DST = res;
 301     CC_SRC = (res != (int16_t)res);
 302 }
 303
 304 void OPPROTO op_imull_T0_T1(void)
 305 {
 306     int64_t res;
 307     res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
 308     T0 = res;
 309     CC_DST = res;
 310     CC_SRC = (res != (int32_t)res);
 311 }
 312
 313 #ifdef TARGET_X86_64
 314 void OPPROTO op_mulq_EAX_T0(void)
 315 {
 316     helper_mulq_EAX_T0();
 317 }
 318
 319 void OPPROTO op_imulq_EAX_T0(void)
 320 {
 321     helper_imulq_EAX_T0();
 322 }
 323
 324 void OPPROTO op_imulq_T0_T1(void)
 325 {
 326     helper_imulq_T0_T1();
 327 }
 328 #endif
 329
 330 /* division, flags are undefined */
 331
 332 void OPPROTO op_divb_AL_T0(void)
 333 {
 334     unsigned int num, den, q, r;
 335
 336     num = (EAX & 0xffff);
 337     den = (T0 & 0xff);
 338     if (den == 0) {
 339         raise_exception(EXCP00_DIVZ);
 340     }
 341     q = (num / den);
 342     if (q > 0xff)
 343         raise_exception(EXCP00_DIVZ);
 344     q &= 0xff;
 345     r = (num % den) & 0xff;
 346     EAX = (EAX & ~0xffff) | (r << 8) | q;
 347 }
 348
 349 void OPPROTO op_idivb_AL_T0(void)
 350 {
 351     int num, den, q, r;
 352
 353     num = (int16_t)EAX;
 354     den = (int8_t)T0;
 355     if (den == 0) {
 356         raise_exception(EXCP00_DIVZ);
 357     }
 358     q = (num / den);
 359     if (q != (int8_t)q)
 360         raise_exception(EXCP00_DIVZ);
 361     q &= 0xff;
 362     r = (num % den) & 0xff;
 363     EAX = (EAX & ~0xffff) | (r << 8) | q;
 364 }
 365
 366 void OPPROTO op_divw_AX_T0(void)
 367 {
 368     unsigned int num, den, q, r;
 369
 370     num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
 371     den = (T0 & 0xffff);
 372     if (den == 0) {
 373         raise_exception(EXCP00_DIVZ);
 374     }
 375     q = (num / den);
 376     if (q > 0xffff)
 377         raise_exception(EXCP00_DIVZ);
 378     q &= 0xffff;
 379     r = (num % den) & 0xffff;
 380     EAX = (EAX & ~0xffff) | q;
 381     EDX = (EDX & ~0xffff) | r;
 382 }
 383
 384 void OPPROTO op_idivw_AX_T0(void)
 385 {
 386     int num, den, q, r;
 387
 388     num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
 389     den = (int16_t)T0;
 390     if (den == 0) {
 391         raise_exception(EXCP00_DIVZ);
 392     }
 393     q = (num / den);
 394     if (q != (int16_t)q)
 395         raise_exception(EXCP00_DIVZ);
 396     q &= 0xffff;
 397     r = (num % den) & 0xffff;
 398     EAX = (EAX & ~0xffff) | q;
 399     EDX = (EDX & ~0xffff) | r;
 400 }
 401
 402 void OPPROTO op_divl_EAX_T0(void)
 403 {
 404     helper_divl_EAX_T0();
 405 }
 406
 407 void OPPROTO op_idivl_EAX_T0(void)
 408 {
 409     helper_idivl_EAX_T0();
 410 }
 411
 412 #ifdef TARGET_X86_64
 413 void OPPROTO op_divq_EAX_T0(void)
 414 {
 415     helper_divq_EAX_T0();
 416 }
 417
 418 void OPPROTO op_idivq_EAX_T0(void)
 419 {
 420     helper_idivq_EAX_T0();
 421 }
 422 #endif
 423
 424 /* constant load & misc op */
 425
 426 /* XXX: consistent names */
 427 void OPPROTO op_movl_T0_imu(void)
 428 {
 429     T0 = (uint32_t)PARAM1;
 430 }
 431
 432 void OPPROTO op_movl_T0_im(void)
 433 {
 434     T0 = (int32_t)PARAM1;
 435 }
 436
 437 void OPPROTO op_addl_T0_im(void)
 438 {
 439     T0 += PARAM1;
 440 }
 441
 442 void OPPROTO op_andl_T0_ffff(void)
 443 {
 444     T0 = T0 & 0xffff;
 445 }
 446
 447 void OPPROTO op_andl_T0_im(void)
 448 {
 449     T0 = T0 & PARAM1;
 450 }
 451
 452 void OPPROTO op_movl_T0_T1(void)
 453 {
 454     T0 = T1;
 455 }
 456
 457 void OPPROTO op_movl_T1_imu(void)
 458 {
 459     T1 = (uint32_t)PARAM1;
 460 }
 461
 462 void OPPROTO op_movl_T1_im(void)
 463 {
 464     T1 = (int32_t)PARAM1;
 465 }
 466
 467 void OPPROTO op_addl_T1_im(void)
 468 {
 469     T1 += PARAM1;
 470 }
 471
 472 void OPPROTO op_movl_T1_A0(void)
 473 {
 474     T1 = A0;
 475 }
 476
 477 void OPPROTO op_movl_A0_im(void)
 478 {
 479     A0 = (uint32_t)PARAM1;
 480 }
 481
 482 void OPPROTO op_addl_A0_im(void)
 483 {
 484     A0 = (uint32_t)(A0 + PARAM1);
 485 }
 486
 487 void OPPROTO op_movl_A0_seg(void)
 488 {
 489     A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
 490 }
 491
 492 void OPPROTO op_addl_A0_seg(void)
 493 {
 494     A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
 495 }
 496
 497 void OPPROTO op_addl_A0_AL(void)
 498 {
 499     A0 = (uint32_t)(A0 + (EAX & 0xff));
 500 }
 501
 502 #ifdef WORDS_BIGENDIAN
 503 typedef union UREG64 {
 504     struct { uint16_t v3, v2, v1, v0; } w;
 505     struct { uint32_t v1, v0; } l;
 506     uint64_t q;
 507 } UREG64;
 508 #else
 509 typedef union UREG64 {
 510     struct { uint16_t v0, v1, v2, v3; } w;
 511     struct { uint32_t v0, v1; } l;
 512     uint64_t q;
 513 } UREG64;
 514 #endif
 515
 516 #ifdef TARGET_X86_64
 517
 518 #define PARAMQ1 \
 519 ({\
 520     UREG64 __p;\
 521     __p.l.v1 = PARAM1;\
 522     __p.l.v0 = PARAM2;\
 523     __p.q;\
 524 })
 525
 526 void OPPROTO op_movq_T0_im64(void)
 527 {
 528     T0 = PARAMQ1;
 529 }
 530
 531 void OPPROTO op_movq_T1_im64(void)
 532 {
 533     T1 = PARAMQ1;
 534 }
 535
 536 void OPPROTO op_movq_A0_im(void)
 537 {
 538     A0 = (int32_t)PARAM1;
 539 }
 540
 541 void OPPROTO op_movq_A0_im64(void)
 542 {
 543     A0 = PARAMQ1;
 544 }
 545
 546 void OPPROTO op_addq_A0_im(void)
 547 {
 548     A0 = (A0 + (int32_t)PARAM1);
 549 }
 550
 551 void OPPROTO op_addq_A0_im64(void)
 552 {
 553     A0 = (A0 + PARAMQ1);
 554 }
 555
 556 void OPPROTO op_movq_A0_seg(void)
 557 {
 558     A0 = *(target_ulong *)((char *)env + PARAM1);
 559 }
 560
 561 void OPPROTO op_addq_A0_seg(void)
 562 {
 563     A0 += *(target_ulong *)((char *)env + PARAM1);
 564 }
 565
 566 void OPPROTO op_addq_A0_AL(void)
 567 {
 568     A0 = (A0 + (EAX & 0xff));
 569 }
 570
 571 #endif
 572
 573 void OPPROTO op_andl_A0_ffff(void)
 574 {
 575     A0 = A0 & 0xffff;
 576 }
 577
 578 /* memory access */
 579
 580 #define MEMSUFFIX _raw
 581 #include "ops_mem.h"
 582
 583 #if !defined(CONFIG_USER_ONLY)
 584 #define MEMSUFFIX _kernel
 585 #include "ops_mem.h"
 586
 587 #define MEMSUFFIX _user
 588 #include "ops_mem.h"
 589 #endif
 590
 591 /* indirect jump */
 592
 593 void OPPROTO op_jmp_T0(void)
 594 {
 595     EIP = T0;
 596 }
 597
 598 void OPPROTO op_movl_eip_im(void)
 599 {
 600     EIP = (uint32_t)PARAM1;
 601 }
 602
 603 #ifdef TARGET_X86_64
 604 void OPPROTO op_movq_eip_im(void)
 605 {
 606     EIP = (int32_t)PARAM1;
 607 }
 608
 609 void OPPROTO op_movq_eip_im64(void)
 610 {
 611     EIP = PARAMQ1;
 612 }
 613 #endif
 614
 615 void OPPROTO op_hlt(void)
 616 {
 617     helper_hlt();
 618 }
 619
 620 void OPPROTO op_monitor(void)
 621 {
 622     helper_monitor();
 623 }
 624
 625 void OPPROTO op_mwait(void)
 626 {
 627     helper_mwait();
 628 }
 629
 630 void OPPROTO op_debug(void)
 631 {
 632     env->exception_index = EXCP_DEBUG;
 633     cpu_loop_exit();
 634 }
 635
 636 void OPPROTO op_raise_interrupt(void)
 637 {
 638     int intno, next_eip_addend;
 639     intno = PARAM1;
 640     next_eip_addend = PARAM2;
 641     raise_interrupt(intno, 1, 0, next_eip_addend);
 642 }
 643
 644 void OPPROTO op_raise_exception(void)
 645 {
 646     int exception_index;
 647     exception_index = PARAM1;
 648     raise_exception(exception_index);
 649 }
 650
 651 void OPPROTO op_into(void)
 652 {
 653     int eflags;
 654     eflags = cc_table[CC_OP].compute_all();
 655     if (eflags & CC_O) {
 656         raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
 657     }
 658     FORCE_RET();
 659 }
 660
 661 void OPPROTO op_cli(void)
 662 {
 663     env->eflags &= ~IF_MASK;
 664 }
 665
 666 void OPPROTO op_sti(void)
 667 {
 668     env->eflags |= IF_MASK;
 669 }
 670
 671 void OPPROTO op_set_inhibit_irq(void)
 672 {
 673     env->hflags |= HF_INHIBIT_IRQ_MASK;
 674 }
 675
 676 void OPPROTO op_reset_inhibit_irq(void)
 677 {
 678     env->hflags &= ~HF_INHIBIT_IRQ_MASK;
 679 }
 680
 681 void OPPROTO op_rsm(void)
 682 {
 683     helper_rsm();
 684 }
 685
 686 #if 0
 687 /* vm86plus instructions */
 688 void OPPROTO op_cli_vm(void)
 689 {
 690     env->eflags &= ~VIF_MASK;
 691 }
 692
 693 void OPPROTO op_sti_vm(void)
 694 {
 695     env->eflags |= VIF_MASK;
 696     if (env->eflags & VIP_MASK) {
 697         EIP = PARAM1;
 698         raise_exception(EXCP0D_GPF);
 699     }
 700     FORCE_RET();
 701 }
 702 #endif
 703
 704 void OPPROTO op_boundw(void)
 705 {
 706     int low, high, v;
 707     low = ldsw(A0);
 708     high = ldsw(A0 + 2);
 709     v = (int16_t)T0;
 710     if (v < low || v > high) {
 711         raise_exception(EXCP05_BOUND);
 712     }
 713     FORCE_RET();
 714 }
 715
 716 void OPPROTO op_boundl(void)
 717 {
 718     int low, high, v;
 719     low = ldl(A0);
 720     high = ldl(A0 + 4);
 721     v = T0;
 722     if (v < low || v > high) {
 723         raise_exception(EXCP05_BOUND);
 724     }
 725     FORCE_RET();
 726 }
 727
 728 void OPPROTO op_cmpxchg8b(void)
 729 {
 730     helper_cmpxchg8b();
 731 }
 732
 733 void OPPROTO op_movl_T0_0(void)
 734 {
 735     T0 = 0;
 736 }
 737
 738 void OPPROTO op_exit_tb(void)
 739 {
 740     EXIT_TB();
 741 }
 742
 743 /* multiple size ops */
 744
 745 #define ldul ldl
 746
 747 #define SHIFT 0
 748 #include "ops_template.h"
 749 #undef SHIFT
 750
 751 #define SHIFT 1
 752 #include "ops_template.h"
 753 #undef SHIFT
 754
 755 #define SHIFT 2
 756 #include "ops_template.h"
 757 #undef SHIFT
 758
 759 #ifdef TARGET_X86_64
 760
 761 #define SHIFT 3
 762 #include "ops_template.h"
 763 #undef SHIFT
 764
 765 #endif
 766
 767 /* sign extend */
 768
 769 void OPPROTO op_movsbl_T0_T0(void)
 770 {
 771     T0 = (int8_t)T0;
 772 }
 773
 774 void OPPROTO op_movzbl_T0_T0(void)
 775 {
 776     T0 = (uint8_t)T0;
 777 }
 778
 779 void OPPROTO op_movswl_T0_T0(void)
 780 {
 781     T0 = (int16_t)T0;
 782 }
 783
 784 void OPPROTO op_movzwl_T0_T0(void)
 785 {
 786     T0 = (uint16_t)T0;
 787 }
 788
 789 void OPPROTO op_movswl_EAX_AX(void)
 790 {
 791     EAX = (uint32_t)((int16_t)EAX);
 792 }
 793
 794 #ifdef TARGET_X86_64
 795 void OPPROTO op_movslq_T0_T0(void)
 796 {
 797     T0 = (int32_t)T0;
 798 }
 799
 800 void OPPROTO op_movslq_RAX_EAX(void)
 801 {
 802     EAX = (int32_t)EAX;
 803 }
 804 #endif
 805
 806 void OPPROTO op_movsbw_AX_AL(void)
 807 {
 808     EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
 809 }
 810
 811 void OPPROTO op_movslq_EDX_EAX(void)
 812 {
 813     EDX = (uint32_t)((int32_t)EAX >> 31);
 814 }
 815
 816 void OPPROTO op_movswl_DX_AX(void)
 817 {
 818     EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
 819 }
 820
 821 #ifdef TARGET_X86_64
 822 void OPPROTO op_movsqo_RDX_RAX(void)
 823 {
 824     EDX = (int64_t)EAX >> 63;
 825 }
 826 #endif
 827
 828 /* string ops helpers */
 829
 830 void OPPROTO op_addl_ESI_T0(void)
 831 {
 832     ESI = (uint32_t)(ESI + T0);
 833 }
 834
 835 void OPPROTO op_addw_ESI_T0(void)
 836 {
 837     ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
 838 }
 839
 840 void OPPROTO op_addl_EDI_T0(void)
 841 {
 842     EDI = (uint32_t)(EDI + T0);
 843 }
 844
 845 void OPPROTO op_addw_EDI_T0(void)
 846 {
 847     EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
 848 }
 849
 850 void OPPROTO op_decl_ECX(void)
 851 {
 852     ECX = (uint32_t)(ECX - 1);
 853 }
 854
 855 void OPPROTO op_decw_ECX(void)
 856 {
 857     ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
 858 }
 859
 860 #ifdef TARGET_X86_64
 861 void OPPROTO op_addq_ESI_T0(void)
 862 {
 863     ESI = (ESI + T0);
 864 }
 865
 866 void OPPROTO op_addq_EDI_T0(void)
 867 {
 868     EDI = (EDI + T0);
 869 }
 870
 871 void OPPROTO op_decq_ECX(void)
 872 {
 873     ECX--;
 874 }
 875 #endif
 876
 877 /* push/pop utils */
 878
 879 void op_addl_A0_SS(void)
 880 {
 881     A0 = (uint32_t)(A0 + env->segs[R_SS].base);
 882 }
 883
 884 void op_subl_A0_2(void)
 885 {
 886     A0 = (uint32_t)(A0 - 2);
 887 }
 888
 889 void op_subl_A0_4(void)
 890 {
 891     A0 = (uint32_t)(A0 - 4);
 892 }
 893
 894 void op_addl_ESP_4(void)
 895 {
 896     ESP = (uint32_t)(ESP + 4);
 897 }
 898
 899 void op_addl_ESP_2(void)
 900 {
 901     ESP = (uint32_t)(ESP + 2);
 902 }
 903
 904 void op_addw_ESP_4(void)
 905 {
 906     ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
 907 }
 908
 909 void op_addw_ESP_2(void)
 910 {
 911     ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
 912 }
 913
 914 void op_addl_ESP_im(void)
 915 {
 916     ESP = (uint32_t)(ESP + PARAM1);
 917 }
 918
 919 void op_addw_ESP_im(void)
 920 {
 921     ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
 922 }
 923
 924 #ifdef TARGET_X86_64
 925 void op_subq_A0_2(void)
 926 {
 927     A0 -= 2;
 928 }
 929
 930 void op_subq_A0_8(void)
 931 {
 932     A0 -= 8;
 933 }
 934
 935 void op_addq_ESP_8(void)
 936 {
 937     ESP += 8;
 938 }
 939
 940 void op_addq_ESP_im(void)
 941 {
 942     ESP += PARAM1;
 943 }
 944 #endif
 945
 946 void OPPROTO op_rdtsc(void)
 947 {
 948     helper_rdtsc();
 949 }
 950
 951 void OPPROTO op_cpuid(void)
 952 {
 953     helper_cpuid();
 954 }
 955
 956 void OPPROTO op_enter_level(void)
 957 {
 958     helper_enter_level(PARAM1, PARAM2);
 959 }
 960
 961 #ifdef TARGET_X86_64
 962 void OPPROTO op_enter64_level(void)
 963 {
 964     helper_enter64_level(PARAM1, PARAM2);
 965 }
 966 #endif
 967
 968 void OPPROTO op_sysenter(void)
 969 {
 970     helper_sysenter();
 971 }
 972
 973 void OPPROTO op_sysexit(void)
 974 {
 975     helper_sysexit();
 976 }
 977
 978 #ifdef TARGET_X86_64
 979 void OPPROTO op_syscall(void)
 980 {
 981     helper_syscall(PARAM1);
 982 }
 983
 984 void OPPROTO op_sysret(void)
 985 {
 986     helper_sysret(PARAM1);
 987 }
 988 #endif
 989
 990 void OPPROTO op_rdmsr(void)
 991 {
 992     helper_rdmsr();
 993 }
 994
 995 void OPPROTO op_wrmsr(void)
 996 {
 997     helper_wrmsr();
 998 }
 999
1000 /* bcd */
1001
1002 /* XXX: exception */
1003 void OPPROTO op_aam(void)
1004 {
1005     int base = PARAM1;
1006     int al, ah;
1007     al = EAX & 0xff;
1008     ah = al / base;
1009     al = al % base;
1010     EAX = (EAX & ~0xffff) | al | (ah << 8);
1011     CC_DST = al;
1012 }
1013
1014 void OPPROTO op_aad(void)
1015 {
1016     int base = PARAM1;
1017     int al, ah;
1018     al = EAX & 0xff;
1019     ah = (EAX >> 8) & 0xff;
1020     al = ((ah * base) + al) & 0xff;
1021     EAX = (EAX & ~0xffff) | al;
1022     CC_DST = al;
1023 }
1024
1025 void OPPROTO op_aaa(void)
1026 {
1027     int icarry;
1028     int al, ah, af;
1029     int eflags;
1030
1031     eflags = cc_table[CC_OP].compute_all();
1032     af = eflags & CC_A;
1033     al = EAX & 0xff;
1034     ah = (EAX >> 8) & 0xff;
1035
1036     icarry = (al > 0xf9);
1037     if (((al & 0x0f) > 9 ) || af) {
1038         al = (al + 6) & 0x0f;
1039         ah = (ah + 1 + icarry) & 0xff;
1040         eflags |= CC_C | CC_A;
1041     } else {
1042         eflags &= ~(CC_C | CC_A);
1043         al &= 0x0f;
1044     }
1045     EAX = (EAX & ~0xffff) | al | (ah << 8);
1046     CC_SRC = eflags;
1047     FORCE_RET();
1048 }
1049
1050 void OPPROTO op_aas(void)
1051 {
1052     int icarry;
1053     int al, ah, af;
1054     int eflags;
1055
1056     eflags = cc_table[CC_OP].compute_all();
1057     af = eflags & CC_A;
1058     al = EAX & 0xff;
1059     ah = (EAX >> 8) & 0xff;
1060
1061     icarry = (al < 6);
1062     if (((al & 0x0f) > 9 ) || af) {
1063         al = (al - 6) & 0x0f;
1064         ah = (ah - 1 - icarry) & 0xff;
1065         eflags |= CC_C | CC_A;
1066     } else {
1067         eflags &= ~(CC_C | CC_A);
1068         al &= 0x0f;
1069     }
1070     EAX = (EAX & ~0xffff) | al | (ah << 8);
1071     CC_SRC = eflags;
1072     FORCE_RET();
1073 }
1074
1075 void OPPROTO op_daa(void)
1076 {
1077     int al, af, cf;
1078     int eflags;
1079
1080     eflags = cc_table[CC_OP].compute_all();
1081     cf = eflags & CC_C;
1082     af = eflags & CC_A;
1083     al = EAX & 0xff;
1084
1085     eflags = 0;
1086     if (((al & 0x0f) > 9 ) || af) {
1087         al = (al + 6) & 0xff;
1088         eflags |= CC_A;
1089     }
1090     if ((al > 0x9f) || cf) {
1091         al = (al + 0x60) & 0xff;
1092         eflags |= CC_C;
1093     }
1094     EAX = (EAX & ~0xff) | al;
1095     /* well, speed is not an issue here, so we compute the flags by hand */
1096     eflags |= (al == 0) << 6; /* zf */
1097     eflags |= parity_table[al]; /* pf */
1098     eflags |= (al & 0x80); /* sf */
1099     CC_SRC = eflags;
1100     FORCE_RET();
1101 }
1102
1103 void OPPROTO op_das(void)
1104 {
1105     int al, al1, af, cf;
1106     int eflags;
1107
1108     eflags = cc_table[CC_OP].compute_all();
1109     cf = eflags & CC_C;
1110     af = eflags & CC_A;
1111     al = EAX & 0xff;
1112
1113     eflags = 0;
1114     al1 = al;
1115     if (((al & 0x0f) > 9 ) || af) {
1116         eflags |= CC_A;
1117         if (al < 6 || cf)
1118             eflags |= CC_C;
1119         al = (al - 6) & 0xff;
1120     }
1121     if ((al1 > 0x99) || cf) {
1122         al = (al - 0x60) & 0xff;
1123         eflags |= CC_C;
1124     }
1125     EAX = (EAX & ~0xff) | al;
1126     /* well, speed is not an issue here, so we compute the flags by hand */
1127     eflags |= (al == 0) << 6; /* zf */
1128     eflags |= parity_table[al]; /* pf */
1129     eflags |= (al & 0x80); /* sf */
1130     CC_SRC = eflags;
1131     FORCE_RET();
1132 }
1133
1134 /* segment handling */
1135
1136 /* never use it with R_CS */
1137 void OPPROTO op_movl_seg_T0(void)
1138 {
1139     load_seg(PARAM1, T0);
1140 }
1141
1142 /* faster VM86 version */
1143 void OPPROTO op_movl_seg_T0_vm(void)
1144 {
1145     int selector;
1146     SegmentCache *sc;
1147
1148     selector = T0 & 0xffff;
1149     /* env->segs[] access */
1150     sc = (SegmentCache *)((char *)env + PARAM1);
1151     sc->selector = selector;
1152     sc->base = (selector << 4);
1153 }
1154
1155 void OPPROTO op_movl_T0_seg(void)
1156 {
1157     T0 = env->segs[PARAM1].selector;
1158 }
1159
1160 void OPPROTO op_lsl(void)
1161 {
1162     helper_lsl();
1163 }
1164
1165 void OPPROTO op_lar(void)
1166 {
1167     helper_lar();
1168 }
1169
1170 void OPPROTO op_verr(void)
1171 {
1172     helper_verr();
1173 }
1174
1175 void OPPROTO op_verw(void)
1176 {
1177     helper_verw();
1178 }
1179
1180 void OPPROTO op_arpl(void)
1181 {
1182     if ((T0 & 3) < (T1 & 3)) {
1183         /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1184         T0 = (T0 & ~3) | (T1 & 3);
1185         T1 = CC_Z;
1186    } else {
1187         T1 = 0;
1188     }
1189     FORCE_RET();
1190 }
1191
1192 void OPPROTO op_arpl_update(void)
1193 {
1194     int eflags;
1195     eflags = cc_table[CC_OP].compute_all();
1196     CC_SRC = (eflags & ~CC_Z) | T1;
1197 }
1198
1199 /* T0: segment, T1:eip */
1200 void OPPROTO op_ljmp_protected_T0_T1(void)
1201 {
1202     helper_ljmp_protected_T0_T1(PARAM1);
1203 }
1204
1205 void OPPROTO op_lcall_real_T0_T1(void)
1206 {
1207     helper_lcall_real_T0_T1(PARAM1, PARAM2);
1208 }
1209
1210 void OPPROTO op_lcall_protected_T0_T1(void)
1211 {
1212     helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1213 }
1214
1215 void OPPROTO op_iret_real(void)
1216 {
1217     helper_iret_real(PARAM1);
1218 }
1219
1220 void OPPROTO op_iret_protected(void)
1221 {
1222     helper_iret_protected(PARAM1, PARAM2);
1223 }
1224
1225 void OPPROTO op_lret_protected(void)
1226 {
1227     helper_lret_protected(PARAM1, PARAM2);
1228 }
1229
1230 void OPPROTO op_lldt_T0(void)
1231 {
1232     helper_lldt_T0();
1233 }
1234
1235 void OPPROTO op_ltr_T0(void)
1236 {
1237     helper_ltr_T0();
1238 }
1239
1240 /* CR registers access */
1241 void OPPROTO op_movl_crN_T0(void)
1242 {
1243     helper_movl_crN_T0(PARAM1);
1244 }
1245
1246 #if !defined(CONFIG_USER_ONLY)
1247 void OPPROTO op_movtl_T0_cr8(void)
1248 {
1249     T0 = cpu_get_apic_tpr(env);
1250 }
1251 #endif
1252
1253 /* DR registers access */
1254 void OPPROTO op_movl_drN_T0(void)
1255 {
1256     helper_movl_drN_T0(PARAM1);
1257 }
1258
1259 void OPPROTO op_lmsw_T0(void)
1260 {
1261     /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1262        if already set to one. */
1263     T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1264     helper_movl_crN_T0(0);
1265 }
1266
1267 void OPPROTO op_invlpg_A0(void)
1268 {
1269     helper_invlpg(A0);
1270 }
1271
1272 void OPPROTO op_movl_T0_env(void)
1273 {
1274     T0 = *(uint32_t *)((char *)env + PARAM1);
1275 }
1276
1277 void OPPROTO op_movl_env_T0(void)
1278 {
1279     *(uint32_t *)((char *)env + PARAM1) = T0;
1280 }
1281
1282 void OPPROTO op_movl_env_T1(void)
1283 {
1284     *(uint32_t *)((char *)env + PARAM1) = T1;
1285 }
1286
1287 void OPPROTO op_movtl_T0_env(void)
1288 {
1289     T0 = *(target_ulong *)((char *)env + PARAM1);
1290 }
1291
1292 void OPPROTO op_movtl_env_T0(void)
1293 {
1294     *(target_ulong *)((char *)env + PARAM1) = T0;
1295 }
1296
1297 void OPPROTO op_movtl_T1_env(void)
1298 {
1299     T1 = *(target_ulong *)((char *)env + PARAM1);
1300 }
1301
1302 void OPPROTO op_movtl_env_T1(void)
1303 {
1304     *(target_ulong *)((char *)env + PARAM1) = T1;
1305 }
1306
1307 void OPPROTO op_clts(void)
1308 {
1309     env->cr[0] &= ~CR0_TS_MASK;
1310     env->hflags &= ~HF_TS_MASK;
1311 }
1312
1313 /* flags handling */
1314
1315 void OPPROTO op_goto_tb0(void)
1316 {
1317     GOTO_TB(op_goto_tb0, PARAM1, 0);
1318 }
1319
1320 void OPPROTO op_goto_tb1(void)
1321 {
1322     GOTO_TB(op_goto_tb1, PARAM1, 1);
1323 }
1324
1325 void OPPROTO op_jmp_label(void)
1326 {
1327     GOTO_LABEL_PARAM(1);
1328 }
1329
1330 void OPPROTO op_jnz_T0_label(void)
1331 {
1332     if (T0)
1333         GOTO_LABEL_PARAM(1);
1334     FORCE_RET();
1335 }
1336
1337 void OPPROTO op_jz_T0_label(void)
1338 {
1339     if (!T0)
1340         GOTO_LABEL_PARAM(1);
1341     FORCE_RET();
1342 }
1343
1344 /* slow set cases (compute x86 flags) */
1345 void OPPROTO op_seto_T0_cc(void)
1346 {
1347     int eflags;
1348     eflags = cc_table[CC_OP].compute_all();
1349     T0 = (eflags >> 11) & 1;
1350 }
1351
1352 void OPPROTO op_setb_T0_cc(void)
1353 {
1354     T0 = cc_table[CC_OP].compute_c();
1355 }
1356
1357 void OPPROTO op_setz_T0_cc(void)
1358 {
1359     int eflags;
1360     eflags = cc_table[CC_OP].compute_all();
1361     T0 = (eflags >> 6) & 1;
1362 }
1363
1364 void OPPROTO op_setbe_T0_cc(void)
1365 {
1366     int eflags;
1367     eflags = cc_table[CC_OP].compute_all();
1368     T0 = (eflags & (CC_Z | CC_C)) != 0;
1369 }
1370
1371 void OPPROTO op_sets_T0_cc(void)
1372 {
1373     int eflags;
1374     eflags = cc_table[CC_OP].compute_all();
1375     T0 = (eflags >> 7) & 1;
1376 }
1377
1378 void OPPROTO op_setp_T0_cc(void)
1379 {
1380     int eflags;
1381     eflags = cc_table[CC_OP].compute_all();
1382     T0 = (eflags >> 2) & 1;
1383 }
1384
1385 void OPPROTO op_setl_T0_cc(void)
1386 {
1387     int eflags;
1388     eflags = cc_table[CC_OP].compute_all();
1389     T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1390 }
1391
1392 void OPPROTO op_setle_T0_cc(void)
1393 {
1394     int eflags;
1395     eflags = cc_table[CC_OP].compute_all();
1396     T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1397 }
1398
1399 void OPPROTO op_xor_T0_1(void)
1400 {
1401     T0 ^= 1;
1402 }
1403
1404 void OPPROTO op_set_cc_op(void)
1405 {
1406     CC_OP = PARAM1;
1407 }
1408
1409 void OPPROTO op_mov_T0_cc(void)
1410 {
1411     T0 = cc_table[CC_OP].compute_all();
1412 }
1413
1414 /* XXX: clear VIF/VIP in all ops ? */
1415
1416 void OPPROTO op_movl_eflags_T0(void)
1417 {
1418     load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1419 }
1420
1421 void OPPROTO op_movw_eflags_T0(void)
1422 {
1423     load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1424 }
1425
1426 void OPPROTO op_movl_eflags_T0_io(void)
1427 {
1428     load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1429 }
1430
1431 void OPPROTO op_movw_eflags_T0_io(void)
1432 {
1433     load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1434 }
1435
1436 void OPPROTO op_movl_eflags_T0_cpl0(void)
1437 {
1438     load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1439 }
1440
1441 void OPPROTO op_movw_eflags_T0_cpl0(void)
1442 {
1443     load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1444 }
1445
1446 #if 0
1447 /* vm86plus version */
1448 void OPPROTO op_movw_eflags_T0_vm(void)
1449 {
1450     int eflags;
1451     eflags = T0;
1452     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1453     DF = 1 - (2 * ((eflags >> 10) & 1));
1454     /* we also update some system flags as in user mode */
1455     env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1456         (eflags & FL_UPDATE_MASK16);
1457     if (eflags & IF_MASK) {
1458         env->eflags |= VIF_MASK;
1459         if (env->eflags & VIP_MASK) {
1460             EIP = PARAM1;
1461             raise_exception(EXCP0D_GPF);
1462         }
1463     }
1464     FORCE_RET();
1465 }
1466
1467 void OPPROTO op_movl_eflags_T0_vm(void)
1468 {
1469     int eflags;
1470     eflags = T0;
1471     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1472     DF = 1 - (2 * ((eflags >> 10) & 1));
1473     /* we also update some system flags as in user mode */
1474     env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1475         (eflags & FL_UPDATE_MASK32);
1476     if (eflags & IF_MASK) {
1477         env->eflags |= VIF_MASK;
1478         if (env->eflags & VIP_MASK) {
1479             EIP = PARAM1;
1480             raise_exception(EXCP0D_GPF);
1481         }
1482     }
1483     FORCE_RET();
1484 }
1485 #endif
1486
1487 /* XXX: compute only O flag */
1488 void OPPROTO op_movb_eflags_T0(void)
1489 {
1490     int of;
1491     of = cc_table[CC_OP].compute_all() & CC_O;
1492     CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1493 }
1494
1495 void OPPROTO op_movl_T0_eflags(void)
1496 {
1497     int eflags;
1498     eflags = cc_table[CC_OP].compute_all();
1499     eflags |= (DF & DF_MASK);
1500     eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1501     T0 = eflags;
1502 }
1503
1504 /* vm86plus version */
1505 #if 0
1506 void OPPROTO op_movl_T0_eflags_vm(void)
1507 {
1508     int eflags;
1509     eflags = cc_table[CC_OP].compute_all();
1510     eflags |= (DF & DF_MASK);
1511     eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1512     if (env->eflags & VIF_MASK)
1513         eflags |= IF_MASK;
1514     T0 = eflags;
1515 }
1516 #endif
1517
1518 void OPPROTO op_cld(void)
1519 {
1520     DF = 1;
1521 }
1522
1523 void OPPROTO op_std(void)
1524 {
1525     DF = -1;
1526 }
1527
1528 void OPPROTO op_clc(void)
1529 {
1530     int eflags;
1531     eflags = cc_table[CC_OP].compute_all();
1532     eflags &= ~CC_C;
1533     CC_SRC = eflags;
1534 }
1535
1536 void OPPROTO op_stc(void)
1537 {
1538     int eflags;
1539     eflags = cc_table[CC_OP].compute_all();
1540     eflags |= CC_C;
1541     CC_SRC = eflags;
1542 }
1543
1544 void OPPROTO op_cmc(void)
1545 {
1546     int eflags;
1547     eflags = cc_table[CC_OP].compute_all();
1548     eflags ^= CC_C;
1549     CC_SRC = eflags;
1550 }
1551
1552 void OPPROTO op_salc(void)
1553 {
1554     int cf;
1555     cf = cc_table[CC_OP].compute_c();
1556     EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1557 }
1558
1559 static int compute_all_eflags(void)
1560 {
1561     return CC_SRC;
1562 }
1563
1564 static int compute_c_eflags(void)
1565 {
1566     return CC_SRC & CC_C;
1567 }
1568
1569 CCTable cc_table[CC_OP_NB] = {
1570     [CC_OP_DYNAMIC] = { /* should never happen */ },
1571
1572     [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1573
1574     [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1575     [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1576     [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1577
1578     [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1579     [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
1580     [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
1581
1582     [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1583     [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
1584     [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
1585
1586     [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
1587     [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
1588     [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
1589
1590     [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
1591     [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
1592     [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
1593
1594     [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1595     [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1596     [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1597
1598     [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1599     [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1600     [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1601
1602     [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1603     [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1604     [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1605
1606     [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1607     [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1608     [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1609
1610     [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1611     [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1612     [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1613
1614 #ifdef TARGET_X86_64
1615     [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1616
1617     [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq  },
1618
1619     [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq  },
1620
1621     [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq  },
1622
1623     [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq  },
1624
1625     [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1626
1627     [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1628
1629     [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1630
1631     [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1632
1633     [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1634 #endif
1635 };
1636
1637 /* floating point support. Some of the code for complicated x87
1638    functions comes from the LGPL'ed x86 emulator found in the Willows
1639    TWIN windows emulator. */
1640
1641 /* fp load FT0 */
1642
1643 void OPPROTO op_flds_FT0_A0(void)
1644 {
1645 #ifdef USE_FP_CONVERT
1646     FP_CONVERT.i32 = ldl(A0);
1647     FT0 = FP_CONVERT.f;
1648 #else
1649     FT0 = ldfl(A0);
1650 #endif
1651 }
1652
1653 void OPPROTO op_fldl_FT0_A0(void)
1654 {
1655 #ifdef USE_FP_CONVERT
1656     FP_CONVERT.i64 = ldq(A0);
1657     FT0 = FP_CONVERT.d;
1658 #else
1659     FT0 = ldfq(A0);
1660 #endif
1661 }
1662
1663 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1664 #ifdef USE_INT_TO_FLOAT_HELPERS
1665
1666 void helper_fild_FT0_A0(void)
1667 {
1668     FT0 = (CPU86_LDouble)ldsw(A0);
1669 }
1670
1671 void helper_fildl_FT0_A0(void)
1672 {
1673     FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1674 }
1675
1676 void helper_fildll_FT0_A0(void)
1677 {
1678     FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1679 }
1680
1681 void OPPROTO op_fild_FT0_A0(void)
1682 {
1683     helper_fild_FT0_A0();
1684 }
1685
1686 void OPPROTO op_fildl_FT0_A0(void)
1687 {
1688     helper_fildl_FT0_A0();
1689 }
1690
1691 void OPPROTO op_fildll_FT0_A0(void)
1692 {
1693     helper_fildll_FT0_A0();
1694 }
1695
1696 #else
1697
1698 void OPPROTO op_fild_FT0_A0(void)
1699 {
1700 #ifdef USE_FP_CONVERT
1701     FP_CONVERT.i32 = ldsw(A0);
1702     FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1703 #else
1704     FT0 = (CPU86_LDouble)ldsw(A0);
1705 #endif
1706 }
1707
1708 void OPPROTO op_fildl_FT0_A0(void)
1709 {
1710 #ifdef USE_FP_CONVERT
1711     FP_CONVERT.i32 = (int32_t) ldl(A0);
1712     FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1713 #else
1714     FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1715 #endif
1716 }
1717
1718 void OPPROTO op_fildll_FT0_A0(void)
1719 {
1720 #ifdef USE_FP_CONVERT
1721     FP_CONVERT.i64 = (int64_t) ldq(A0);
1722     FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1723 #else
1724     FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1725 #endif
1726 }
1727 #endif
1728
1729 /* fp load ST0 */
1730
1731 void OPPROTO op_flds_ST0_A0(void)
1732 {
1733     int new_fpstt;
1734     new_fpstt = (env->fpstt - 1) & 7;
1735 #ifdef USE_FP_CONVERT
1736     FP_CONVERT.i32 = ldl(A0);
1737     env->fpregs[new_fpstt].d = FP_CONVERT.f;
1738 #else
1739     env->fpregs[new_fpstt].d = ldfl(A0);
1740 #endif
1741     env->fpstt = new_fpstt;
1742     env->fptags[new_fpstt] = 0; /* validate stack entry */
1743 }
1744
1745 void OPPROTO op_fldl_ST0_A0(void)
1746 {
1747     int new_fpstt;
1748     new_fpstt = (env->fpstt - 1) & 7;
1749 #ifdef USE_FP_CONVERT
1750     FP_CONVERT.i64 = ldq(A0);
1751     env->fpregs[new_fpstt].d = FP_CONVERT.d;
1752 #else
1753     env->fpregs[new_fpstt].d = ldfq(A0);
1754 #endif
1755     env->fpstt = new_fpstt;
1756     env->fptags[new_fpstt] = 0; /* validate stack entry */
1757 }
1758
1759 void OPPROTO op_fldt_ST0_A0(void)
1760 {
1761     helper_fldt_ST0_A0();
1762 }
1763
1764 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1765 #ifdef USE_INT_TO_FLOAT_HELPERS
1766
1767 void helper_fild_ST0_A0(void)
1768 {
1769     int new_fpstt;
1770     new_fpstt = (env->fpstt - 1) & 7;
1771     env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1772     env->fpstt = new_fpstt;
1773     env->fptags[new_fpstt] = 0; /* validate stack entry */
1774 }
1775
1776 void helper_fildl_ST0_A0(void)
1777 {
1778     int new_fpstt;
1779     new_fpstt = (env->fpstt - 1) & 7;
1780     env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1781     env->fpstt = new_fpstt;
1782     env->fptags[new_fpstt] = 0; /* validate stack entry */
1783 }
1784
1785 void helper_fildll_ST0_A0(void)
1786 {
1787     int new_fpstt;
1788     new_fpstt = (env->fpstt - 1) & 7;
1789     env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1790     env->fpstt = new_fpstt;
1791     env->fptags[new_fpstt] = 0; /* validate stack entry */
1792 }
1793
1794 void OPPROTO op_fild_ST0_A0(void)
1795 {
1796     helper_fild_ST0_A0();
1797 }
1798
1799 void OPPROTO op_fildl_ST0_A0(void)
1800 {
1801     helper_fildl_ST0_A0();
1802 }
1803
1804 void OPPROTO op_fildll_ST0_A0(void)
1805 {
1806     helper_fildll_ST0_A0();
1807 }
1808
1809 #else
1810
1811 void OPPROTO op_fild_ST0_A0(void)
1812 {
1813     int new_fpstt;
1814     new_fpstt = (env->fpstt - 1) & 7;
1815 #ifdef USE_FP_CONVERT
1816     FP_CONVERT.i32 = ldsw(A0);
1817     env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1818 #else
1819     env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1820 #endif
1821     env->fpstt = new_fpstt;
1822     env->fptags[new_fpstt] = 0; /* validate stack entry */
1823 }
1824
1825 void OPPROTO op_fildl_ST0_A0(void)
1826 {
1827     int new_fpstt;
1828     new_fpstt = (env->fpstt - 1) & 7;
1829 #ifdef USE_FP_CONVERT
1830     FP_CONVERT.i32 = (int32_t) ldl(A0);
1831     env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1832 #else
1833     env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1834 #endif
1835     env->fpstt = new_fpstt;
1836     env->fptags[new_fpstt] = 0; /* validate stack entry */
1837 }
1838
1839 void OPPROTO op_fildll_ST0_A0(void)
1840 {
1841     int new_fpstt;
1842     new_fpstt = (env->fpstt - 1) & 7;
1843 #ifdef USE_FP_CONVERT
1844     FP_CONVERT.i64 = (int64_t) ldq(A0);
1845     env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1846 #else
1847     env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1848 #endif
1849     env->fpstt = new_fpstt;
1850     env->fptags[new_fpstt] = 0; /* validate stack entry */
1851 }
1852
1853 #endif
1854
1855 /* fp store */
1856
1857 void OPPROTO op_fsts_ST0_A0(void)
1858 {
1859 #ifdef USE_FP_CONVERT
1860     FP_CONVERT.f = (float)ST0;
1861     stfl(A0, FP_CONVERT.f);
1862 #else
1863     stfl(A0, (float)ST0);
1864 #endif
1865     FORCE_RET();
1866 }
1867
1868 void OPPROTO op_fstl_ST0_A0(void)
1869 {
1870     stfq(A0, (double)ST0);
1871     FORCE_RET();
1872 }
1873
1874 void OPPROTO op_fstt_ST0_A0(void)
1875 {
1876     helper_fstt_ST0_A0();
1877 }
1878
1879 void OPPROTO op_fist_ST0_A0(void)
1880 {
1881 #if defined(__sparc__) && !defined(__sparc_v9__)
1882     register CPU86_LDouble d asm("o0");
1883 #else
1884     CPU86_LDouble d;
1885 #endif
1886     int val;
1887
1888     d = ST0;
1889     val = floatx_to_int32(d, &env->fp_status);
1890     if (val != (int16_t)val)
1891         val = -32768;
1892     stw(A0, val);
1893     FORCE_RET();
1894 }
1895
1896 void OPPROTO op_fistl_ST0_A0(void)
1897 {
1898 #if defined(__sparc__) && !defined(__sparc_v9__)
1899     register CPU86_LDouble d asm("o0");
1900 #else
1901     CPU86_LDouble d;
1902 #endif
1903     int val;
1904
1905     d = ST0;
1906     val = floatx_to_int32(d, &env->fp_status);
1907     stl(A0, val);
1908     FORCE_RET();
1909 }
1910
1911 void OPPROTO op_fistll_ST0_A0(void)
1912 {
1913 #if defined(__sparc__) && !defined(__sparc_v9__)
1914     register CPU86_LDouble d asm("o0");
1915 #else
1916     CPU86_LDouble d;
1917 #endif
1918     int64_t val;
1919
1920     d = ST0;
1921     val = floatx_to_int64(d, &env->fp_status);
1922     stq(A0, val);
1923     FORCE_RET();
1924 }
1925
1926 void OPPROTO op_fistt_ST0_A0(void)
1927 {
1928 #if defined(__sparc__) && !defined(__sparc_v9__)
1929     register CPU86_LDouble d asm("o0");
1930 #else
1931     CPU86_LDouble d;
1932 #endif
1933     int val;
1934
1935     d = ST0;
1936     val = floatx_to_int32_round_to_zero(d, &env->fp_status);
1937     if (val != (int16_t)val)
1938         val = -32768;
1939     stw(A0, val);
1940     FORCE_RET();
1941 }
1942
1943 void OPPROTO op_fisttl_ST0_A0(void)
1944 {
1945 #if defined(__sparc__) && !defined(__sparc_v9__)
1946     register CPU86_LDouble d asm("o0");
1947 #else
1948     CPU86_LDouble d;
1949 #endif
1950     int val;
1951
1952     d = ST0;
1953     val = floatx_to_int32_round_to_zero(d, &env->fp_status);
1954     stl(A0, val);
1955     FORCE_RET();
1956 }
1957
1958 void OPPROTO op_fisttll_ST0_A0(void)
1959 {
1960 #if defined(__sparc__) && !defined(__sparc_v9__)
1961     register CPU86_LDouble d asm("o0");
1962 #else
1963     CPU86_LDouble d;
1964 #endif
1965     int64_t val;
1966
1967     d = ST0;
1968     val = floatx_to_int64_round_to_zero(d, &env->fp_status);
1969     stq(A0, val);
1970     FORCE_RET();
1971 }
1972
1973 void OPPROTO op_fbld_ST0_A0(void)
1974 {
1975     helper_fbld_ST0_A0();
1976 }
1977
1978 void OPPROTO op_fbst_ST0_A0(void)
1979 {
1980     helper_fbst_ST0_A0();
1981 }
1982
1983 /* FPU move */
1984
1985 void OPPROTO op_fpush(void)
1986 {
1987     fpush();
1988 }
1989
1990 void OPPROTO op_fpop(void)
1991 {
1992     fpop();
1993 }
1994
1995 void OPPROTO op_fdecstp(void)
1996 {
1997     env->fpstt = (env->fpstt - 1) & 7;
1998     env->fpus &= (~0x4700);
1999 }
2000
2001 void OPPROTO op_fincstp(void)
2002 {
2003     env->fpstt = (env->fpstt + 1) & 7;
2004     env->fpus &= (~0x4700);
2005 }
2006
2007 void OPPROTO op_ffree_STN(void)
2008 {
2009     env->fptags[(env->fpstt + PARAM1) & 7] = 1;
2010 }
2011
2012 void OPPROTO op_fmov_ST0_FT0(void)
2013 {
2014     ST0 = FT0;
2015 }
2016
2017 void OPPROTO op_fmov_FT0_STN(void)
2018 {
2019     FT0 = ST(PARAM1);
2020 }
2021
2022 void OPPROTO op_fmov_ST0_STN(void)
2023 {
2024     ST0 = ST(PARAM1);
2025 }
2026
2027 void OPPROTO op_fmov_STN_ST0(void)
2028 {
2029     ST(PARAM1) = ST0;
2030 }
2031
2032 void OPPROTO op_fxchg_ST0_STN(void)
2033 {
2034     CPU86_LDouble tmp;
2035     tmp = ST(PARAM1);
2036     ST(PARAM1) = ST0;
2037     ST0 = tmp;
2038 }
2039
2040 /* FPU operations */
2041
2042 const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
2043
2044 void OPPROTO op_fcom_ST0_FT0(void)
2045 {
2046     int ret;
2047
2048     ret = floatx_compare(ST0, FT0, &env->fp_status);
2049     env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
2050     FORCE_RET();
2051 }
2052
2053 void OPPROTO op_fucom_ST0_FT0(void)
2054 {
2055     int ret;
2056
2057     ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2058     env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
2059     FORCE_RET();
2060 }
2061
2062 const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
2063
2064 void OPPROTO op_fcomi_ST0_FT0(void)
2065 {
2066     int eflags;
2067     int ret;
2068
2069     ret = floatx_compare(ST0, FT0, &env->fp_status);
2070     eflags = cc_table[CC_OP].compute_all();
2071     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2072     CC_SRC = eflags;
2073     FORCE_RET();
2074 }
2075
2076 void OPPROTO op_fucomi_ST0_FT0(void)
2077 {
2078     int eflags;
2079     int ret;
2080
2081     ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2082     eflags = cc_table[CC_OP].compute_all();
2083     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2084     CC_SRC = eflags;
2085     FORCE_RET();
2086 }
2087
2088 void OPPROTO op_fcmov_ST0_STN_T0(void)
2089 {
2090     if (T0) {
2091         ST0 = ST(PARAM1);
2092     }
2093     FORCE_RET();
2094 }
2095
2096 void OPPROTO op_fadd_ST0_FT0(void)
2097 {
2098     ST0 += FT0;
2099 }
2100
2101 void OPPROTO op_fmul_ST0_FT0(void)
2102 {
2103     ST0 *= FT0;
2104 }
2105
2106 void OPPROTO op_fsub_ST0_FT0(void)
2107 {
2108     ST0 -= FT0;
2109 }
2110
2111 void OPPROTO op_fsubr_ST0_FT0(void)
2112 {
2113     ST0 = FT0 - ST0;
2114 }
2115
2116 void OPPROTO op_fdiv_ST0_FT0(void)
2117 {
2118     ST0 = helper_fdiv(ST0, FT0);
2119 }
2120
2121 void OPPROTO op_fdivr_ST0_FT0(void)
2122 {
2123     ST0 = helper_fdiv(FT0, ST0);
2124 }
2125
2126 /* fp operations between STN and ST0 */
2127
2128 void OPPROTO op_fadd_STN_ST0(void)
2129 {
2130     ST(PARAM1) += ST0;
2131 }
2132
2133 void OPPROTO op_fmul_STN_ST0(void)
2134 {
2135     ST(PARAM1) *= ST0;
2136 }
2137
2138 void OPPROTO op_fsub_STN_ST0(void)
2139 {
2140     ST(PARAM1) -= ST0;
2141 }
2142
2143 void OPPROTO op_fsubr_STN_ST0(void)
2144 {
2145     CPU86_LDouble *p;
2146     p = &ST(PARAM1);
2147     *p = ST0 - *p;
2148 }
2149
2150 void OPPROTO op_fdiv_STN_ST0(void)
2151 {
2152     CPU86_LDouble *p;
2153     p = &ST(PARAM1);
2154     *p = helper_fdiv(*p, ST0);
2155 }
2156
2157 void OPPROTO op_fdivr_STN_ST0(void)
2158 {
2159     CPU86_LDouble *p;
2160     p = &ST(PARAM1);
2161     *p = helper_fdiv(ST0, *p);
2162 }
2163
2164 /* misc FPU operations */
2165 void OPPROTO op_fchs_ST0(void)
2166 {
2167     ST0 = floatx_chs(ST0);
2168 }
2169
2170 void OPPROTO op_fabs_ST0(void)
2171 {
2172     ST0 = floatx_abs(ST0);
2173 }
2174
2175 void OPPROTO op_fxam_ST0(void)
2176 {
2177     helper_fxam_ST0();
2178 }
2179
2180 void OPPROTO op_fld1_ST0(void)
2181 {
2182     ST0 = f15rk[1];
2183 }
2184
2185 void OPPROTO op_fldl2t_ST0(void)
2186 {
2187     ST0 = f15rk[6];
2188 }
2189
2190 void OPPROTO op_fldl2e_ST0(void)
2191 {
2192     ST0 = f15rk[5];
2193 }
2194
2195 void OPPROTO op_fldpi_ST0(void)
2196 {
2197     ST0 = f15rk[2];
2198 }
2199
2200 void OPPROTO op_fldlg2_ST0(void)
2201 {
2202     ST0 = f15rk[3];
2203 }
2204
2205 void OPPROTO op_fldln2_ST0(void)
2206 {
2207     ST0 = f15rk[4];
2208 }
2209
2210 void OPPROTO op_fldz_ST0(void)
2211 {
2212     ST0 = f15rk[0];
2213 }
2214
2215 void OPPROTO op_fldz_FT0(void)
2216 {
2217     FT0 = f15rk[0];
2218 }
2219
2220 /* associated heplers to reduce generated code length and to simplify
2221    relocation (FP constants are usually stored in .rodata section) */
2222
2223 void OPPROTO op_f2xm1(void)
2224 {
2225     helper_f2xm1();
2226 }
2227
2228 void OPPROTO op_fyl2x(void)
2229 {
2230     helper_fyl2x();
2231 }
2232
2233 void OPPROTO op_fptan(void)
2234 {
2235     helper_fptan();
2236 }
2237
2238 void OPPROTO op_fpatan(void)
2239 {
2240     helper_fpatan();
2241 }
2242
2243 void OPPROTO op_fxtract(void)
2244 {
2245     helper_fxtract();
2246 }
2247
2248 void OPPROTO op_fprem1(void)
2249 {
2250     helper_fprem1();
2251 }
2252
2253
2254 void OPPROTO op_fprem(void)
2255 {
2256     helper_fprem();
2257 }
2258
2259 void OPPROTO op_fyl2xp1(void)
2260 {
2261     helper_fyl2xp1();
2262 }
2263
2264 void OPPROTO op_fsqrt(void)
2265 {
2266     helper_fsqrt();
2267 }
2268
2269 void OPPROTO op_fsincos(void)
2270 {
2271     helper_fsincos();
2272 }
2273
2274 void OPPROTO op_frndint(void)
2275 {
2276     helper_frndint();
2277 }
2278
2279 void OPPROTO op_fscale(void)
2280 {
2281     helper_fscale();
2282 }
2283
2284 void OPPROTO op_fsin(void)
2285 {
2286     helper_fsin();
2287 }
2288
2289 void OPPROTO op_fcos(void)
2290 {
2291     helper_fcos();
2292 }
2293
2294 void OPPROTO op_fnstsw_A0(void)
2295 {
2296     int fpus;
2297     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2298     stw(A0, fpus);
2299     FORCE_RET();
2300 }
2301
2302 void OPPROTO op_fnstsw_EAX(void)
2303 {
2304     int fpus;
2305     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2306     EAX = (EAX & ~0xffff) | fpus;
2307 }
2308
2309 void OPPROTO op_fnstcw_A0(void)
2310 {
2311     stw(A0, env->fpuc);
2312     FORCE_RET();
2313 }
2314
2315 void OPPROTO op_fldcw_A0(void)
2316 {
2317     env->fpuc = lduw(A0);
2318     update_fp_status();
2319 }
2320
2321 void OPPROTO op_fclex(void)
2322 {
2323     env->fpus &= 0x7f00;
2324 }
2325
2326 void OPPROTO op_fwait(void)
2327 {
2328     if (env->fpus & FPUS_SE)
2329         fpu_raise_exception();
2330     FORCE_RET();
2331 }
2332
2333 void OPPROTO op_fninit(void)
2334 {
2335     env->fpus = 0;
2336     env->fpstt = 0;
2337     env->fpuc = 0x37f;
2338     env->fptags[0] = 1;
2339     env->fptags[1] = 1;
2340     env->fptags[2] = 1;
2341     env->fptags[3] = 1;
2342     env->fptags[4] = 1;
2343     env->fptags[5] = 1;
2344     env->fptags[6] = 1;
2345     env->fptags[7] = 1;
2346 }
2347
2348 void OPPROTO op_fnstenv_A0(void)
2349 {
2350     helper_fstenv(A0, PARAM1);
2351 }
2352
2353 void OPPROTO op_fldenv_A0(void)
2354 {
2355     helper_fldenv(A0, PARAM1);
2356 }
2357
2358 void OPPROTO op_fnsave_A0(void)
2359 {
2360     helper_fsave(A0, PARAM1);
2361 }
2362
2363 void OPPROTO op_frstor_A0(void)
2364 {
2365     helper_frstor(A0, PARAM1);
2366 }
2367
2368 /* threading support */
2369 void OPPROTO op_lock(void)
2370 {
2371     cpu_lock();
2372 }
2373
2374 void OPPROTO op_unlock(void)
2375 {
2376     cpu_unlock();
2377 }
2378
2379 /* SSE support */
2380 static inline void memcpy16(void *d, void *s)
2381 {
2382     ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2383     ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2384     ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2385     ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2386 }
2387
2388 void OPPROTO op_movo(void)
2389 {
2390     /* XXX: badly generated code */
2391     XMMReg *d, *s;
2392     d = (XMMReg *)((char *)env + PARAM1);
2393     s = (XMMReg *)((char *)env + PARAM2);
2394     memcpy16(d, s);
2395 }
2396
2397 void OPPROTO op_movq(void)
2398 {
2399     uint64_t *d, *s;
2400     d = (uint64_t *)((char *)env + PARAM1);
2401     s = (uint64_t *)((char *)env + PARAM2);
2402     *d = *s;
2403 }
2404
2405 void OPPROTO op_movl(void)
2406 {
2407     uint32_t *d, *s;
2408     d = (uint32_t *)((char *)env + PARAM1);
2409     s = (uint32_t *)((char *)env + PARAM2);
2410     *d = *s;
2411 }
2412
2413 void OPPROTO op_movq_env_0(void)
2414 {
2415     uint64_t *d;
2416     d = (uint64_t *)((char *)env + PARAM1);
2417     *d = 0;
2418 }
2419
2420 void OPPROTO op_fxsave_A0(void)
2421 {
2422     helper_fxsave(A0, PARAM1);
2423 }
2424
2425 void OPPROTO op_fxrstor_A0(void)
2426 {
2427     helper_fxrstor(A0, PARAM1);
2428 }
2429
2430 /* XXX: optimize by storing fptt and fptags in the static cpu state */
2431 void OPPROTO op_enter_mmx(void)
2432 {
2433     env->fpstt = 0;
2434     *(uint32_t *)(env->fptags) = 0;
2435     *(uint32_t *)(env->fptags + 4) = 0;
2436 }
2437
2438 void OPPROTO op_emms(void)
2439 {
2440     /* set to empty state */
2441     *(uint32_t *)(env->fptags) = 0x01010101;
2442     *(uint32_t *)(env->fptags + 4) = 0x01010101;
2443 }
2444
2445 #define SHIFT 0
2446 #include "ops_sse.h"
2447
2448 #define SHIFT 1
2449 #include "ops_sse.h"