2 * QEMU MIPS Jazz support
4 * Copyright (c) 2007-2008 Hervé Poussineau
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
31 #include "audio/audio.h"
36 #ifdef TARGET_WORDS_BIGENDIAN
37 #define BIOS_FILENAME "mips_bios.bin"
39 #define BIOS_FILENAME "mipsel_bios.bin"
48 static void main_cpu_reset(void *opaque
)
50 CPUState
*env
= opaque
;
54 static uint32_t rtc_readb(void *opaque
, target_phys_addr_t addr
)
56 CPUState
*env
= opaque
;
57 return cpu_inw(env
, 0x71);
60 static void rtc_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
62 CPUState
*env
= opaque
;
63 cpu_outw(env
, 0x71, val
& 0xff);
66 static CPUReadMemoryFunc
*rtc_read
[3] = {
72 static CPUWriteMemoryFunc
*rtc_write
[3] = {
78 static void dma_dummy_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
80 /* Nothing to do. That is only to ensure that
81 * the current DMA acknowledge cycle is completed. */
84 static CPUReadMemoryFunc
*dma_dummy_read
[3] = {
90 static CPUWriteMemoryFunc
*dma_dummy_write
[3] = {
97 static void audio_init(qemu_irq
*pic
)
100 int audio_enabled
= 0;
102 for (c
= soundhw
; !audio_enabled
&& c
->name
; ++c
) {
103 audio_enabled
= c
->enabled
;
110 for (c
= soundhw
; c
->name
; ++c
) {
113 c
->init
.init_isa(s
, pic
);
121 #define MAGNUM_BIOS_SIZE_MAX 0x7e000
122 #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
125 void mips_jazz_init (ram_addr_t ram_size
, int vga_ram_size
,
126 const char *cpu_model
,
127 enum jazz_model_e jazz_model
)
132 qemu_irq
*rc4030
, *i8259
;
137 int s_rtc
, s_dma_dummy
;
140 BlockDriverState
*fds
[MAX_FD
];
142 ram_addr_t ram_offset
;
143 ram_addr_t bios_offset
;
146 if (cpu_model
== NULL
) {
150 /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
154 env
= cpu_init(cpu_model
);
156 fprintf(stderr
, "Unable to find CPU definition\n");
159 qemu_register_reset(main_cpu_reset
, env
);
162 ram_offset
= qemu_ram_alloc(ram_size
);
163 cpu_register_physical_memory(0, ram_size
, ram_offset
| IO_MEM_RAM
);
165 bios_offset
= qemu_ram_alloc(MAGNUM_BIOS_SIZE
);
166 cpu_register_physical_memory(0x1fc00000LL
,
167 MAGNUM_BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
168 cpu_register_physical_memory(0xfff00000LL
,
169 MAGNUM_BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
171 /* load the BIOS image. */
172 if (bios_name
== NULL
)
173 bios_name
= BIOS_FILENAME
;
174 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, bios_name
);
175 bios_size
= load_image_targphys(buf
, 0xfff00000LL
, MAGNUM_BIOS_SIZE
);
176 if (bios_size
< 0 || bios_size
> MAGNUM_BIOS_SIZE
) {
177 fprintf(stderr
, "qemu: Could not load MIPS bios '%s'\n",
182 /* Init CPU internal devices */
183 cpu_mips_irq_init_cpu(env
);
184 cpu_mips_clock_init(env
);
187 rc4030_opaque
= rc4030_init(env
->irq
[6], env
->irq
[3], &rc4030
, &dmas
);
188 s_dma_dummy
= cpu_register_io_memory(0, dma_dummy_read
, dma_dummy_write
, NULL
);
189 cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy
);
192 i8259
= i8259_init(env
->irq
[4]);
194 pit
= pit_init(0x40, i8259
[0]);
197 /* ISA IO space at 0x90000000 */
198 isa_mmio_init(0x90000000, 0x01000000);
199 isa_mem_base
= 0x11000000;
202 switch (jazz_model
) {
204 g364fb_mm_init(vga_ram_size
, 0x40000000, 0x60000000, 0, rc4030
[3]);
207 isa_vga_mm_init(vga_ram_size
, 0x40000000, 0x60000000, 0);
213 /* Network controller */
214 for (n
= 0; n
< nb_nics
; n
++) {
217 nd
->model
= "dp83932";
218 if (strcmp(nd
->model
, "dp83932") == 0) {
219 dp83932_init(nd
, 0x80001000, 2, rc4030
[4],
220 rc4030_opaque
, rc4030_dma_memory_rw
);
222 } else if (strcmp(nd
->model
, "?") == 0) {
223 fprintf(stderr
, "qemu: Supported NICs: dp83932\n");
226 fprintf(stderr
, "qemu: Unsupported NIC: %s\n", nd
->model
);
232 scsi_hba
= esp_init(0x80002000, 0,
233 rc4030_dma_read
, rc4030_dma_write
, dmas
[0],
234 rc4030
[5], &esp_reset
);
235 for (n
= 0; n
< ESP_MAX_DEVS
; n
++) {
236 hd
= drive_get_index(IF_SCSI
, 0, n
);
238 esp_scsi_attach(scsi_hba
, drives_table
[hd
].bdrv
, n
);
243 if (drive_get_max_bus(IF_FLOPPY
) >= MAX_FD
) {
244 fprintf(stderr
, "qemu: too many floppy drives\n");
247 for (n
= 0; n
< MAX_FD
; n
++) {
248 int fd
= drive_get_index(IF_FLOPPY
, 0, n
);
250 fds
[n
] = drives_table
[fd
].bdrv
;
254 fdctrl_init(rc4030
[1], 0, 1, 0x80003000, fds
);
256 /* Real time clock */
257 rtc_init(0x70, i8259
[8], 1980);
258 s_rtc
= cpu_register_io_memory(0, rtc_read
, rtc_write
, env
);
259 cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc
);
261 /* Keyboard (i8042) */
262 i8042_mm_init(rc4030
[6], rc4030
[7], 0x80005000, 0x1000, 0x1);
266 serial_mm_init(0x80006000, 0, rc4030
[8], 8000000/16, serial_hds
[0], 1);
268 serial_mm_init(0x80007000, 0, rc4030
[9], 8000000/16, serial_hds
[1], 1);
272 parallel_mm_init(0x80008000, 0, rc4030
[0], parallel_hds
[0]);
275 /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
280 /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
281 ds1225y_init(0x80009000, "nvram");
284 jazz_led_init(0x8000f000);
288 void mips_magnum_init (ram_addr_t ram_size
, int vga_ram_size
,
289 const char *boot_device
,
290 const char *kernel_filename
, const char *kernel_cmdline
,
291 const char *initrd_filename
, const char *cpu_model
)
293 mips_jazz_init(ram_size
, vga_ram_size
, cpu_model
, JAZZ_MAGNUM
);
297 void mips_pica61_init (ram_addr_t ram_size
, int vga_ram_size
,
298 const char *boot_device
,
299 const char *kernel_filename
, const char *kernel_cmdline
,
300 const char *initrd_filename
, const char *cpu_model
)
302 mips_jazz_init(ram_size
, vga_ram_size
, cpu_model
, JAZZ_PICA61
);
305 QEMUMachine mips_magnum_machine
= {
307 .desc
= "MIPS Magnum",
308 .init
= mips_magnum_init
,
312 QEMUMachine mips_pica61_machine
= {
314 .desc
= "Acer Pica 61",
315 .init
= mips_pica61_init
,