hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  33
  34 #define KERNEL_LOAD_ADDR     0x00100000
  35 #define INITRD_LOAD_ADDR     0x00600000
  36 #define KERNEL_PARAMS_ADDR   0x00090000
  37 #define KERNEL_CMDLINE_ADDR  0x00099000
  38
  39 static fdctrl_t *floppy_controller;
  40 static RTCState *rtc_state;
  41 static PITState *pit;
  42 static IOAPICState *ioapic;
  43
  44 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  45 {
  46 }
  47
  48 /* MSDOS compatibility mode FPU exception support */
  49 /* XXX: add IGNNE support */
  50 void cpu_set_ferr(CPUX86State *s)
  51 {
  52     pic_set_irq(13, 1);
  53 }
  54
  55 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  56 {
  57     pic_set_irq(13, 0);
  58 }
  59
  60 /* TSC handling */
  61
  62 uint64_t cpu_get_tsc(CPUX86State *env)
  63 {
  64     return qemu_get_clock(vm_clock);
  65 }
  66
  67 /* IRQ handling */
  68 int cpu_get_pic_interrupt(CPUState *env)
  69 {
  70     int intno;
  71
  72     intno = apic_get_interrupt(env);
  73     if (intno >= 0) {
  74         /* set irq request if a PIC irq is still pending */
  75         /* XXX: improve that */
  76         pic_update_irq(isa_pic);
  77         return intno;
  78     }
  79     /* read the irq from the PIC */
  80     intno = pic_read_irq(isa_pic);
  81     return intno;
  82 }
  83
  84 static void pic_irq_request(void *opaque, int level)
  85 {
  86     CPUState *env = opaque;
  87     if (level)
  88         cpu_interrupt(env, CPU_INTERRUPT_HARD);
  89     else
  90         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
  91 }
  92
  93 /* PC cmos mappings */
  94
  95 #define REG_EQUIPMENT_BYTE          0x14
  96 #define REG_IBM_CENTURY_BYTE        0x32
  97 #define REG_IBM_PS2_CENTURY_BYTE    0x37
  98
  99
 100 static inline int to_bcd(RTCState *s, int a)
 101 {
 102     return ((a / 10) << 4) | (a % 10);
 103 }
 104
 105 static int cmos_get_fd_drive_type(int fd0)
 106 {
 107     int val;
 108
 109     switch (fd0) {
 110     case 0:
 111         /* 1.44 Mb 3"5 drive */
 112         val = 4;
 113         break;
 114     case 1:
 115         /* 2.88 Mb 3"5 drive */
 116         val = 5;
 117         break;
 118     case 2:
 119         /* 1.2 Mb 5"5 drive */
 120         val = 2;
 121         break;
 122     default:
 123         val = 0;
 124         break;
 125     }
 126     return val;
 127 }
 128
 129 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 130 {
 131     RTCState *s = rtc_state;
 132     int cylinders, heads, sectors;
 133     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 134     rtc_set_memory(s, type_ofs, 47);
 135     rtc_set_memory(s, info_ofs, cylinders);
 136     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 137     rtc_set_memory(s, info_ofs + 2, heads);
 138     rtc_set_memory(s, info_ofs + 3, 0xff);
 139     rtc_set_memory(s, info_ofs + 4, 0xff);
 140     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 141     rtc_set_memory(s, info_ofs + 6, cylinders);
 142     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 143     rtc_set_memory(s, info_ofs + 8, sectors);
 144 }
 145
 146 /* hd_table must contain 4 block drivers */
 147 static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
 148 {
 149     RTCState *s = rtc_state;
 150     int val;
 151     int fd0, fd1, nb;
 152     time_t ti;
 153     struct tm *tm;
 154     int i;
 155
 156     /* set the CMOS date */
 157     time(&ti);
 158     if (rtc_utc)
 159         tm = gmtime(&ti);
 160     else
 161         tm = localtime(&ti);
 162     rtc_set_date(s, tm);
 163
 164     val = to_bcd(s, (tm->tm_year / 100) + 19);
 165     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
 166     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
 167
 168     /* various important CMOS locations needed by PC/Bochs bios */
 169
 170     /* memory size */
 171     val = 640; /* base memory in K */
 172     rtc_set_memory(s, 0x15, val);
 173     rtc_set_memory(s, 0x16, val >> 8);
 174
 175     val = (ram_size / 1024) - 1024;
 176     if (val > 65535)
 177         val = 65535;
 178     rtc_set_memory(s, 0x17, val);
 179     rtc_set_memory(s, 0x18, val >> 8);
 180     rtc_set_memory(s, 0x30, val);
 181     rtc_set_memory(s, 0x31, val >> 8);
 182
 183     if (ram_size > (16 * 1024 * 1024))
 184         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 185     else
 186         val = 0;
 187     if (val > 65535)
 188         val = 65535;
 189     rtc_set_memory(s, 0x34, val);
 190     rtc_set_memory(s, 0x35, val >> 8);
 191
 192     switch(boot_device) {
 193     case 'a':
 194     case 'b':
 195         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 196         break;
 197     default:
 198     case 'c':
 199         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 200         break;
 201     case 'd':
 202         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 203         break;
 204     }
 205
 206     /* floppy type */
 207
 208     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 209     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 210
 211     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 212     rtc_set_memory(s, 0x10, val);
 213
 214     val = 0;
 215     nb = 0;
 216     if (fd0 < 3)
 217         nb++;
 218     if (fd1 < 3)
 219         nb++;
 220     switch (nb) {
 221     case 0:
 222         break;
 223     case 1:
 224         val |= 0x01; /* 1 drive, ready for boot */
 225         break;
 226     case 2:
 227         val |= 0x41; /* 2 drives, ready for boot */
 228         break;
 229     }
 230     val |= 0x02; /* FPU is there */
 231     val |= 0x04; /* PS/2 mouse installed */
 232     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 233
 234     /* hard drives */
 235
 236     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 237     if (hd_table[0])
 238         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 239     if (hd_table[1])
 240         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 241
 242     val = 0;
 243     for (i = 0; i < 4; i++) {
 244         if (hd_table[i]) {
 245             int cylinders, heads, sectors, translation;
 246             /* NOTE: bdrv_get_geometry_hint() returns the physical
 247                 geometry.  It is always such that: 1 <= sects <= 63, 1
 248                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 249                 geometry can be different if a translation is done. */
 250             translation = bdrv_get_translation_hint(hd_table[i]);
 251             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 252                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 253                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 254                     /* No translation. */
 255                     translation = 0;
 256                 } else {
 257                     /* LBA translation. */
 258                     translation = 1;
 259                 }
 260             } else {
 261                 translation--;
 262             }
 263             val |= translation << (i * 2);
 264         }
 265     }
 266     rtc_set_memory(s, 0x39, val);
 267
 268     /* Disable check of 0x55AA signature on the last two bytes of
 269        first sector of disk. XXX: make it the default ? */
 270     //    rtc_set_memory(s, 0x38, 1);
 271 }
 272
 273 void ioport_set_a20(int enable)
 274 {
 275     /* XXX: send to all CPUs ? */
 276     cpu_x86_set_a20(first_cpu, enable);
 277 }
 278
 279 int ioport_get_a20(void)
 280 {
 281     return ((first_cpu->a20_mask >> 20) & 1);
 282 }
 283
 284 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 285 {
 286     ioport_set_a20((val >> 1) & 1);
 287     /* XXX: bit 0 is fast reset */
 288 }
 289
 290 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 291 {
 292     return ioport_get_a20() << 1;
 293 }
 294
 295 /***********************************************************/
 296 /* Bochs BIOS debug ports */
 297
 298 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 299 {
 300     static const char shutdown_str[8] = "Shutdown";
 301     static int shutdown_index = 0;
 302
 303     switch(addr) {
 304         /* Bochs BIOS messages */
 305     case 0x400:
 306     case 0x401:
 307         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 308         exit(1);
 309     case 0x402:
 310     case 0x403:
 311 #ifdef DEBUG_BIOS
 312         fprintf(stderr, "%c", val);
 313 #endif
 314         break;
 315     case 0x8900:
 316         /* same as Bochs power off */
 317         if (val == shutdown_str[shutdown_index]) {
 318             shutdown_index++;
 319             if (shutdown_index == 8) {
 320                 shutdown_index = 0;
 321                 qemu_system_shutdown_request();
 322             }
 323         } else {
 324             shutdown_index = 0;
 325         }
 326         break;
 327
 328         /* LGPL'ed VGA BIOS messages */
 329     case 0x501:
 330     case 0x502:
 331         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 332         exit(1);
 333     case 0x500:
 334     case 0x503:
 335 #ifdef DEBUG_BIOS
 336         fprintf(stderr, "%c", val);
 337 #endif
 338         break;
 339     }
 340 }
 341
 342 void bochs_bios_init(void)
 343 {
 344     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 345     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 346     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 347     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 348     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 349
 350     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 351     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 352     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 353     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 354 }
 355
 356
 357 int load_kernel(const char *filename, uint8_t *addr,
 358                 uint8_t *real_addr)
 359 {
 360     int fd, size;
 361     int setup_sects;
 362
 363     fd = open(filename, O_RDONLY | O_BINARY);
 364     if (fd < 0)
 365         return -1;
 366
 367     /* load 16 bit code */
 368     if (read(fd, real_addr, 512) != 512)
 369         goto fail;
 370     setup_sects = real_addr[0x1F1];
 371     if (!setup_sects)
 372         setup_sects = 4;
 373     if (read(fd, real_addr + 512, setup_sects * 512) !=
 374         setup_sects * 512)
 375         goto fail;
 376
 377     /* load 32 bit code */
 378     size = read(fd, addr, 16 * 1024 * 1024);
 379     if (size < 0)
 380         goto fail;
 381     close(fd);
 382     return size;
 383  fail:
 384     close(fd);
 385     return -1;
 386 }
 387
 388 static void main_cpu_reset(void *opaque)
 389 {
 390     CPUState *env = opaque;
 391     cpu_reset(env);
 392 }
 393
 394 /*************************************************/
 395
 396 static void putb(uint8_t **pp, int val)
 397 {
 398     uint8_t *q;
 399     q = *pp;
 400     *q++ = val;
 401     *pp = q;
 402 }
 403
 404 static void putstr(uint8_t **pp, const char *str)
 405 {
 406     uint8_t *q;
 407     q = *pp;
 408     while (*str)
 409         *q++ = *str++;
 410     *pp = q;
 411 }
 412
 413 static void putle16(uint8_t **pp, int val)
 414 {
 415     uint8_t *q;
 416     q = *pp;
 417     *q++ = val;
 418     *q++ = val >> 8;
 419     *pp = q;
 420 }
 421
 422 static void putle32(uint8_t **pp, int val)
 423 {
 424     uint8_t *q;
 425     q = *pp;
 426     *q++ = val;
 427     *q++ = val >> 8;
 428     *q++ = val >> 16;
 429     *q++ = val >> 24;
 430     *pp = q;
 431 }
 432
 433 static int mpf_checksum(const uint8_t *data, int len)
 434 {
 435     int sum, i;
 436     sum = 0;
 437     for(i = 0; i < len; i++)
 438         sum += data[i];
 439     return sum & 0xff;
 440 }
 441
 442 /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
 443 static void bios_add_mptable(uint8_t *bios_data)
 444 {
 445     uint8_t *mp_config_table, *q, *float_pointer_struct;
 446     int ioapic_id, offset, i, len;
 447
 448     if (smp_cpus <= 1)
 449         return;
 450
 451     mp_config_table = bios_data + 0xb000;
 452     q = mp_config_table;
 453     putstr(&q, "PCMP"); /* "PCMP signature */
 454     putle16(&q, 0); /* table length (patched later) */
 455     putb(&q, 4); /* spec rev */
 456     putb(&q, 0); /* checksum (patched later) */
 457     putstr(&q, "QEMUCPU "); /* OEM id */
 458     putstr(&q, "0.1         "); /* vendor id */
 459     putle32(&q, 0); /* OEM table ptr */
 460     putle16(&q, 0); /* OEM table size */
 461     putle16(&q, 20); /* entry count */
 462     putle32(&q, 0xfee00000); /* local APIC addr */
 463     putle16(&q, 0); /* ext table length */
 464     putb(&q, 0); /* ext table checksum */
 465     putb(&q, 0); /* reserved */
 466
 467     for(i = 0; i < smp_cpus; i++) {
 468         putb(&q, 0); /* entry type = processor */
 469         putb(&q, i); /* APIC id */
 470         putb(&q, 0x11); /* local APIC version number */
 471         if (i == 0)
 472             putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
 473         else
 474             putb(&q, 1); /* cpu flags: enabled */
 475         putb(&q, 0); /* cpu signature */
 476         putb(&q, 6);
 477         putb(&q, 0);
 478         putb(&q, 0);
 479         putle16(&q, 0x201); /* feature flags */
 480         putle16(&q, 0);
 481
 482         putle16(&q, 0); /* reserved */
 483         putle16(&q, 0);
 484         putle16(&q, 0);
 485         putle16(&q, 0);
 486     }
 487
 488     /* isa bus */
 489     putb(&q, 1); /* entry type = bus */
 490     putb(&q, 0); /* bus ID */
 491     putstr(&q, "ISA   ");
 492
 493     /* ioapic */
 494     ioapic_id = smp_cpus;
 495     putb(&q, 2); /* entry type = I/O APIC */
 496     putb(&q, ioapic_id); /* apic ID */
 497     putb(&q, 0x11); /* I/O APIC version number */
 498     putb(&q, 1); /* enable */
 499     putle32(&q, 0xfec00000); /* I/O APIC addr */
 500
 501     /* irqs */
 502     for(i = 0; i < 16; i++) {
 503         putb(&q, 3); /* entry type = I/O interrupt */
 504         putb(&q, 0); /* interrupt type = vectored interrupt */
 505         putb(&q, 0); /* flags: po=0, el=0 */
 506         putb(&q, 0);
 507         putb(&q, 0); /* source bus ID = ISA */
 508         putb(&q, i); /* source bus IRQ */
 509         putb(&q, ioapic_id); /* dest I/O APIC ID */
 510         putb(&q, i); /* dest I/O APIC interrupt in */
 511     }
 512     /* patch length */
 513     len = q - mp_config_table;
 514     mp_config_table[4] = len;
 515     mp_config_table[5] = len >> 8;
 516
 517     mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
 518
 519     /* align to 16 */
 520     offset = q - bios_data;
 521     offset = (offset + 15) & ~15;
 522     float_pointer_struct = bios_data + offset;
 523
 524     /* floating pointer structure */
 525     q = float_pointer_struct;
 526     putstr(&q, "_MP_");
 527     /* pointer to MP config table */
 528     putle32(&q, mp_config_table - bios_data + 0x000f0000);
 529
 530     putb(&q, 1); /* length in 16 byte units */
 531     putb(&q, 4); /* MP spec revision */
 532     putb(&q, 0); /* checksum (patched later) */
 533     putb(&q, 0); /* MP feature byte 1 */
 534
 535     putb(&q, 0);
 536     putb(&q, 0);
 537     putb(&q, 0);
 538     putb(&q, 0);
 539     float_pointer_struct[10] =
 540         -mpf_checksum(float_pointer_struct, q - float_pointer_struct);
 541 }
 542
 543
 544 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 545 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 546 static const int ide_irq[2] = { 14, 15 };
 547
 548 #define NE2000_NB_MAX 6
 549
 550 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 551 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 552
 553 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 554 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 555
 556 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 557 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 558
 559 #ifdef HAS_AUDIO
 560 static void audio_init (PCIBus *pci_bus)
 561 {
 562     struct soundhw *c;
 563     int audio_enabled = 0;
 564
 565     for (c = soundhw; !audio_enabled && c->name; ++c) {
 566         audio_enabled = c->enabled;
 567     }
 568
 569     if (audio_enabled) {
 570         AudioState *s;
 571
 572         s = AUD_init ();
 573         if (s) {
 574             for (c = soundhw; c->name; ++c) {
 575                 if (c->enabled) {
 576                     if (c->isa) {
 577                         c->init.init_isa (s);
 578                     }
 579                     else {
 580                         if (pci_bus) {
 581                             c->init.init_pci (pci_bus, s);
 582                         }
 583                     }
 584                 }
 585             }
 586         }
 587     }
 588 }
 589 #endif
 590
 591 static void pc_init_ne2k_isa(NICInfo *nd)
 592 {
 593     static int nb_ne2k = 0;
 594
 595     if (nb_ne2k == NE2000_NB_MAX)
 596         return;
 597     isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
 598     nb_ne2k++;
 599 }
 600
 601 /* PC hardware initialisation */
 602 static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
 603                      DisplayState *ds, const char **fd_filename, int snapshot,
 604                      const char *kernel_filename, const char *kernel_cmdline,
 605                      const char *initrd_filename,
 606                      int pci_enabled)
 607 {
 608     char buf[1024];
 609     int ret, linux_boot, initrd_size, i;
 610     unsigned long bios_offset, vga_bios_offset;
 611     int bios_size, isa_bios_size;
 612     PCIBus *pci_bus;
 613     int piix3_devfn = -1;
 614     CPUState *env;
 615     NICInfo *nd;
 616
 617     linux_boot = (kernel_filename != NULL);
 618
 619     /* init CPUs */
 620     for(i = 0; i < smp_cpus; i++) {
 621         env = cpu_init();
 622         if (i != 0)
 623             env->hflags |= HF_HALTED_MASK;
 624         if (smp_cpus > 1) {
 625             /* XXX: enable it in all cases */
 626             env->cpuid_features |= CPUID_APIC;
 627         }
 628         register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
 629         qemu_register_reset(main_cpu_reset, env);
 630         if (pci_enabled) {
 631             apic_init(env);
 632         }
 633     }
 634
 635     /* allocate RAM */
 636     cpu_register_physical_memory(0, ram_size, 0);
 637
 638     /* BIOS load */
 639     bios_offset = ram_size + vga_ram_size;
 640     vga_bios_offset = bios_offset + 256 * 1024;
 641
 642     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 643     bios_size = get_image_size(buf);
 644     if (bios_size <= 0 ||
 645         (bios_size % 65536) != 0 ||
 646         bios_size > (256 * 1024)) {
 647         goto bios_error;
 648     }
 649     ret = load_image(buf, phys_ram_base + bios_offset);
 650     if (ret != bios_size) {
 651     bios_error:
 652         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 653         exit(1);
 654     }
 655     if (bios_size == 65536) {
 656         bios_add_mptable(phys_ram_base + bios_offset);
 657     }
 658
 659     /* VGA BIOS load */
 660     if (cirrus_vga_enabled) {
 661         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 662     } else {
 663         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 664     }
 665     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 666
 667     /* setup basic memory access */
 668     cpu_register_physical_memory(0xc0000, 0x10000,
 669                                  vga_bios_offset | IO_MEM_ROM);
 670
 671     /* map the last 128KB of the BIOS in ISA space */
 672     isa_bios_size = bios_size;
 673     if (isa_bios_size > (128 * 1024))
 674         isa_bios_size = 128 * 1024;
 675     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 676                                  IO_MEM_UNASSIGNED);
 677     cpu_register_physical_memory(0x100000 - isa_bios_size,
 678                                  isa_bios_size,
 679                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 680     /* map all the bios at the top of memory */
 681     cpu_register_physical_memory((uint32_t)(-bios_size),
 682                                  bios_size, bios_offset | IO_MEM_ROM);
 683
 684     bochs_bios_init();
 685
 686     if (linux_boot) {
 687         uint8_t bootsect[512];
 688         uint8_t old_bootsect[512];
 689
 690         if (bs_table[0] == NULL) {
 691             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 692             exit(1);
 693         }
 694         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 695         ret = load_image(buf, bootsect);
 696         if (ret != sizeof(bootsect)) {
 697             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 698                     buf);
 699             exit(1);
 700         }
 701
 702         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 703             /* copy the MSDOS partition table */
 704             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 705         }
 706
 707         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 708
 709         /* now we can load the kernel */
 710         ret = load_kernel(kernel_filename,
 711                           phys_ram_base + KERNEL_LOAD_ADDR,
 712                           phys_ram_base + KERNEL_PARAMS_ADDR);
 713         if (ret < 0) {
 714             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 715                     kernel_filename);
 716             exit(1);
 717         }
 718
 719         /* load initrd */
 720         initrd_size = 0;
 721         if (initrd_filename) {
 722             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 723             if (initrd_size < 0) {
 724                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 725                         initrd_filename);
 726                 exit(1);
 727             }
 728         }
 729         if (initrd_size > 0) {
 730             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 731             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 732         }
 733         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 734                 kernel_cmdline);
 735         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 736         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 737                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 738         /* loader type */
 739         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 740     }
 741
 742     if (pci_enabled) {
 743         pci_bus = i440fx_init();
 744         piix3_devfn = piix3_init(pci_bus);
 745     } else {
 746         pci_bus = NULL;
 747     }
 748
 749     /* init basic PC hardware */
 750     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 751
 752     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 753
 754     if (cirrus_vga_enabled) {
 755         if (pci_enabled) {
 756             pci_cirrus_vga_init(pci_bus,
 757                                 ds, phys_ram_base + ram_size, ram_size,
 758                                 vga_ram_size);
 759         } else {
 760             isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
 761                                 vga_ram_size);
 762         }
 763     } else {
 764         vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
 765                        vga_ram_size, 0, 0);
 766     }
 767
 768     rtc_state = rtc_init(0x70, 8);
 769
 770     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 771     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 772
 773     if (pci_enabled) {
 774         ioapic = ioapic_init();
 775     }
 776     isa_pic = pic_init(pic_irq_request, first_cpu);
 777     pit = pit_init(0x40, 0);
 778     pcspk_init(pit);
 779     if (pci_enabled) {
 780         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 781     }
 782
 783     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 784         if (serial_hds[i]) {
 785             serial_init(&pic_set_irq_new, isa_pic,
 786                         serial_io[i], serial_irq[i], serial_hds[i]);
 787         }
 788     }
 789
 790     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 791         if (parallel_hds[i]) {
 792             parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
 793         }
 794     }
 795
 796     for(i = 0; i < nb_nics; i++) {
 797         nd = &nd_table[i];
 798         if (!nd->model) {
 799             if (pci_enabled) {
 800                 nd->model = "ne2k_pci";
 801             } else {
 802                 nd->model = "ne2k_isa";
 803             }
 804         }
 805         if (strcmp(nd->model, "ne2k_isa") == 0) {
 806             pc_init_ne2k_isa(nd);
 807         } else if (pci_enabled) {
 808             pci_nic_init(pci_bus, nd);
 809         } else {
 810             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 811             exit(1);
 812         }
 813     }
 814
 815     if (pci_enabled) {
 816         pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
 817     } else {
 818         for(i = 0; i < 2; i++) {
 819             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 820                          bs_table[2 * i], bs_table[2 * i + 1]);
 821         }
 822     }
 823
 824     kbd_init();
 825     DMA_init(0);
 826 #ifdef HAS_AUDIO
 827     audio_init(pci_enabled ? pci_bus : NULL);
 828 #endif
 829
 830     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 831
 832     cmos_init(ram_size, boot_device, bs_table);
 833
 834     if (pci_enabled && usb_enabled) {
 835         usb_uhci_init(pci_bus, piix3_devfn + 2);
 836     }
 837
 838     if (pci_enabled && acpi_enabled) {
 839         piix4_pm_init(pci_bus, piix3_devfn + 3);
 840     }
 841     /* must be done after all PCI devices are instanciated */
 842     /* XXX: should be done in the Bochs BIOS */
 843     if (pci_enabled) {
 844         pci_bios_init();
 845         if (acpi_enabled)
 846             acpi_bios_init();
 847     }
 848 }
 849
 850 static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
 851                         DisplayState *ds, const char **fd_filename,
 852                         int snapshot,
 853                         const char *kernel_filename,
 854                         const char *kernel_cmdline,
 855                         const char *initrd_filename)
 856 {
 857     pc_init1(ram_size, vga_ram_size, boot_device,
 858              ds, fd_filename, snapshot,
 859              kernel_filename, kernel_cmdline,
 860              initrd_filename, 1);
 861 }
 862
 863 static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
 864                         DisplayState *ds, const char **fd_filename,
 865                         int snapshot,
 866                         const char *kernel_filename,
 867                         const char *kernel_cmdline,
 868                         const char *initrd_filename)
 869 {
 870     pc_init1(ram_size, vga_ram_size, boot_device,
 871              ds, fd_filename, snapshot,
 872              kernel_filename, kernel_cmdline,
 873              initrd_filename, 0);
 874 }
 875
 876 QEMUMachine pc_machine = {
 877     "pc",
 878     "Standard PC",
 879     pc_init_pci,
 880 };
 881
 882 QEMUMachine isapc_machine = {
 883     "isapc",
 884     "ISA-only PC",
 885     pc_init_isa,
 886 };