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linux-user: Add generic env variable handling
[qemu/mini2440.git] / linux-user / main.c
blob2841120430012091159f6b9130783f0dd247e19b
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <stdarg.h>
24 #include <string.h>
25 #include <errno.h>
26 #include <unistd.h>
27 #include <sys/mman.h>
28
29 #include "qemu.h"
30 #include "qemu-common.h"
31 #include "cache-utils.h"
32 /* For tb_lock */
33 #include "exec-all.h"
34
35
36 #include "envlist.h"
37
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
39
40 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
41 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
42
43 #if defined(__i386__) && !defined(CONFIG_STATIC)
44 /* Force usage of an ELF interpreter even if it is an ELF shared
45 object ! */
46 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
47 #endif
48
49 /* for recent libc, we add these dummy symbols which are not declared
50 when generating a linked object (bug in ld ?) */
51 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
52 asm(".globl __preinit_array_start\n"
53 ".globl __preinit_array_end\n"
54 ".globl __init_array_start\n"
55 ".globl __init_array_end\n"
56 ".globl __fini_array_start\n"
57 ".globl __fini_array_end\n"
58 ".section \".rodata\"\n"
59 "__preinit_array_start:\n"
60 "__preinit_array_end:\n"
61 "__init_array_start:\n"
62 "__init_array_end:\n"
63 "__fini_array_start:\n"
64 "__fini_array_end:\n"
65 ".long 0\n"
66 ".previous\n");
67 #endif
68
69 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
70 we allocate a bigger stack. Need a better solution, for example
71 by remapping the process stack directly at the right place */
72 unsigned long x86_stack_size = 512 * 1024;
73
74 void gemu_log(const char *fmt, ...)
75 {
76 va_list ap;
77
78 va_start(ap, fmt);
79 vfprintf(stderr, fmt, ap);
80 va_end(ap);
81 }
82
83 void cpu_outb(CPUState *env, int addr, int val)
84 {
85 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
86 }
87
88 void cpu_outw(CPUState *env, int addr, int val)
89 {
90 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
91 }
92
93 void cpu_outl(CPUState *env, int addr, int val)
94 {
95 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
96 }
97
98 int cpu_inb(CPUState *env, int addr)
99 {
100 fprintf(stderr, "inb: port=0x%04x\n", addr);
101 return 0;
102 }
103
104 int cpu_inw(CPUState *env, int addr)
105 {
106 fprintf(stderr, "inw: port=0x%04x\n", addr);
107 return 0;
108 }
109
110 int cpu_inl(CPUState *env, int addr)
111 {
112 fprintf(stderr, "inl: port=0x%04x\n", addr);
113 return 0;
114 }
115
116 #if defined(TARGET_I386)
117 int cpu_get_pic_interrupt(CPUState *env)
118 {
119 return -1;
120 }
121 #endif
122
123 /* timers for rdtsc */
124
125 #if 0
126
127 static uint64_t emu_time;
128
129 int64_t cpu_get_real_ticks(void)
130 {
131 return emu_time++;
132 }
133
134 #endif
135
136 #if defined(USE_NPTL)
137 /***********************************************************/
138 /* Helper routines for implementing atomic operations. */
139
140 /* To implement exclusive operations we force all cpus to syncronise.
141 We don't require a full sync, only that no cpus are executing guest code.
142 The alternative is to map target atomic ops onto host equivalents,
143 which requires quite a lot of per host/target work. */
144 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
145 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
146 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
147 static int pending_cpus;
148
149 /* Make sure everything is in a consistent state for calling fork(). */
150 void fork_start(void)
151 {
152 mmap_fork_start();
153 pthread_mutex_lock(&tb_lock);
154 pthread_mutex_lock(&exclusive_lock);
155 }
156
157 void fork_end(int child)
158 {
159 if (child) {
160 /* Child processes created by fork() only have a single thread.
161 Discard information about the parent threads. */
162 first_cpu = thread_env;
163 thread_env->next_cpu = NULL;
164 pending_cpus = 0;
165 pthread_mutex_init(&exclusive_lock, NULL);
166 pthread_cond_init(&exclusive_cond, NULL);
167 pthread_cond_init(&exclusive_resume, NULL);
168 pthread_mutex_init(&tb_lock, NULL);
169 gdbserver_fork(thread_env);
170 } else {
171 pthread_mutex_unlock(&exclusive_lock);
172 pthread_mutex_unlock(&tb_lock);
173 }
174 mmap_fork_end(child);
175 }
176
177 /* Wait for pending exclusive operations to complete. The exclusive lock
178 must be held. */
179 static inline void exclusive_idle(void)
180 {
181 while (pending_cpus) {
182 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
183 }
184 }
185
186 /* Start an exclusive operation.
187 Must only be called from outside cpu_arm_exec. */
188 static inline void start_exclusive(void)
189 {
190 CPUState *other;
191 pthread_mutex_lock(&exclusive_lock);
192 exclusive_idle();
193
194 pending_cpus = 1;
195 /* Make all other cpus stop executing. */
196 for (other = first_cpu; other; other = other->next_cpu) {
197 if (other->running) {
198 pending_cpus++;
199 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
200 }
201 }
202 if (pending_cpus > 1) {
203 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
204 }
205 }
206
207 /* Finish an exclusive operation. */
208 static inline void end_exclusive(void)
209 {
210 pending_cpus = 0;
211 pthread_cond_broadcast(&exclusive_resume);
212 pthread_mutex_unlock(&exclusive_lock);
213 }
214
215 /* Wait for exclusive ops to finish, and begin cpu execution. */
216 static inline void cpu_exec_start(CPUState *env)
217 {
218 pthread_mutex_lock(&exclusive_lock);
219 exclusive_idle();
220 env->running = 1;
221 pthread_mutex_unlock(&exclusive_lock);
222 }
223
224 /* Mark cpu as not executing, and release pending exclusive ops. */
225 static inline void cpu_exec_end(CPUState *env)
226 {
227 pthread_mutex_lock(&exclusive_lock);
228 env->running = 0;
229 if (pending_cpus > 1) {
230 pending_cpus--;
231 if (pending_cpus == 1) {
232 pthread_cond_signal(&exclusive_cond);
233 }
234 }
235 exclusive_idle();
236 pthread_mutex_unlock(&exclusive_lock);
237 }
238 #else /* if !USE_NPTL */
239 /* These are no-ops because we are not threadsafe. */
240 static inline void cpu_exec_start(CPUState *env)
241 {
242 }
243
244 static inline void cpu_exec_end(CPUState *env)
245 {
246 }
247
248 static inline void start_exclusive(void)
249 {
250 }
251
252 static inline void end_exclusive(void)
253 {
254 }
255
256 void fork_start(void)
257 {
258 }
259
260 void fork_end(int child)
261 {
262 if (child) {
263 gdbserver_fork(thread_env);
264 }
265 }
266 #endif
267
268
269 #ifdef TARGET_I386
270 /***********************************************************/
271 /* CPUX86 core interface */
272
273 void cpu_smm_update(CPUState *env)
274 {
275 }
276
277 uint64_t cpu_get_tsc(CPUX86State *env)
278 {
279 return cpu_get_real_ticks();
280 }
281
282 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
283 int flags)
284 {
285 unsigned int e1, e2;
286 uint32_t *p;
287 e1 = (addr << 16) | (limit & 0xffff);
288 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
289 e2 |= flags;
290 p = ptr;
291 p[0] = tswap32(e1);
292 p[1] = tswap32(e2);
293 }
294
295 static uint64_t *idt_table;
296 #ifdef TARGET_X86_64
297 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
298 uint64_t addr, unsigned int sel)
299 {
300 uint32_t *p, e1, e2;
301 e1 = (addr & 0xffff) | (sel << 16);
302 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
303 p = ptr;
304 p[0] = tswap32(e1);
305 p[1] = tswap32(e2);
306 p[2] = tswap32(addr >> 32);
307 p[3] = 0;
308 }
309 /* only dpl matters as we do only user space emulation */
310 static void set_idt(int n, unsigned int dpl)
311 {
312 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
313 }
314 #else
315 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
316 uint32_t addr, unsigned int sel)
317 {
318 uint32_t *p, e1, e2;
319 e1 = (addr & 0xffff) | (sel << 16);
320 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
321 p = ptr;
322 p[0] = tswap32(e1);
323 p[1] = tswap32(e2);
324 }
325
326 /* only dpl matters as we do only user space emulation */
327 static void set_idt(int n, unsigned int dpl)
328 {
329 set_gate(idt_table + n, 0, dpl, 0, 0);
330 }
331 #endif
332
333 void cpu_loop(CPUX86State *env)
334 {
335 int trapnr;
336 abi_ulong pc;
337 target_siginfo_t info;
338
339 for(;;) {
340 trapnr = cpu_x86_exec(env);
341 switch(trapnr) {
342 case 0x80:
343 /* linux syscall from int $0x80 */
344 env->regs[R_EAX] = do_syscall(env,
345 env->regs[R_EAX],
346 env->regs[R_EBX],
347 env->regs[R_ECX],
348 env->regs[R_EDX],
349 env->regs[R_ESI],
350 env->regs[R_EDI],
351 env->regs[R_EBP]);
352 break;
353 #ifndef TARGET_ABI32
354 case EXCP_SYSCALL:
355 /* linux syscall from syscall intruction */
356 env->regs[R_EAX] = do_syscall(env,
357 env->regs[R_EAX],
358 env->regs[R_EDI],
359 env->regs[R_ESI],
360 env->regs[R_EDX],
361 env->regs[10],
362 env->regs[8],
363 env->regs[9]);
364 env->eip = env->exception_next_eip;
365 break;
366 #endif
367 case EXCP0B_NOSEG:
368 case EXCP0C_STACK:
369 info.si_signo = SIGBUS;
370 info.si_errno = 0;
371 info.si_code = TARGET_SI_KERNEL;
372 info._sifields._sigfault._addr = 0;
373 queue_signal(env, info.si_signo, &info);
374 break;
375 case EXCP0D_GPF:
376 /* XXX: potential problem if ABI32 */
377 #ifndef TARGET_X86_64
378 if (env->eflags & VM_MASK) {
379 handle_vm86_fault(env);
380 } else
381 #endif
382 {
383 info.si_signo = SIGSEGV;
384 info.si_errno = 0;
385 info.si_code = TARGET_SI_KERNEL;
386 info._sifields._sigfault._addr = 0;
387 queue_signal(env, info.si_signo, &info);
388 }
389 break;
390 case EXCP0E_PAGE:
391 info.si_signo = SIGSEGV;
392 info.si_errno = 0;
393 if (!(env->error_code & 1))
394 info.si_code = TARGET_SEGV_MAPERR;
395 else
396 info.si_code = TARGET_SEGV_ACCERR;
397 info._sifields._sigfault._addr = env->cr[2];
398 queue_signal(env, info.si_signo, &info);
399 break;
400 case EXCP00_DIVZ:
401 #ifndef TARGET_X86_64
402 if (env->eflags & VM_MASK) {
403 handle_vm86_trap(env, trapnr);
404 } else
405 #endif
406 {
407 /* division by zero */
408 info.si_signo = SIGFPE;
409 info.si_errno = 0;
410 info.si_code = TARGET_FPE_INTDIV;
411 info._sifields._sigfault._addr = env->eip;
412 queue_signal(env, info.si_signo, &info);
413 }
414 break;
415 case EXCP01_DB:
416 case EXCP03_INT3:
417 #ifndef TARGET_X86_64
418 if (env->eflags & VM_MASK) {
419 handle_vm86_trap(env, trapnr);
420 } else
421 #endif
422 {
423 info.si_signo = SIGTRAP;
424 info.si_errno = 0;
425 if (trapnr == EXCP01_DB) {
426 info.si_code = TARGET_TRAP_BRKPT;
427 info._sifields._sigfault._addr = env->eip;
428 } else {
429 info.si_code = TARGET_SI_KERNEL;
430 info._sifields._sigfault._addr = 0;
431 }
432 queue_signal(env, info.si_signo, &info);
433 }
434 break;
435 case EXCP04_INTO:
436 case EXCP05_BOUND:
437 #ifndef TARGET_X86_64
438 if (env->eflags & VM_MASK) {
439 handle_vm86_trap(env, trapnr);
440 } else
441 #endif
442 {
443 info.si_signo = SIGSEGV;
444 info.si_errno = 0;
445 info.si_code = TARGET_SI_KERNEL;
446 info._sifields._sigfault._addr = 0;
447 queue_signal(env, info.si_signo, &info);
448 }
449 break;
450 case EXCP06_ILLOP:
451 info.si_signo = SIGILL;
452 info.si_errno = 0;
453 info.si_code = TARGET_ILL_ILLOPN;
454 info._sifields._sigfault._addr = env->eip;
455 queue_signal(env, info.si_signo, &info);
456 break;
457 case EXCP_INTERRUPT:
458 /* just indicate that signals should be handled asap */
459 break;
460 case EXCP_DEBUG:
461 {
462 int sig;
463
464 sig = gdb_handlesig (env, TARGET_SIGTRAP);
465 if (sig)
466 {
467 info.si_signo = sig;
468 info.si_errno = 0;
469 info.si_code = TARGET_TRAP_BRKPT;
470 queue_signal(env, info.si_signo, &info);
471 }
472 }
473 break;
474 default:
475 pc = env->segs[R_CS].base + env->eip;
476 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
477 (long)pc, trapnr);
478 abort();
479 }
480 process_pending_signals(env);
481 }
482 }
483 #endif
484
485 #ifdef TARGET_ARM
486
487 static void arm_cache_flush(abi_ulong start, abi_ulong last)
488 {
489 abi_ulong addr, last1;
490
491 if (last < start)
492 return;
493 addr = start;
494 for(;;) {
495 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
496 if (last1 > last)
497 last1 = last;
498 tb_invalidate_page_range(addr, last1 + 1);
499 if (last1 == last)
500 break;
501 addr = last1 + 1;
502 }
503 }
504
505 /* Handle a jump to the kernel code page. */
506 static int
507 do_kernel_trap(CPUARMState *env)
508 {
509 uint32_t addr;
510 uint32_t cpsr;
511 uint32_t val;
512
513 switch (env->regs[15]) {
514 case 0xffff0fa0: /* __kernel_memory_barrier */
515 /* ??? No-op. Will need to do better for SMP. */
516 break;
517 case 0xffff0fc0: /* __kernel_cmpxchg */
518 /* XXX: This only works between threads, not between processes.
519 It's probably possible to implement this with native host
520 operations. However things like ldrex/strex are much harder so
521 there's not much point trying. */
522 start_exclusive();
523 cpsr = cpsr_read(env);
524 addr = env->regs[2];
525 /* FIXME: This should SEGV if the access fails. */
526 if (get_user_u32(val, addr))
527 val = ~env->regs[0];
528 if (val == env->regs[0]) {
529 val = env->regs[1];
530 /* FIXME: Check for segfaults. */
531 put_user_u32(val, addr);
532 env->regs[0] = 0;
533 cpsr |= CPSR_C;
534 } else {
535 env->regs[0] = -1;
536 cpsr &= ~CPSR_C;
537 }
538 cpsr_write(env, cpsr, CPSR_C);
539 end_exclusive();
540 break;
541 case 0xffff0fe0: /* __kernel_get_tls */
542 env->regs[0] = env->cp15.c13_tls2;
543 break;
544 default:
545 return 1;
546 }
547 /* Jump back to the caller. */
548 addr = env->regs[14];
549 if (addr & 1) {
550 env->thumb = 1;
551 addr &= ~1;
552 }
553 env->regs[15] = addr;
554
555 return 0;
556 }
557
558 void cpu_loop(CPUARMState *env)
559 {
560 int trapnr;
561 unsigned int n, insn;
562 target_siginfo_t info;
563 uint32_t addr;
564
565 for(;;) {
566 cpu_exec_start(env);
567 trapnr = cpu_arm_exec(env);
568 cpu_exec_end(env);
569 switch(trapnr) {
570 case EXCP_UDEF:
571 {
572 TaskState *ts = env->opaque;
573 uint32_t opcode;
574 int rc;
575
576 /* we handle the FPU emulation here, as Linux */
577 /* we get the opcode */
578 /* FIXME - what to do if get_user() fails? */
579 get_user_u32(opcode, env->regs[15]);
580
581 rc = EmulateAll(opcode, &ts->fpa, env);
582 if (rc == 0) { /* illegal instruction */
583 info.si_signo = SIGILL;
584 info.si_errno = 0;
585 info.si_code = TARGET_ILL_ILLOPN;
586 info._sifields._sigfault._addr = env->regs[15];
587 queue_signal(env, info.si_signo, &info);
588 } else if (rc < 0) { /* FP exception */
589 int arm_fpe=0;
590
591 /* translate softfloat flags to FPSR flags */
592 if (-rc & float_flag_invalid)
593 arm_fpe |= BIT_IOC;
594 if (-rc & float_flag_divbyzero)
595 arm_fpe |= BIT_DZC;
596 if (-rc & float_flag_overflow)
597 arm_fpe |= BIT_OFC;
598 if (-rc & float_flag_underflow)
599 arm_fpe |= BIT_UFC;
600 if (-rc & float_flag_inexact)
601 arm_fpe |= BIT_IXC;
602
603 FPSR fpsr = ts->fpa.fpsr;
604 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
605
606 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
607 info.si_signo = SIGFPE;
608 info.si_errno = 0;
609
610 /* ordered by priority, least first */
611 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
612 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
613 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
614 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
615 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
616
617 info._sifields._sigfault._addr = env->regs[15];
618 queue_signal(env, info.si_signo, &info);
619 } else {
620 env->regs[15] += 4;
621 }
622
623 /* accumulate unenabled exceptions */
624 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
625 fpsr |= BIT_IXC;
626 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
627 fpsr |= BIT_UFC;
628 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
629 fpsr |= BIT_OFC;
630 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
631 fpsr |= BIT_DZC;
632 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
633 fpsr |= BIT_IOC;
634 ts->fpa.fpsr=fpsr;
635 } else { /* everything OK */
636 /* increment PC */
637 env->regs[15] += 4;
638 }
639 }
640 break;
641 case EXCP_SWI:
642 case EXCP_BKPT:
643 {
644 env->eabi = 1;
645 /* system call */
646 if (trapnr == EXCP_BKPT) {
647 if (env->thumb) {
648 /* FIXME - what to do if get_user() fails? */
649 get_user_u16(insn, env->regs[15]);
650 n = insn & 0xff;
651 env->regs[15] += 2;
652 } else {
653 /* FIXME - what to do if get_user() fails? */
654 get_user_u32(insn, env->regs[15]);
655 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
656 env->regs[15] += 4;
657 }
658 } else {
659 if (env->thumb) {
660 /* FIXME - what to do if get_user() fails? */
661 get_user_u16(insn, env->regs[15] - 2);
662 n = insn & 0xff;
663 } else {
664 /* FIXME - what to do if get_user() fails? */
665 get_user_u32(insn, env->regs[15] - 4);
666 n = insn & 0xffffff;
667 }
668 }
669
670 if (n == ARM_NR_cacheflush) {
671 arm_cache_flush(env->regs[0], env->regs[1]);
672 } else if (n == ARM_NR_semihosting
673 || n == ARM_NR_thumb_semihosting) {
674 env->regs[0] = do_arm_semihosting (env);
675 } else if (n == 0 || n >= ARM_SYSCALL_BASE
676 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
677 /* linux syscall */
678 if (env->thumb || n == 0) {
679 n = env->regs[7];
680 } else {
681 n -= ARM_SYSCALL_BASE;
682 env->eabi = 0;
683 }
684 if ( n > ARM_NR_BASE) {
685 switch (n) {
686 case ARM_NR_cacheflush:
687 arm_cache_flush(env->regs[0], env->regs[1]);
688 break;
689 case ARM_NR_set_tls:
690 cpu_set_tls(env, env->regs[0]);
691 env->regs[0] = 0;
692 break;
693 default:
694 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
695 n);
696 env->regs[0] = -TARGET_ENOSYS;
697 break;
698 }
699 } else {
700 env->regs[0] = do_syscall(env,
701 n,
702 env->regs[0],
703 env->regs[1],
704 env->regs[2],
705 env->regs[3],
706 env->regs[4],
707 env->regs[5]);
708 }
709 } else {
710 goto error;
711 }
712 }
713 break;
714 case EXCP_INTERRUPT:
715 /* just indicate that signals should be handled asap */
716 break;
717 case EXCP_PREFETCH_ABORT:
718 addr = env->cp15.c6_insn;
719 goto do_segv;
720 case EXCP_DATA_ABORT:
721 addr = env->cp15.c6_data;
722 goto do_segv;
723 do_segv:
724 {
725 info.si_signo = SIGSEGV;
726 info.si_errno = 0;
727 /* XXX: check env->error_code */
728 info.si_code = TARGET_SEGV_MAPERR;
729 info._sifields._sigfault._addr = addr;
730 queue_signal(env, info.si_signo, &info);
731 }
732 break;
733 case EXCP_DEBUG:
734 {
735 int sig;
736
737 sig = gdb_handlesig (env, TARGET_SIGTRAP);
738 if (sig)
739 {
740 info.si_signo = sig;
741 info.si_errno = 0;
742 info.si_code = TARGET_TRAP_BRKPT;
743 queue_signal(env, info.si_signo, &info);
744 }
745 }
746 break;
747 case EXCP_KERNEL_TRAP:
748 if (do_kernel_trap(env))
749 goto error;
750 break;
751 default:
752 error:
753 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
754 trapnr);
755 cpu_dump_state(env, stderr, fprintf, 0);
756 abort();
757 }
758 process_pending_signals(env);
759 }
760 }
761
762 #endif
763
764 #ifdef TARGET_SPARC
765 #define SPARC64_STACK_BIAS 2047
766
767 //#define DEBUG_WIN
768
769 /* WARNING: dealing with register windows _is_ complicated. More info
770 can be found at http://www.sics.se/~psm/sparcstack.html */
771 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
772 {
773 index = (index + cwp * 16) % (16 * env->nwindows);
774 /* wrap handling : if cwp is on the last window, then we use the
775 registers 'after' the end */
776 if (index < 8 && env->cwp == env->nwindows - 1)
777 index += 16 * env->nwindows;
778 return index;
779 }
780
781 /* save the register window 'cwp1' */
782 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
783 {
784 unsigned int i;
785 abi_ulong sp_ptr;
786
787 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
788 #ifdef TARGET_SPARC64
789 if (sp_ptr & 3)
790 sp_ptr += SPARC64_STACK_BIAS;
791 #endif
792 #if defined(DEBUG_WIN)
793 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
794 sp_ptr, cwp1);
795 #endif
796 for(i = 0; i < 16; i++) {
797 /* FIXME - what to do if put_user() fails? */
798 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
799 sp_ptr += sizeof(abi_ulong);
800 }
801 }
802
803 static void save_window(CPUSPARCState *env)
804 {
805 #ifndef TARGET_SPARC64
806 unsigned int new_wim;
807 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
808 ((1LL << env->nwindows) - 1);
809 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
810 env->wim = new_wim;
811 #else
812 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
813 env->cansave++;
814 env->canrestore--;
815 #endif
816 }
817
818 static void restore_window(CPUSPARCState *env)
819 {
820 #ifndef TARGET_SPARC64
821 unsigned int new_wim;
822 #endif
823 unsigned int i, cwp1;
824 abi_ulong sp_ptr;
825
826 #ifndef TARGET_SPARC64
827 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
828 ((1LL << env->nwindows) - 1);
829 #endif
830
831 /* restore the invalid window */
832 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
833 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
834 #ifdef TARGET_SPARC64
835 if (sp_ptr & 3)
836 sp_ptr += SPARC64_STACK_BIAS;
837 #endif
838 #if defined(DEBUG_WIN)
839 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
840 sp_ptr, cwp1);
841 #endif
842 for(i = 0; i < 16; i++) {
843 /* FIXME - what to do if get_user() fails? */
844 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
845 sp_ptr += sizeof(abi_ulong);
846 }
847 #ifdef TARGET_SPARC64
848 env->canrestore++;
849 if (env->cleanwin < env->nwindows - 1)
850 env->cleanwin++;
851 env->cansave--;
852 #else
853 env->wim = new_wim;
854 #endif
855 }
856
857 static void flush_windows(CPUSPARCState *env)
858 {
859 int offset, cwp1;
860
861 offset = 1;
862 for(;;) {
863 /* if restore would invoke restore_window(), then we can stop */
864 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
865 #ifndef TARGET_SPARC64
866 if (env->wim & (1 << cwp1))
867 break;
868 #else
869 if (env->canrestore == 0)
870 break;
871 env->cansave++;
872 env->canrestore--;
873 #endif
874 save_window_offset(env, cwp1);
875 offset++;
876 }
877 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
878 #ifndef TARGET_SPARC64
879 /* set wim so that restore will reload the registers */
880 env->wim = 1 << cwp1;
881 #endif
882 #if defined(DEBUG_WIN)
883 printf("flush_windows: nb=%d\n", offset - 1);
884 #endif
885 }
886
887 void cpu_loop (CPUSPARCState *env)
888 {
889 int trapnr, ret;
890 target_siginfo_t info;
891
892 while (1) {
893 trapnr = cpu_sparc_exec (env);
894
895 switch (trapnr) {
896 #ifndef TARGET_SPARC64
897 case 0x88:
898 case 0x90:
899 #else
900 case 0x110:
901 case 0x16d:
902 #endif
903 ret = do_syscall (env, env->gregs[1],
904 env->regwptr[0], env->regwptr[1],
905 env->regwptr[2], env->regwptr[3],
906 env->regwptr[4], env->regwptr[5]);
907 if ((unsigned int)ret >= (unsigned int)(-515)) {
908 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
909 env->xcc |= PSR_CARRY;
910 #else
911 env->psr |= PSR_CARRY;
912 #endif
913 ret = -ret;
914 } else {
915 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
916 env->xcc &= ~PSR_CARRY;
917 #else
918 env->psr &= ~PSR_CARRY;
919 #endif
920 }
921 env->regwptr[0] = ret;
922 /* next instruction */
923 env->pc = env->npc;
924 env->npc = env->npc + 4;
925 break;
926 case 0x83: /* flush windows */
927 #ifdef TARGET_ABI32
928 case 0x103:
929 #endif
930 flush_windows(env);
931 /* next instruction */
932 env->pc = env->npc;
933 env->npc = env->npc + 4;
934 break;
935 #ifndef TARGET_SPARC64
936 case TT_WIN_OVF: /* window overflow */
937 save_window(env);
938 break;
939 case TT_WIN_UNF: /* window underflow */
940 restore_window(env);
941 break;
942 case TT_TFAULT:
943 case TT_DFAULT:
944 {
945 info.si_signo = SIGSEGV;
946 info.si_errno = 0;
947 /* XXX: check env->error_code */
948 info.si_code = TARGET_SEGV_MAPERR;
949 info._sifields._sigfault._addr = env->mmuregs[4];
950 queue_signal(env, info.si_signo, &info);
951 }
952 break;
953 #else
954 case TT_SPILL: /* window overflow */
955 save_window(env);
956 break;
957 case TT_FILL: /* window underflow */
958 restore_window(env);
959 break;
960 case TT_TFAULT:
961 case TT_DFAULT:
962 {
963 info.si_signo = SIGSEGV;
964 info.si_errno = 0;
965 /* XXX: check env->error_code */
966 info.si_code = TARGET_SEGV_MAPERR;
967 if (trapnr == TT_DFAULT)
968 info._sifields._sigfault._addr = env->dmmuregs[4];
969 else
970 info._sifields._sigfault._addr = env->tsptr->tpc;
971 queue_signal(env, info.si_signo, &info);
972 }
973 break;
974 #ifndef TARGET_ABI32
975 case 0x16e:
976 flush_windows(env);
977 sparc64_get_context(env);
978 break;
979 case 0x16f:
980 flush_windows(env);
981 sparc64_set_context(env);
982 break;
983 #endif
984 #endif
985 case EXCP_INTERRUPT:
986 /* just indicate that signals should be handled asap */
987 break;
988 case EXCP_DEBUG:
989 {
990 int sig;
991
992 sig = gdb_handlesig (env, TARGET_SIGTRAP);
993 if (sig)
994 {
995 info.si_signo = sig;
996 info.si_errno = 0;
997 info.si_code = TARGET_TRAP_BRKPT;
998 queue_signal(env, info.si_signo, &info);
999 }
1000 }
1001 break;
1002 default:
1003 printf ("Unhandled trap: 0x%x\n", trapnr);
1004 cpu_dump_state(env, stderr, fprintf, 0);
1005 exit (1);
1006 }
1007 process_pending_signals (env);
1008 }
1009 }
1010
1011 #endif
1012
1013 #ifdef TARGET_PPC
1014 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1015 {
1016 /* TO FIX */
1017 return 0;
1018 }
1019
1020 uint32_t cpu_ppc_load_tbl (CPUState *env)
1021 {
1022 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1023 }
1024
1025 uint32_t cpu_ppc_load_tbu (CPUState *env)
1026 {
1027 return cpu_ppc_get_tb(env) >> 32;
1028 }
1029
1030 uint32_t cpu_ppc_load_atbl (CPUState *env)
1031 {
1032 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1033 }
1034
1035 uint32_t cpu_ppc_load_atbu (CPUState *env)
1036 {
1037 return cpu_ppc_get_tb(env) >> 32;
1038 }
1039
1040 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1041 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1042
1043 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1044 {
1045 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1046 }
1047
1048 /* XXX: to be fixed */
1049 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1050 {
1051 return -1;
1052 }
1053
1054 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1055 {
1056 return -1;
1057 }
1058
1059 #define EXCP_DUMP(env, fmt, args...) \
1060 do { \
1061 fprintf(stderr, fmt , ##args); \
1062 cpu_dump_state(env, stderr, fprintf, 0); \
1063 qemu_log(fmt, ##args); \
1064 log_cpu_state(env, 0); \
1065 } while (0)
1066
1067 void cpu_loop(CPUPPCState *env)
1068 {
1069 target_siginfo_t info;
1070 int trapnr;
1071 uint32_t ret;
1072
1073 for(;;) {
1074 trapnr = cpu_ppc_exec(env);
1075 switch(trapnr) {
1076 case POWERPC_EXCP_NONE:
1077 /* Just go on */
1078 break;
1079 case POWERPC_EXCP_CRITICAL: /* Critical input */
1080 cpu_abort(env, "Critical interrupt while in user mode. "
1081 "Aborting\n");
1082 break;
1083 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1084 cpu_abort(env, "Machine check exception while in user mode. "
1085 "Aborting\n");
1086 break;
1087 case POWERPC_EXCP_DSI: /* Data storage exception */
1088 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1089 env->spr[SPR_DAR]);
1090 /* XXX: check this. Seems bugged */
1091 switch (env->error_code & 0xFF000000) {
1092 case 0x40000000:
1093 info.si_signo = TARGET_SIGSEGV;
1094 info.si_errno = 0;
1095 info.si_code = TARGET_SEGV_MAPERR;
1096 break;
1097 case 0x04000000:
1098 info.si_signo = TARGET_SIGILL;
1099 info.si_errno = 0;
1100 info.si_code = TARGET_ILL_ILLADR;
1101 break;
1102 case 0x08000000:
1103 info.si_signo = TARGET_SIGSEGV;
1104 info.si_errno = 0;
1105 info.si_code = TARGET_SEGV_ACCERR;
1106 break;
1107 default:
1108 /* Let's send a regular segfault... */
1109 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1110 env->error_code);
1111 info.si_signo = TARGET_SIGSEGV;
1112 info.si_errno = 0;
1113 info.si_code = TARGET_SEGV_MAPERR;
1114 break;
1115 }
1116 info._sifields._sigfault._addr = env->nip;
1117 queue_signal(env, info.si_signo, &info);
1118 break;
1119 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1120 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1121 env->spr[SPR_SRR0]);
1122 /* XXX: check this */
1123 switch (env->error_code & 0xFF000000) {
1124 case 0x40000000:
1125 info.si_signo = TARGET_SIGSEGV;
1126 info.si_errno = 0;
1127 info.si_code = TARGET_SEGV_MAPERR;
1128 break;
1129 case 0x10000000:
1130 case 0x08000000:
1131 info.si_signo = TARGET_SIGSEGV;
1132 info.si_errno = 0;
1133 info.si_code = TARGET_SEGV_ACCERR;
1134 break;
1135 default:
1136 /* Let's send a regular segfault... */
1137 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1138 env->error_code);
1139 info.si_signo = TARGET_SIGSEGV;
1140 info.si_errno = 0;
1141 info.si_code = TARGET_SEGV_MAPERR;
1142 break;
1143 }
1144 info._sifields._sigfault._addr = env->nip - 4;
1145 queue_signal(env, info.si_signo, &info);
1146 break;
1147 case POWERPC_EXCP_EXTERNAL: /* External input */
1148 cpu_abort(env, "External interrupt while in user mode. "
1149 "Aborting\n");
1150 break;
1151 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1152 EXCP_DUMP(env, "Unaligned memory access\n");
1153 /* XXX: check this */
1154 info.si_signo = TARGET_SIGBUS;
1155 info.si_errno = 0;
1156 info.si_code = TARGET_BUS_ADRALN;
1157 info._sifields._sigfault._addr = env->nip - 4;
1158 queue_signal(env, info.si_signo, &info);
1159 break;
1160 case POWERPC_EXCP_PROGRAM: /* Program exception */
1161 /* XXX: check this */
1162 switch (env->error_code & ~0xF) {
1163 case POWERPC_EXCP_FP:
1164 EXCP_DUMP(env, "Floating point program exception\n");
1165 info.si_signo = TARGET_SIGFPE;
1166 info.si_errno = 0;
1167 switch (env->error_code & 0xF) {
1168 case POWERPC_EXCP_FP_OX:
1169 info.si_code = TARGET_FPE_FLTOVF;
1170 break;
1171 case POWERPC_EXCP_FP_UX:
1172 info.si_code = TARGET_FPE_FLTUND;
1173 break;
1174 case POWERPC_EXCP_FP_ZX:
1175 case POWERPC_EXCP_FP_VXZDZ:
1176 info.si_code = TARGET_FPE_FLTDIV;
1177 break;
1178 case POWERPC_EXCP_FP_XX:
1179 info.si_code = TARGET_FPE_FLTRES;
1180 break;
1181 case POWERPC_EXCP_FP_VXSOFT:
1182 info.si_code = TARGET_FPE_FLTINV;
1183 break;
1184 case POWERPC_EXCP_FP_VXSNAN:
1185 case POWERPC_EXCP_FP_VXISI:
1186 case POWERPC_EXCP_FP_VXIDI:
1187 case POWERPC_EXCP_FP_VXIMZ:
1188 case POWERPC_EXCP_FP_VXVC:
1189 case POWERPC_EXCP_FP_VXSQRT:
1190 case POWERPC_EXCP_FP_VXCVI:
1191 info.si_code = TARGET_FPE_FLTSUB;
1192 break;
1193 default:
1194 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1195 env->error_code);
1196 break;
1197 }
1198 break;
1199 case POWERPC_EXCP_INVAL:
1200 EXCP_DUMP(env, "Invalid instruction\n");
1201 info.si_signo = TARGET_SIGILL;
1202 info.si_errno = 0;
1203 switch (env->error_code & 0xF) {
1204 case POWERPC_EXCP_INVAL_INVAL:
1205 info.si_code = TARGET_ILL_ILLOPC;
1206 break;
1207 case POWERPC_EXCP_INVAL_LSWX:
1208 info.si_code = TARGET_ILL_ILLOPN;
1209 break;
1210 case POWERPC_EXCP_INVAL_SPR:
1211 info.si_code = TARGET_ILL_PRVREG;
1212 break;
1213 case POWERPC_EXCP_INVAL_FP:
1214 info.si_code = TARGET_ILL_COPROC;
1215 break;
1216 default:
1217 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1218 env->error_code & 0xF);
1219 info.si_code = TARGET_ILL_ILLADR;
1220 break;
1221 }
1222 break;
1223 case POWERPC_EXCP_PRIV:
1224 EXCP_DUMP(env, "Privilege violation\n");
1225 info.si_signo = TARGET_SIGILL;
1226 info.si_errno = 0;
1227 switch (env->error_code & 0xF) {
1228 case POWERPC_EXCP_PRIV_OPC:
1229 info.si_code = TARGET_ILL_PRVOPC;
1230 break;
1231 case POWERPC_EXCP_PRIV_REG:
1232 info.si_code = TARGET_ILL_PRVREG;
1233 break;
1234 default:
1235 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1236 env->error_code & 0xF);
1237 info.si_code = TARGET_ILL_PRVOPC;
1238 break;
1239 }
1240 break;
1241 case POWERPC_EXCP_TRAP:
1242 cpu_abort(env, "Tried to call a TRAP\n");
1243 break;
1244 default:
1245 /* Should not happen ! */
1246 cpu_abort(env, "Unknown program exception (%02x)\n",
1247 env->error_code);
1248 break;
1249 }
1250 info._sifields._sigfault._addr = env->nip - 4;
1251 queue_signal(env, info.si_signo, &info);
1252 break;
1253 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1254 EXCP_DUMP(env, "No floating point allowed\n");
1255 info.si_signo = TARGET_SIGILL;
1256 info.si_errno = 0;
1257 info.si_code = TARGET_ILL_COPROC;
1258 info._sifields._sigfault._addr = env->nip - 4;
1259 queue_signal(env, info.si_signo, &info);
1260 break;
1261 case POWERPC_EXCP_SYSCALL: /* System call exception */
1262 cpu_abort(env, "Syscall exception while in user mode. "
1263 "Aborting\n");
1264 break;
1265 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1266 EXCP_DUMP(env, "No APU instruction allowed\n");
1267 info.si_signo = TARGET_SIGILL;
1268 info.si_errno = 0;
1269 info.si_code = TARGET_ILL_COPROC;
1270 info._sifields._sigfault._addr = env->nip - 4;
1271 queue_signal(env, info.si_signo, &info);
1272 break;
1273 case POWERPC_EXCP_DECR: /* Decrementer exception */
1274 cpu_abort(env, "Decrementer interrupt while in user mode. "
1275 "Aborting\n");
1276 break;
1277 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1278 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1279 "Aborting\n");
1280 break;
1281 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1282 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1283 "Aborting\n");
1284 break;
1285 case POWERPC_EXCP_DTLB: /* Data TLB error */
1286 cpu_abort(env, "Data TLB exception while in user mode. "
1287 "Aborting\n");
1288 break;
1289 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1290 cpu_abort(env, "Instruction TLB exception while in user mode. "
1291 "Aborting\n");
1292 break;
1293 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1294 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1295 info.si_signo = TARGET_SIGILL;
1296 info.si_errno = 0;
1297 info.si_code = TARGET_ILL_COPROC;
1298 info._sifields._sigfault._addr = env->nip - 4;
1299 queue_signal(env, info.si_signo, &info);
1300 break;
1301 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1302 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1303 break;
1304 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1305 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1306 break;
1307 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1308 cpu_abort(env, "Performance monitor exception not handled\n");
1309 break;
1310 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1311 cpu_abort(env, "Doorbell interrupt while in user mode. "
1312 "Aborting\n");
1313 break;
1314 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1315 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1316 "Aborting\n");
1317 break;
1318 case POWERPC_EXCP_RESET: /* System reset exception */
1319 cpu_abort(env, "Reset interrupt while in user mode. "
1320 "Aborting\n");
1321 break;
1322 case POWERPC_EXCP_DSEG: /* Data segment exception */
1323 cpu_abort(env, "Data segment exception while in user mode. "
1324 "Aborting\n");
1325 break;
1326 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1327 cpu_abort(env, "Instruction segment exception "
1328 "while in user mode. Aborting\n");
1329 break;
1330 /* PowerPC 64 with hypervisor mode support */
1331 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1332 cpu_abort(env, "Hypervisor decrementer interrupt "
1333 "while in user mode. Aborting\n");
1334 break;
1335 case POWERPC_EXCP_TRACE: /* Trace exception */
1336 /* Nothing to do:
1337 * we use this exception to emulate step-by-step execution mode.
1338 */
1339 break;
1340 /* PowerPC 64 with hypervisor mode support */
1341 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1342 cpu_abort(env, "Hypervisor data storage exception "
1343 "while in user mode. Aborting\n");
1344 break;
1345 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1346 cpu_abort(env, "Hypervisor instruction storage exception "
1347 "while in user mode. Aborting\n");
1348 break;
1349 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1350 cpu_abort(env, "Hypervisor data segment exception "
1351 "while in user mode. Aborting\n");
1352 break;
1353 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1354 cpu_abort(env, "Hypervisor instruction segment exception "
1355 "while in user mode. Aborting\n");
1356 break;
1357 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1358 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1359 info.si_signo = TARGET_SIGILL;
1360 info.si_errno = 0;
1361 info.si_code = TARGET_ILL_COPROC;
1362 info._sifields._sigfault._addr = env->nip - 4;
1363 queue_signal(env, info.si_signo, &info);
1364 break;
1365 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1366 cpu_abort(env, "Programable interval timer interrupt "
1367 "while in user mode. Aborting\n");
1368 break;
1369 case POWERPC_EXCP_IO: /* IO error exception */
1370 cpu_abort(env, "IO error exception while in user mode. "
1371 "Aborting\n");
1372 break;
1373 case POWERPC_EXCP_RUNM: /* Run mode exception */
1374 cpu_abort(env, "Run mode exception while in user mode. "
1375 "Aborting\n");
1376 break;
1377 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1378 cpu_abort(env, "Emulation trap exception not handled\n");
1379 break;
1380 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1381 cpu_abort(env, "Instruction fetch TLB exception "
1382 "while in user-mode. Aborting");
1383 break;
1384 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1385 cpu_abort(env, "Data load TLB exception while in user-mode. "
1386 "Aborting");
1387 break;
1388 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1389 cpu_abort(env, "Data store TLB exception while in user-mode. "
1390 "Aborting");
1391 break;
1392 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1393 cpu_abort(env, "Floating-point assist exception not handled\n");
1394 break;
1395 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1396 cpu_abort(env, "Instruction address breakpoint exception "
1397 "not handled\n");
1398 break;
1399 case POWERPC_EXCP_SMI: /* System management interrupt */
1400 cpu_abort(env, "System management interrupt while in user mode. "
1401 "Aborting\n");
1402 break;
1403 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1404 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1405 "Aborting\n");
1406 break;
1407 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1408 cpu_abort(env, "Performance monitor exception not handled\n");
1409 break;
1410 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1411 cpu_abort(env, "Vector assist exception not handled\n");
1412 break;
1413 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1414 cpu_abort(env, "Soft patch exception not handled\n");
1415 break;
1416 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1417 cpu_abort(env, "Maintenance exception while in user mode. "
1418 "Aborting\n");
1419 break;
1420 case POWERPC_EXCP_STOP: /* stop translation */
1421 /* We did invalidate the instruction cache. Go on */
1422 break;
1423 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1424 /* We just stopped because of a branch. Go on */
1425 break;
1426 case POWERPC_EXCP_SYSCALL_USER:
1427 /* system call in user-mode emulation */
1428 /* WARNING:
1429 * PPC ABI uses overflow flag in cr0 to signal an error
1430 * in syscalls.
1431 */
1432 #if 0
1433 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1434 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1435 #endif
1436 env->crf[0] &= ~0x1;
1437 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1438 env->gpr[5], env->gpr[6], env->gpr[7],
1439 env->gpr[8]);
1440 if (ret > (uint32_t)(-515)) {
1441 env->crf[0] |= 0x1;
1442 ret = -ret;
1443 }
1444 env->gpr[3] = ret;
1445 #if 0
1446 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1447 #endif
1448 break;
1449 case EXCP_DEBUG:
1450 {
1451 int sig;
1452
1453 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1454 if (sig) {
1455 info.si_signo = sig;
1456 info.si_errno = 0;
1457 info.si_code = TARGET_TRAP_BRKPT;
1458 queue_signal(env, info.si_signo, &info);
1459 }
1460 }
1461 break;
1462 case EXCP_INTERRUPT:
1463 /* just indicate that signals should be handled asap */
1464 break;
1465 default:
1466 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1467 break;
1468 }
1469 process_pending_signals(env);
1470 }
1471 }
1472 #endif
1473
1474 #ifdef TARGET_MIPS
1475
1476 #define MIPS_SYS(name, args) args,
1477
1478 static const uint8_t mips_syscall_args[] = {
1479 MIPS_SYS(sys_syscall , 0) /* 4000 */
1480 MIPS_SYS(sys_exit , 1)
1481 MIPS_SYS(sys_fork , 0)
1482 MIPS_SYS(sys_read , 3)
1483 MIPS_SYS(sys_write , 3)
1484 MIPS_SYS(sys_open , 3) /* 4005 */
1485 MIPS_SYS(sys_close , 1)
1486 MIPS_SYS(sys_waitpid , 3)
1487 MIPS_SYS(sys_creat , 2)
1488 MIPS_SYS(sys_link , 2)
1489 MIPS_SYS(sys_unlink , 1) /* 4010 */
1490 MIPS_SYS(sys_execve , 0)
1491 MIPS_SYS(sys_chdir , 1)
1492 MIPS_SYS(sys_time , 1)
1493 MIPS_SYS(sys_mknod , 3)
1494 MIPS_SYS(sys_chmod , 2) /* 4015 */
1495 MIPS_SYS(sys_lchown , 3)
1496 MIPS_SYS(sys_ni_syscall , 0)
1497 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1498 MIPS_SYS(sys_lseek , 3)
1499 MIPS_SYS(sys_getpid , 0) /* 4020 */
1500 MIPS_SYS(sys_mount , 5)
1501 MIPS_SYS(sys_oldumount , 1)
1502 MIPS_SYS(sys_setuid , 1)
1503 MIPS_SYS(sys_getuid , 0)
1504 MIPS_SYS(sys_stime , 1) /* 4025 */
1505 MIPS_SYS(sys_ptrace , 4)
1506 MIPS_SYS(sys_alarm , 1)
1507 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1508 MIPS_SYS(sys_pause , 0)
1509 MIPS_SYS(sys_utime , 2) /* 4030 */
1510 MIPS_SYS(sys_ni_syscall , 0)
1511 MIPS_SYS(sys_ni_syscall , 0)
1512 MIPS_SYS(sys_access , 2)
1513 MIPS_SYS(sys_nice , 1)
1514 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1515 MIPS_SYS(sys_sync , 0)
1516 MIPS_SYS(sys_kill , 2)
1517 MIPS_SYS(sys_rename , 2)
1518 MIPS_SYS(sys_mkdir , 2)
1519 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1520 MIPS_SYS(sys_dup , 1)
1521 MIPS_SYS(sys_pipe , 0)
1522 MIPS_SYS(sys_times , 1)
1523 MIPS_SYS(sys_ni_syscall , 0)
1524 MIPS_SYS(sys_brk , 1) /* 4045 */
1525 MIPS_SYS(sys_setgid , 1)
1526 MIPS_SYS(sys_getgid , 0)
1527 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1528 MIPS_SYS(sys_geteuid , 0)
1529 MIPS_SYS(sys_getegid , 0) /* 4050 */
1530 MIPS_SYS(sys_acct , 0)
1531 MIPS_SYS(sys_umount , 2)
1532 MIPS_SYS(sys_ni_syscall , 0)
1533 MIPS_SYS(sys_ioctl , 3)
1534 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1535 MIPS_SYS(sys_ni_syscall , 2)
1536 MIPS_SYS(sys_setpgid , 2)
1537 MIPS_SYS(sys_ni_syscall , 0)
1538 MIPS_SYS(sys_olduname , 1)
1539 MIPS_SYS(sys_umask , 1) /* 4060 */
1540 MIPS_SYS(sys_chroot , 1)
1541 MIPS_SYS(sys_ustat , 2)
1542 MIPS_SYS(sys_dup2 , 2)
1543 MIPS_SYS(sys_getppid , 0)
1544 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1545 MIPS_SYS(sys_setsid , 0)
1546 MIPS_SYS(sys_sigaction , 3)
1547 MIPS_SYS(sys_sgetmask , 0)
1548 MIPS_SYS(sys_ssetmask , 1)
1549 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1550 MIPS_SYS(sys_setregid , 2)
1551 MIPS_SYS(sys_sigsuspend , 0)
1552 MIPS_SYS(sys_sigpending , 1)
1553 MIPS_SYS(sys_sethostname , 2)
1554 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1555 MIPS_SYS(sys_getrlimit , 2)
1556 MIPS_SYS(sys_getrusage , 2)
1557 MIPS_SYS(sys_gettimeofday, 2)
1558 MIPS_SYS(sys_settimeofday, 2)
1559 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1560 MIPS_SYS(sys_setgroups , 2)
1561 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1562 MIPS_SYS(sys_symlink , 2)
1563 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1564 MIPS_SYS(sys_readlink , 3) /* 4085 */
1565 MIPS_SYS(sys_uselib , 1)
1566 MIPS_SYS(sys_swapon , 2)
1567 MIPS_SYS(sys_reboot , 3)
1568 MIPS_SYS(old_readdir , 3)
1569 MIPS_SYS(old_mmap , 6) /* 4090 */
1570 MIPS_SYS(sys_munmap , 2)
1571 MIPS_SYS(sys_truncate , 2)
1572 MIPS_SYS(sys_ftruncate , 2)
1573 MIPS_SYS(sys_fchmod , 2)
1574 MIPS_SYS(sys_fchown , 3) /* 4095 */
1575 MIPS_SYS(sys_getpriority , 2)
1576 MIPS_SYS(sys_setpriority , 3)
1577 MIPS_SYS(sys_ni_syscall , 0)
1578 MIPS_SYS(sys_statfs , 2)
1579 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1580 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1581 MIPS_SYS(sys_socketcall , 2)
1582 MIPS_SYS(sys_syslog , 3)
1583 MIPS_SYS(sys_setitimer , 3)
1584 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1585 MIPS_SYS(sys_newstat , 2)
1586 MIPS_SYS(sys_newlstat , 2)
1587 MIPS_SYS(sys_newfstat , 2)
1588 MIPS_SYS(sys_uname , 1)
1589 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1590 MIPS_SYS(sys_vhangup , 0)
1591 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1592 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1593 MIPS_SYS(sys_wait4 , 4)
1594 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1595 MIPS_SYS(sys_sysinfo , 1)
1596 MIPS_SYS(sys_ipc , 6)
1597 MIPS_SYS(sys_fsync , 1)
1598 MIPS_SYS(sys_sigreturn , 0)
1599 MIPS_SYS(sys_clone , 0) /* 4120 */
1600 MIPS_SYS(sys_setdomainname, 2)
1601 MIPS_SYS(sys_newuname , 1)
1602 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1603 MIPS_SYS(sys_adjtimex , 1)
1604 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1605 MIPS_SYS(sys_sigprocmask , 3)
1606 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1607 MIPS_SYS(sys_init_module , 5)
1608 MIPS_SYS(sys_delete_module, 1)
1609 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1610 MIPS_SYS(sys_quotactl , 0)
1611 MIPS_SYS(sys_getpgid , 1)
1612 MIPS_SYS(sys_fchdir , 1)
1613 MIPS_SYS(sys_bdflush , 2)
1614 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1615 MIPS_SYS(sys_personality , 1)
1616 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1617 MIPS_SYS(sys_setfsuid , 1)
1618 MIPS_SYS(sys_setfsgid , 1)
1619 MIPS_SYS(sys_llseek , 5) /* 4140 */
1620 MIPS_SYS(sys_getdents , 3)
1621 MIPS_SYS(sys_select , 5)
1622 MIPS_SYS(sys_flock , 2)
1623 MIPS_SYS(sys_msync , 3)
1624 MIPS_SYS(sys_readv , 3) /* 4145 */
1625 MIPS_SYS(sys_writev , 3)
1626 MIPS_SYS(sys_cacheflush , 3)
1627 MIPS_SYS(sys_cachectl , 3)
1628 MIPS_SYS(sys_sysmips , 4)
1629 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1630 MIPS_SYS(sys_getsid , 1)
1631 MIPS_SYS(sys_fdatasync , 0)
1632 MIPS_SYS(sys_sysctl , 1)
1633 MIPS_SYS(sys_mlock , 2)
1634 MIPS_SYS(sys_munlock , 2) /* 4155 */
1635 MIPS_SYS(sys_mlockall , 1)
1636 MIPS_SYS(sys_munlockall , 0)
1637 MIPS_SYS(sys_sched_setparam, 2)
1638 MIPS_SYS(sys_sched_getparam, 2)
1639 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1640 MIPS_SYS(sys_sched_getscheduler, 1)
1641 MIPS_SYS(sys_sched_yield , 0)
1642 MIPS_SYS(sys_sched_get_priority_max, 1)
1643 MIPS_SYS(sys_sched_get_priority_min, 1)
1644 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1645 MIPS_SYS(sys_nanosleep, 2)
1646 MIPS_SYS(sys_mremap , 4)
1647 MIPS_SYS(sys_accept , 3)
1648 MIPS_SYS(sys_bind , 3)
1649 MIPS_SYS(sys_connect , 3) /* 4170 */
1650 MIPS_SYS(sys_getpeername , 3)
1651 MIPS_SYS(sys_getsockname , 3)
1652 MIPS_SYS(sys_getsockopt , 5)
1653 MIPS_SYS(sys_listen , 2)
1654 MIPS_SYS(sys_recv , 4) /* 4175 */
1655 MIPS_SYS(sys_recvfrom , 6)
1656 MIPS_SYS(sys_recvmsg , 3)
1657 MIPS_SYS(sys_send , 4)
1658 MIPS_SYS(sys_sendmsg , 3)
1659 MIPS_SYS(sys_sendto , 6) /* 4180 */
1660 MIPS_SYS(sys_setsockopt , 5)
1661 MIPS_SYS(sys_shutdown , 2)
1662 MIPS_SYS(sys_socket , 3)
1663 MIPS_SYS(sys_socketpair , 4)
1664 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1665 MIPS_SYS(sys_getresuid , 3)
1666 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1667 MIPS_SYS(sys_poll , 3)
1668 MIPS_SYS(sys_nfsservctl , 3)
1669 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1670 MIPS_SYS(sys_getresgid , 3)
1671 MIPS_SYS(sys_prctl , 5)
1672 MIPS_SYS(sys_rt_sigreturn, 0)
1673 MIPS_SYS(sys_rt_sigaction, 4)
1674 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1675 MIPS_SYS(sys_rt_sigpending, 2)
1676 MIPS_SYS(sys_rt_sigtimedwait, 4)
1677 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1678 MIPS_SYS(sys_rt_sigsuspend, 0)
1679 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1680 MIPS_SYS(sys_pwrite64 , 6)
1681 MIPS_SYS(sys_chown , 3)
1682 MIPS_SYS(sys_getcwd , 2)
1683 MIPS_SYS(sys_capget , 2)
1684 MIPS_SYS(sys_capset , 2) /* 4205 */
1685 MIPS_SYS(sys_sigaltstack , 0)
1686 MIPS_SYS(sys_sendfile , 4)
1687 MIPS_SYS(sys_ni_syscall , 0)
1688 MIPS_SYS(sys_ni_syscall , 0)
1689 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1690 MIPS_SYS(sys_truncate64 , 4)
1691 MIPS_SYS(sys_ftruncate64 , 4)
1692 MIPS_SYS(sys_stat64 , 2)
1693 MIPS_SYS(sys_lstat64 , 2)
1694 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1695 MIPS_SYS(sys_pivot_root , 2)
1696 MIPS_SYS(sys_mincore , 3)
1697 MIPS_SYS(sys_madvise , 3)
1698 MIPS_SYS(sys_getdents64 , 3)
1699 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1700 MIPS_SYS(sys_ni_syscall , 0)
1701 MIPS_SYS(sys_gettid , 0)
1702 MIPS_SYS(sys_readahead , 5)
1703 MIPS_SYS(sys_setxattr , 5)
1704 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1705 MIPS_SYS(sys_fsetxattr , 5)
1706 MIPS_SYS(sys_getxattr , 4)
1707 MIPS_SYS(sys_lgetxattr , 4)
1708 MIPS_SYS(sys_fgetxattr , 4)
1709 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1710 MIPS_SYS(sys_llistxattr , 3)
1711 MIPS_SYS(sys_flistxattr , 3)
1712 MIPS_SYS(sys_removexattr , 2)
1713 MIPS_SYS(sys_lremovexattr, 2)
1714 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1715 MIPS_SYS(sys_tkill , 2)
1716 MIPS_SYS(sys_sendfile64 , 5)
1717 MIPS_SYS(sys_futex , 2)
1718 MIPS_SYS(sys_sched_setaffinity, 3)
1719 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1720 MIPS_SYS(sys_io_setup , 2)
1721 MIPS_SYS(sys_io_destroy , 1)
1722 MIPS_SYS(sys_io_getevents, 5)
1723 MIPS_SYS(sys_io_submit , 3)
1724 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1725 MIPS_SYS(sys_exit_group , 1)
1726 MIPS_SYS(sys_lookup_dcookie, 3)
1727 MIPS_SYS(sys_epoll_create, 1)
1728 MIPS_SYS(sys_epoll_ctl , 4)
1729 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1730 MIPS_SYS(sys_remap_file_pages, 5)
1731 MIPS_SYS(sys_set_tid_address, 1)
1732 MIPS_SYS(sys_restart_syscall, 0)
1733 MIPS_SYS(sys_fadvise64_64, 7)
1734 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1735 MIPS_SYS(sys_fstatfs64 , 2)
1736 MIPS_SYS(sys_timer_create, 3)
1737 MIPS_SYS(sys_timer_settime, 4)
1738 MIPS_SYS(sys_timer_gettime, 2)
1739 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1740 MIPS_SYS(sys_timer_delete, 1)
1741 MIPS_SYS(sys_clock_settime, 2)
1742 MIPS_SYS(sys_clock_gettime, 2)
1743 MIPS_SYS(sys_clock_getres, 2)
1744 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1745 MIPS_SYS(sys_tgkill , 3)
1746 MIPS_SYS(sys_utimes , 2)
1747 MIPS_SYS(sys_mbind , 4)
1748 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1749 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1750 MIPS_SYS(sys_mq_open , 4)
1751 MIPS_SYS(sys_mq_unlink , 1)
1752 MIPS_SYS(sys_mq_timedsend, 5)
1753 MIPS_SYS(sys_mq_timedreceive, 5)
1754 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1755 MIPS_SYS(sys_mq_getsetattr, 3)
1756 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1757 MIPS_SYS(sys_waitid , 4)
1758 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1759 MIPS_SYS(sys_add_key , 5)
1760 MIPS_SYS(sys_request_key, 4)
1761 MIPS_SYS(sys_keyctl , 5)
1762 MIPS_SYS(sys_set_thread_area, 1)
1763 MIPS_SYS(sys_inotify_init, 0)
1764 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1765 MIPS_SYS(sys_inotify_rm_watch, 2)
1766 MIPS_SYS(sys_migrate_pages, 4)
1767 MIPS_SYS(sys_openat, 4)
1768 MIPS_SYS(sys_mkdirat, 3)
1769 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1770 MIPS_SYS(sys_fchownat, 5)
1771 MIPS_SYS(sys_futimesat, 3)
1772 MIPS_SYS(sys_fstatat64, 4)
1773 MIPS_SYS(sys_unlinkat, 3)
1774 MIPS_SYS(sys_renameat, 4) /* 4295 */
1775 MIPS_SYS(sys_linkat, 5)
1776 MIPS_SYS(sys_symlinkat, 3)
1777 MIPS_SYS(sys_readlinkat, 4)
1778 MIPS_SYS(sys_fchmodat, 3)
1779 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1780 MIPS_SYS(sys_pselect6, 6)
1781 MIPS_SYS(sys_ppoll, 5)
1782 MIPS_SYS(sys_unshare, 1)
1783 MIPS_SYS(sys_splice, 4)
1784 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1785 MIPS_SYS(sys_tee, 4)
1786 MIPS_SYS(sys_vmsplice, 4)
1787 MIPS_SYS(sys_move_pages, 6)
1788 MIPS_SYS(sys_set_robust_list, 2)
1789 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1790 MIPS_SYS(sys_kexec_load, 4)
1791 MIPS_SYS(sys_getcpu, 3)
1792 MIPS_SYS(sys_epoll_pwait, 6)
1793 MIPS_SYS(sys_ioprio_set, 3)
1794 MIPS_SYS(sys_ioprio_get, 2)
1795 };
1796
1797 #undef MIPS_SYS
1798
1799 void cpu_loop(CPUMIPSState *env)
1800 {
1801 target_siginfo_t info;
1802 int trapnr, ret;
1803 unsigned int syscall_num;
1804
1805 for(;;) {
1806 trapnr = cpu_mips_exec(env);
1807 switch(trapnr) {
1808 case EXCP_SYSCALL:
1809 syscall_num = env->active_tc.gpr[2] - 4000;
1810 env->active_tc.PC += 4;
1811 if (syscall_num >= sizeof(mips_syscall_args)) {
1812 ret = -ENOSYS;
1813 } else {
1814 int nb_args;
1815 abi_ulong sp_reg;
1816 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1817
1818 nb_args = mips_syscall_args[syscall_num];
1819 sp_reg = env->active_tc.gpr[29];
1820 switch (nb_args) {
1821 /* these arguments are taken from the stack */
1822 /* FIXME - what to do if get_user() fails? */
1823 case 8: get_user_ual(arg8, sp_reg + 28);
1824 case 7: get_user_ual(arg7, sp_reg + 24);
1825 case 6: get_user_ual(arg6, sp_reg + 20);
1826 case 5: get_user_ual(arg5, sp_reg + 16);
1827 default:
1828 break;
1829 }
1830 ret = do_syscall(env, env->active_tc.gpr[2],
1831 env->active_tc.gpr[4],
1832 env->active_tc.gpr[5],
1833 env->active_tc.gpr[6],
1834 env->active_tc.gpr[7],
1835 arg5, arg6/*, arg7, arg8*/);
1836 }
1837 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1838 env->active_tc.gpr[7] = 1; /* error flag */
1839 ret = -ret;
1840 } else {
1841 env->active_tc.gpr[7] = 0; /* error flag */
1842 }
1843 env->active_tc.gpr[2] = ret;
1844 break;
1845 case EXCP_TLBL:
1846 case EXCP_TLBS:
1847 case EXCP_CpU:
1848 case EXCP_RI:
1849 info.si_signo = TARGET_SIGILL;
1850 info.si_errno = 0;
1851 info.si_code = 0;
1852 queue_signal(env, info.si_signo, &info);
1853 break;
1854 case EXCP_INTERRUPT:
1855 /* just indicate that signals should be handled asap */
1856 break;
1857 case EXCP_DEBUG:
1858 {
1859 int sig;
1860
1861 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1862 if (sig)
1863 {
1864 info.si_signo = sig;
1865 info.si_errno = 0;
1866 info.si_code = TARGET_TRAP_BRKPT;
1867 queue_signal(env, info.si_signo, &info);
1868 }
1869 }
1870 break;
1871 default:
1872 // error:
1873 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1874 trapnr);
1875 cpu_dump_state(env, stderr, fprintf, 0);
1876 abort();
1877 }
1878 process_pending_signals(env);
1879 }
1880 }
1881 #endif
1882
1883 #ifdef TARGET_SH4
1884 void cpu_loop (CPUState *env)
1885 {
1886 int trapnr, ret;
1887 target_siginfo_t info;
1888
1889 while (1) {
1890 trapnr = cpu_sh4_exec (env);
1891
1892 switch (trapnr) {
1893 case 0x160:
1894 env->pc += 2;
1895 ret = do_syscall(env,
1896 env->gregs[3],
1897 env->gregs[4],
1898 env->gregs[5],
1899 env->gregs[6],
1900 env->gregs[7],
1901 env->gregs[0],
1902 env->gregs[1]);
1903 env->gregs[0] = ret;
1904 break;
1905 case EXCP_INTERRUPT:
1906 /* just indicate that signals should be handled asap */
1907 break;
1908 case EXCP_DEBUG:
1909 {
1910 int sig;
1911
1912 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1913 if (sig)
1914 {
1915 info.si_signo = sig;
1916 info.si_errno = 0;
1917 info.si_code = TARGET_TRAP_BRKPT;
1918 queue_signal(env, info.si_signo, &info);
1919 }
1920 }
1921 break;
1922 case 0xa0:
1923 case 0xc0:
1924 info.si_signo = SIGSEGV;
1925 info.si_errno = 0;
1926 info.si_code = TARGET_SEGV_MAPERR;
1927 info._sifields._sigfault._addr = env->tea;
1928 queue_signal(env, info.si_signo, &info);
1929 break;
1930
1931 default:
1932 printf ("Unhandled trap: 0x%x\n", trapnr);
1933 cpu_dump_state(env, stderr, fprintf, 0);
1934 exit (1);
1935 }
1936 process_pending_signals (env);
1937 }
1938 }
1939 #endif
1940
1941 #ifdef TARGET_CRIS
1942 void cpu_loop (CPUState *env)
1943 {
1944 int trapnr, ret;
1945 target_siginfo_t info;
1946
1947 while (1) {
1948 trapnr = cpu_cris_exec (env);
1949 switch (trapnr) {
1950 case 0xaa:
1951 {
1952 info.si_signo = SIGSEGV;
1953 info.si_errno = 0;
1954 /* XXX: check env->error_code */
1955 info.si_code = TARGET_SEGV_MAPERR;
1956 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1957 queue_signal(env, info.si_signo, &info);
1958 }
1959 break;
1960 case EXCP_INTERRUPT:
1961 /* just indicate that signals should be handled asap */
1962 break;
1963 case EXCP_BREAK:
1964 ret = do_syscall(env,
1965 env->regs[9],
1966 env->regs[10],
1967 env->regs[11],
1968 env->regs[12],
1969 env->regs[13],
1970 env->pregs[7],
1971 env->pregs[11]);
1972 env->regs[10] = ret;
1973 break;
1974 case EXCP_DEBUG:
1975 {
1976 int sig;
1977
1978 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1979 if (sig)
1980 {
1981 info.si_signo = sig;
1982 info.si_errno = 0;
1983 info.si_code = TARGET_TRAP_BRKPT;
1984 queue_signal(env, info.si_signo, &info);
1985 }
1986 }
1987 break;
1988 default:
1989 printf ("Unhandled trap: 0x%x\n", trapnr);
1990 cpu_dump_state(env, stderr, fprintf, 0);
1991 exit (1);
1992 }
1993 process_pending_signals (env);
1994 }
1995 }
1996 #endif
1997
1998 #ifdef TARGET_M68K
1999
2000 void cpu_loop(CPUM68KState *env)
2001 {
2002 int trapnr;
2003 unsigned int n;
2004 target_siginfo_t info;
2005 TaskState *ts = env->opaque;
2006
2007 for(;;) {
2008 trapnr = cpu_m68k_exec(env);
2009 switch(trapnr) {
2010 case EXCP_ILLEGAL:
2011 {
2012 if (ts->sim_syscalls) {
2013 uint16_t nr;
2014 nr = lduw(env->pc + 2);
2015 env->pc += 4;
2016 do_m68k_simcall(env, nr);
2017 } else {
2018 goto do_sigill;
2019 }
2020 }
2021 break;
2022 case EXCP_HALT_INSN:
2023 /* Semihosing syscall. */
2024 env->pc += 4;
2025 do_m68k_semihosting(env, env->dregs[0]);
2026 break;
2027 case EXCP_LINEA:
2028 case EXCP_LINEF:
2029 case EXCP_UNSUPPORTED:
2030 do_sigill:
2031 info.si_signo = SIGILL;
2032 info.si_errno = 0;
2033 info.si_code = TARGET_ILL_ILLOPN;
2034 info._sifields._sigfault._addr = env->pc;
2035 queue_signal(env, info.si_signo, &info);
2036 break;
2037 case EXCP_TRAP0:
2038 {
2039 ts->sim_syscalls = 0;
2040 n = env->dregs[0];
2041 env->pc += 2;
2042 env->dregs[0] = do_syscall(env,
2043 n,
2044 env->dregs[1],
2045 env->dregs[2],
2046 env->dregs[3],
2047 env->dregs[4],
2048 env->dregs[5],
2049 env->aregs[0]);
2050 }
2051 break;
2052 case EXCP_INTERRUPT:
2053 /* just indicate that signals should be handled asap */
2054 break;
2055 case EXCP_ACCESS:
2056 {
2057 info.si_signo = SIGSEGV;
2058 info.si_errno = 0;
2059 /* XXX: check env->error_code */
2060 info.si_code = TARGET_SEGV_MAPERR;
2061 info._sifields._sigfault._addr = env->mmu.ar;
2062 queue_signal(env, info.si_signo, &info);
2063 }
2064 break;
2065 case EXCP_DEBUG:
2066 {
2067 int sig;
2068
2069 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2070 if (sig)
2071 {
2072 info.si_signo = sig;
2073 info.si_errno = 0;
2074 info.si_code = TARGET_TRAP_BRKPT;
2075 queue_signal(env, info.si_signo, &info);
2076 }
2077 }
2078 break;
2079 default:
2080 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2081 trapnr);
2082 cpu_dump_state(env, stderr, fprintf, 0);
2083 abort();
2084 }
2085 process_pending_signals(env);
2086 }
2087 }
2088 #endif /* TARGET_M68K */
2089
2090 #ifdef TARGET_ALPHA
2091 void cpu_loop (CPUState *env)
2092 {
2093 int trapnr;
2094 target_siginfo_t info;
2095
2096 while (1) {
2097 trapnr = cpu_alpha_exec (env);
2098
2099 switch (trapnr) {
2100 case EXCP_RESET:
2101 fprintf(stderr, "Reset requested. Exit\n");
2102 exit(1);
2103 break;
2104 case EXCP_MCHK:
2105 fprintf(stderr, "Machine check exception. Exit\n");
2106 exit(1);
2107 break;
2108 case EXCP_ARITH:
2109 fprintf(stderr, "Arithmetic trap.\n");
2110 exit(1);
2111 break;
2112 case EXCP_HW_INTERRUPT:
2113 fprintf(stderr, "External interrupt. Exit\n");
2114 exit(1);
2115 break;
2116 case EXCP_DFAULT:
2117 fprintf(stderr, "MMU data fault\n");
2118 exit(1);
2119 break;
2120 case EXCP_DTB_MISS_PAL:
2121 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2122 exit(1);
2123 break;
2124 case EXCP_ITB_MISS:
2125 fprintf(stderr, "MMU instruction TLB miss\n");
2126 exit(1);
2127 break;
2128 case EXCP_ITB_ACV:
2129 fprintf(stderr, "MMU instruction access violation\n");
2130 exit(1);
2131 break;
2132 case EXCP_DTB_MISS_NATIVE:
2133 fprintf(stderr, "MMU data TLB miss\n");
2134 exit(1);
2135 break;
2136 case EXCP_UNALIGN:
2137 fprintf(stderr, "Unaligned access\n");
2138 exit(1);
2139 break;
2140 case EXCP_OPCDEC:
2141 fprintf(stderr, "Invalid instruction\n");
2142 exit(1);
2143 break;
2144 case EXCP_FEN:
2145 fprintf(stderr, "Floating-point not allowed\n");
2146 exit(1);
2147 break;
2148 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2149 call_pal(env, (trapnr >> 6) | 0x80);
2150 break;
2151 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2152 fprintf(stderr, "Privileged call to PALcode\n");
2153 exit(1);
2154 break;
2155 case EXCP_DEBUG:
2156 {
2157 int sig;
2158
2159 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2160 if (sig)
2161 {
2162 info.si_signo = sig;
2163 info.si_errno = 0;
2164 info.si_code = TARGET_TRAP_BRKPT;
2165 queue_signal(env, info.si_signo, &info);
2166 }
2167 }
2168 break;
2169 default:
2170 printf ("Unhandled trap: 0x%x\n", trapnr);
2171 cpu_dump_state(env, stderr, fprintf, 0);
2172 exit (1);
2173 }
2174 process_pending_signals (env);
2175 }
2176 }
2177 #endif /* TARGET_ALPHA */
2178
2179 static void usage(void)
2180 {
2181 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2182 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2183 "Linux CPU emulator (compiled for %s emulation)\n"
2184 "\n"
2185 "Standard options:\n"
2186 "-h print this help\n"
2187 "-g port wait gdb connection to port\n"
2188 "-L path set the elf interpreter prefix (default=%s)\n"
2189 "-s size set the stack size in bytes (default=%ld)\n"
2190 "-cpu model select CPU (-cpu ? for list)\n"
2191 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2192 "-E var=value sets/modifies targets environment variable(s)\n"
2193 "-U var unsets targets environment variable(s)\n"
2194 "\n"
2195 "Debug options:\n"
2196 "-d options activate log (logfile=%s)\n"
2197 "-p pagesize set the host page size to 'pagesize'\n"
2198 "-strace log system calls\n"
2199 "\n"
2200 "Environment variables:\n"
2201 "QEMU_STRACE Print system calls and arguments similar to the\n"
2202 " 'strace' program. Enable by setting to any value.\n"
2203 "You can use -E and -U options to set/unset environment variables\n"
2204 "for target process. It is possible to provide several variables\n"
2205 "by repeating the option. For example:\n"
2206 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2207 "Note that if you provide several changes to single variable\n"
2208 "last change will stay in effect.\n"
2209 ,
2210 TARGET_ARCH,
2211 interp_prefix,
2212 x86_stack_size,
2213 DEBUG_LOGFILE);
2214 _exit(1);
2215 }
2216
2217 THREAD CPUState *thread_env;
2218
2219 /* Assumes contents are already zeroed. */
2220 void init_task_state(TaskState *ts)
2221 {
2222 int i;
2223
2224 ts->used = 1;
2225 ts->first_free = ts->sigqueue_table;
2226 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2227 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2228 }
2229 ts->sigqueue_table[i].next = NULL;
2230 }
2231
2232 int main(int argc, char **argv, char **envp)
2233 {
2234 const char *filename;
2235 const char *cpu_model;
2236 struct target_pt_regs regs1, *regs = &regs1;
2237 struct image_info info1, *info = &info1;
2238 TaskState ts1, *ts = &ts1;
2239 CPUState *env;
2240 int optind;
2241 const char *r;
2242 int gdbstub_port = 0;
2243 char **target_environ, **wrk;
2244 envlist_t *envlist = NULL;
2245
2246 if (argc <= 1)
2247 usage();
2248
2249 qemu_cache_utils_init(envp);
2250
2251 /* init debug */
2252 cpu_set_log_filename(DEBUG_LOGFILE);
2253
2254 if ((envlist = envlist_create()) == NULL) {
2255 (void) fprintf(stderr, "Unable to allocate envlist\n");
2256 exit(1);
2257 }
2258
2259 /* add current environment into the list */
2260 for (wrk = environ; *wrk != NULL; wrk++) {
2261 (void) envlist_setenv(envlist, *wrk);
2262 }
2263
2264 cpu_model = NULL;
2265 optind = 1;
2266 for(;;) {
2267 if (optind >= argc)
2268 break;
2269 r = argv[optind];
2270 if (r[0] != '-')
2271 break;
2272 optind++;
2273 r++;
2274 if (!strcmp(r, "-")) {
2275 break;
2276 } else if (!strcmp(r, "d")) {
2277 int mask;
2278 const CPULogItem *item;
2279
2280 if (optind >= argc)
2281 break;
2282
2283 r = argv[optind++];
2284 mask = cpu_str_to_log_mask(r);
2285 if (!mask) {
2286 printf("Log items (comma separated):\n");
2287 for(item = cpu_log_items; item->mask != 0; item++) {
2288 printf("%-10s %s\n", item->name, item->help);
2289 }
2290 exit(1);
2291 }
2292 cpu_set_log(mask);
2293 } else if (!strcmp(r, "E")) {
2294 r = argv[optind++];
2295 if (envlist_setenv(envlist, r) != 0)
2296 usage();
2297 } else if (!strcmp(r, "U")) {
2298 r = argv[optind++];
2299 if (envlist_unsetenv(envlist, r) != 0)
2300 usage();
2301 } else if (!strcmp(r, "s")) {
2302 r = argv[optind++];
2303 x86_stack_size = strtol(r, (char **)&r, 0);
2304 if (x86_stack_size <= 0)
2305 usage();
2306 if (*r == 'M')
2307 x86_stack_size *= 1024 * 1024;
2308 else if (*r == 'k' || *r == 'K')
2309 x86_stack_size *= 1024;
2310 } else if (!strcmp(r, "L")) {
2311 interp_prefix = argv[optind++];
2312 } else if (!strcmp(r, "p")) {
2313 qemu_host_page_size = atoi(argv[optind++]);
2314 if (qemu_host_page_size == 0 ||
2315 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2316 fprintf(stderr, "page size must be a power of two\n");
2317 exit(1);
2318 }
2319 } else if (!strcmp(r, "g")) {
2320 gdbstub_port = atoi(argv[optind++]);
2321 } else if (!strcmp(r, "r")) {
2322 qemu_uname_release = argv[optind++];
2323 } else if (!strcmp(r, "cpu")) {
2324 cpu_model = argv[optind++];
2325 if (strcmp(cpu_model, "?") == 0) {
2326 /* XXX: implement xxx_cpu_list for targets that still miss it */
2327 #if defined(cpu_list)
2328 cpu_list(stdout, &fprintf);
2329 #endif
2330 _exit(1);
2331 }
2332 } else if (!strcmp(r, "drop-ld-preload")) {
2333 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2334 } else if (!strcmp(r, "strace")) {
2335 do_strace = 1;
2336 } else
2337 {
2338 usage();
2339 }
2340 }
2341 if (optind >= argc)
2342 usage();
2343 filename = argv[optind];
2344
2345 /* Zero out regs */
2346 memset(regs, 0, sizeof(struct target_pt_regs));
2347
2348 /* Zero out image_info */
2349 memset(info, 0, sizeof(struct image_info));
2350
2351 /* Scan interp_prefix dir for replacement files. */
2352 init_paths(interp_prefix);
2353
2354 if (cpu_model == NULL) {
2355 #if defined(TARGET_I386)
2356 #ifdef TARGET_X86_64
2357 cpu_model = "qemu64";
2358 #else
2359 cpu_model = "qemu32";
2360 #endif
2361 #elif defined(TARGET_ARM)
2362 cpu_model = "arm926";
2363 #elif defined(TARGET_M68K)
2364 cpu_model = "any";
2365 #elif defined(TARGET_SPARC)
2366 #ifdef TARGET_SPARC64
2367 cpu_model = "TI UltraSparc II";
2368 #else
2369 cpu_model = "Fujitsu MB86904";
2370 #endif
2371 #elif defined(TARGET_MIPS)
2372 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2373 cpu_model = "20Kc";
2374 #else
2375 cpu_model = "24Kf";
2376 #endif
2377 #elif defined(TARGET_PPC)
2378 #ifdef TARGET_PPC64
2379 cpu_model = "970";
2380 #else
2381 cpu_model = "750";
2382 #endif
2383 #else
2384 cpu_model = "any";
2385 #endif
2386 }
2387 cpu_exec_init_all(0);
2388 /* NOTE: we need to init the CPU at this stage to get
2389 qemu_host_page_size */
2390 env = cpu_init(cpu_model);
2391 if (!env) {
2392 fprintf(stderr, "Unable to find CPU definition\n");
2393 exit(1);
2394 }
2395 thread_env = env;
2396
2397 if (getenv("QEMU_STRACE")) {
2398 do_strace = 1;
2399 }
2400
2401 target_environ = envlist_to_environ(envlist, NULL);
2402 envlist_free(envlist);
2403
2404 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2405 printf("Error loading %s\n", filename);
2406 _exit(1);
2407 }
2408
2409 for (wrk = target_environ; *wrk; wrk++) {
2410 free(*wrk);
2411 }
2412
2413 free(target_environ);
2414
2415 if (qemu_log_enabled()) {
2416 log_page_dump();
2417
2418 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2419 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2420 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2421 info->start_code);
2422 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2423 info->start_data);
2424 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2425 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2426 info->start_stack);
2427 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2428 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2429 }
2430
2431 target_set_brk(info->brk);
2432 syscall_init();
2433 signal_init();
2434
2435 /* build Task State */
2436 memset(ts, 0, sizeof(TaskState));
2437 init_task_state(ts);
2438 ts->info = info;
2439 env->opaque = ts;
2440
2441 #if defined(TARGET_I386)
2442 cpu_x86_set_cpl(env, 3);
2443
2444 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2445 env->hflags |= HF_PE_MASK;
2446 if (env->cpuid_features & CPUID_SSE) {
2447 env->cr[4] |= CR4_OSFXSR_MASK;
2448 env->hflags |= HF_OSFXSR_MASK;
2449 }
2450 #ifndef TARGET_ABI32
2451 /* enable 64 bit mode if possible */
2452 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2453 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2454 exit(1);
2455 }
2456 env->cr[4] |= CR4_PAE_MASK;
2457 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2458 env->hflags |= HF_LMA_MASK;
2459 #endif
2460
2461 /* flags setup : we activate the IRQs by default as in user mode */
2462 env->eflags |= IF_MASK;
2463
2464 /* linux register setup */
2465 #ifndef TARGET_ABI32
2466 env->regs[R_EAX] = regs->rax;
2467 env->regs[R_EBX] = regs->rbx;
2468 env->regs[R_ECX] = regs->rcx;
2469 env->regs[R_EDX] = regs->rdx;
2470 env->regs[R_ESI] = regs->rsi;
2471 env->regs[R_EDI] = regs->rdi;
2472 env->regs[R_EBP] = regs->rbp;
2473 env->regs[R_ESP] = regs->rsp;
2474 env->eip = regs->rip;
2475 #else
2476 env->regs[R_EAX] = regs->eax;
2477 env->regs[R_EBX] = regs->ebx;
2478 env->regs[R_ECX] = regs->ecx;
2479 env->regs[R_EDX] = regs->edx;
2480 env->regs[R_ESI] = regs->esi;
2481 env->regs[R_EDI] = regs->edi;
2482 env->regs[R_EBP] = regs->ebp;
2483 env->regs[R_ESP] = regs->esp;
2484 env->eip = regs->eip;
2485 #endif
2486
2487 /* linux interrupt setup */
2488 #ifndef TARGET_ABI32
2489 env->idt.limit = 511;
2490 #else
2491 env->idt.limit = 255;
2492 #endif
2493 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2494 PROT_READ|PROT_WRITE,
2495 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2496 idt_table = g2h(env->idt.base);
2497 set_idt(0, 0);
2498 set_idt(1, 0);
2499 set_idt(2, 0);
2500 set_idt(3, 3);
2501 set_idt(4, 3);
2502 set_idt(5, 0);
2503 set_idt(6, 0);
2504 set_idt(7, 0);
2505 set_idt(8, 0);
2506 set_idt(9, 0);
2507 set_idt(10, 0);
2508 set_idt(11, 0);
2509 set_idt(12, 0);
2510 set_idt(13, 0);
2511 set_idt(14, 0);
2512 set_idt(15, 0);
2513 set_idt(16, 0);
2514 set_idt(17, 0);
2515 set_idt(18, 0);
2516 set_idt(19, 0);
2517 set_idt(0x80, 3);
2518
2519 /* linux segment setup */
2520 {
2521 uint64_t *gdt_table;
2522 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2523 PROT_READ|PROT_WRITE,
2524 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2525 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2526 gdt_table = g2h(env->gdt.base);
2527 #ifdef TARGET_ABI32
2528 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2529 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2530 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2531 #else
2532 /* 64 bit code segment */
2533 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2534 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2535 DESC_L_MASK |
2536 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2537 #endif
2538 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2539 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2540 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2541 }
2542 cpu_x86_load_seg(env, R_CS, __USER_CS);
2543 cpu_x86_load_seg(env, R_SS, __USER_DS);
2544 #ifdef TARGET_ABI32
2545 cpu_x86_load_seg(env, R_DS, __USER_DS);
2546 cpu_x86_load_seg(env, R_ES, __USER_DS);
2547 cpu_x86_load_seg(env, R_FS, __USER_DS);
2548 cpu_x86_load_seg(env, R_GS, __USER_DS);
2549 /* This hack makes Wine work... */
2550 env->segs[R_FS].selector = 0;
2551 #else
2552 cpu_x86_load_seg(env, R_DS, 0);
2553 cpu_x86_load_seg(env, R_ES, 0);
2554 cpu_x86_load_seg(env, R_FS, 0);
2555 cpu_x86_load_seg(env, R_GS, 0);
2556 #endif
2557 #elif defined(TARGET_ARM)
2558 {
2559 int i;
2560 cpsr_write(env, regs->uregs[16], 0xffffffff);
2561 for(i = 0; i < 16; i++) {
2562 env->regs[i] = regs->uregs[i];
2563 }
2564 }
2565 #elif defined(TARGET_SPARC)
2566 {
2567 int i;
2568 env->pc = regs->pc;
2569 env->npc = regs->npc;
2570 env->y = regs->y;
2571 for(i = 0; i < 8; i++)
2572 env->gregs[i] = regs->u_regs[i];
2573 for(i = 0; i < 8; i++)
2574 env->regwptr[i] = regs->u_regs[i + 8];
2575 }
2576 #elif defined(TARGET_PPC)
2577 {
2578 int i;
2579
2580 #if defined(TARGET_PPC64)
2581 #if defined(TARGET_ABI32)
2582 env->msr &= ~((target_ulong)1 << MSR_SF);
2583 #else
2584 env->msr |= (target_ulong)1 << MSR_SF;
2585 #endif
2586 #endif
2587 env->nip = regs->nip;
2588 for(i = 0; i < 32; i++) {
2589 env->gpr[i] = regs->gpr[i];
2590 }
2591 }
2592 #elif defined(TARGET_M68K)
2593 {
2594 env->pc = regs->pc;
2595 env->dregs[0] = regs->d0;
2596 env->dregs[1] = regs->d1;
2597 env->dregs[2] = regs->d2;
2598 env->dregs[3] = regs->d3;
2599 env->dregs[4] = regs->d4;
2600 env->dregs[5] = regs->d5;
2601 env->dregs[6] = regs->d6;
2602 env->dregs[7] = regs->d7;
2603 env->aregs[0] = regs->a0;
2604 env->aregs[1] = regs->a1;
2605 env->aregs[2] = regs->a2;
2606 env->aregs[3] = regs->a3;
2607 env->aregs[4] = regs->a4;
2608 env->aregs[5] = regs->a5;
2609 env->aregs[6] = regs->a6;
2610 env->aregs[7] = regs->usp;
2611 env->sr = regs->sr;
2612 ts->sim_syscalls = 1;
2613 }
2614 #elif defined(TARGET_MIPS)
2615 {
2616 int i;
2617
2618 for(i = 0; i < 32; i++) {
2619 env->active_tc.gpr[i] = regs->regs[i];
2620 }
2621 env->active_tc.PC = regs->cp0_epc;
2622 }
2623 #elif defined(TARGET_SH4)
2624 {
2625 int i;
2626
2627 for(i = 0; i < 16; i++) {
2628 env->gregs[i] = regs->regs[i];
2629 }
2630 env->pc = regs->pc;
2631 }
2632 #elif defined(TARGET_ALPHA)
2633 {
2634 int i;
2635
2636 for(i = 0; i < 28; i++) {
2637 env->ir[i] = ((abi_ulong *)regs)[i];
2638 }
2639 env->ipr[IPR_USP] = regs->usp;
2640 env->ir[30] = regs->usp;
2641 env->pc = regs->pc;
2642 env->unique = regs->unique;
2643 }
2644 #elif defined(TARGET_CRIS)
2645 {
2646 env->regs[0] = regs->r0;
2647 env->regs[1] = regs->r1;
2648 env->regs[2] = regs->r2;
2649 env->regs[3] = regs->r3;
2650 env->regs[4] = regs->r4;
2651 env->regs[5] = regs->r5;
2652 env->regs[6] = regs->r6;
2653 env->regs[7] = regs->r7;
2654 env->regs[8] = regs->r8;
2655 env->regs[9] = regs->r9;
2656 env->regs[10] = regs->r10;
2657 env->regs[11] = regs->r11;
2658 env->regs[12] = regs->r12;
2659 env->regs[13] = regs->r13;
2660 env->regs[14] = info->start_stack;
2661 env->regs[15] = regs->acr;
2662 env->pc = regs->erp;
2663 }
2664 #else
2665 #error unsupported target CPU
2666 #endif
2667
2668 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2669 ts->stack_base = info->start_stack;
2670 ts->heap_base = info->brk;
2671 /* This will be filled in on the first SYS_HEAPINFO call. */
2672 ts->heap_limit = 0;
2673 #endif
2674
2675 if (gdbstub_port) {
2676 gdbserver_start (gdbstub_port);
2677 gdb_handlesig(env, 0);
2678 }
2679 cpu_loop(env);
2680 /* never exits */
2681 return 0;
2682 }
Samsung s3c2440 and arm920t support for the mini2440 dev board