eepro100: convert to memory API
[qemu/mdroth.git] / hw / pc.h
blobec34db73853f4ddf0ed754acf16366233555c04f
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu-common.h"
5 #include "memory.h"
6 #include "ioport.h"
7 #include "isa.h"
8 #include "fdc.h"
9 #include "net.h"
10 #include "memory.h"
12 /* PC-style peripherals (also used by other machines). */
14 /* serial.c */
16 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
17 CharDriverState *chr);
18 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
19 qemu_irq irq, int baudbase,
20 CharDriverState *chr, int ioregister,
21 int be);
22 static inline bool serial_isa_init(int index, CharDriverState *chr)
24 ISADevice *dev;
26 dev = isa_try_create("isa-serial");
27 if (!dev) {
28 return false;
30 qdev_prop_set_uint32(&dev->qdev, "index", index);
31 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
32 if (qdev_init(&dev->qdev) < 0) {
33 return false;
35 return true;
38 void serial_set_frequency(SerialState *s, uint32_t frequency);
40 /* parallel.c */
41 static inline bool parallel_init(int index, CharDriverState *chr)
43 ISADevice *dev;
45 dev = isa_try_create("isa-parallel");
46 if (!dev) {
47 return false;
49 qdev_prop_set_uint32(&dev->qdev, "index", index);
50 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
51 if (qdev_init(&dev->qdev) < 0) {
52 return false;
54 return true;
57 bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
58 CharDriverState *chr);
60 /* i8259.c */
62 typedef struct PicState2 PicState2;
63 extern PicState2 *isa_pic;
64 void pic_set_irq(int irq, int level);
65 void pic_set_irq_new(void *opaque, int irq, int level);
66 qemu_irq *i8259_init(qemu_irq parent_irq);
67 int pic_read_irq(PicState2 *s);
68 void pic_update_irq(PicState2 *s);
69 uint32_t pic_intack_read(PicState2 *s);
70 void pic_info(Monitor *mon);
71 void irq_info(Monitor *mon);
73 /* ISA */
74 #define IOAPIC_NUM_PINS 0x18
76 typedef struct isa_irq_state {
77 qemu_irq *i8259;
78 qemu_irq ioapic[IOAPIC_NUM_PINS];
79 } IsaIrqState;
81 void isa_irq_handler(void *opaque, int n, int level);
83 /* i8254.c */
85 #define PIT_FREQ 1193182
87 static inline ISADevice *pit_init(int base, int irq)
89 ISADevice *dev;
91 dev = isa_create("isa-pit");
92 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
93 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
94 qdev_init_nofail(&dev->qdev);
96 return dev;
99 void pit_set_gate(ISADevice *dev, int channel, int val);
100 int pit_get_gate(ISADevice *dev, int channel);
101 int pit_get_initial_count(ISADevice *dev, int channel);
102 int pit_get_mode(ISADevice *dev, int channel);
103 int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
105 void hpet_pit_disable(void);
106 void hpet_pit_enable(void);
108 /* vmport.c */
109 static inline void vmport_init(void)
111 isa_create_simple("vmport");
113 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
114 void vmmouse_get_data(uint32_t *data);
115 void vmmouse_set_data(const uint32_t *data);
117 /* pckbd.c */
119 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
120 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
121 target_phys_addr_t base, ram_addr_t size,
122 target_phys_addr_t mask);
123 void i8042_isa_mouse_fake_event(void *opaque);
124 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
126 /* pc.c */
127 extern int fd_bootchk;
129 void pc_register_ferr_irq(qemu_irq irq);
130 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
131 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
133 void pc_cpus_init(const char *cpu_model);
134 void pc_memory_init(MemoryRegion *system_memory,
135 const char *kernel_filename,
136 const char *kernel_cmdline,
137 const char *initrd_filename,
138 ram_addr_t below_4g_mem_size,
139 ram_addr_t above_4g_mem_size);
140 qemu_irq *pc_allocate_cpu_irq(void);
141 void pc_vga_init(PCIBus *pci_bus);
142 void pc_basic_device_init(qemu_irq *isa_irq,
143 ISADevice **rtc_state,
144 bool no_vmport);
145 void pc_init_ne2k_isa(NICInfo *nd);
146 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
147 const char *boot_device,
148 BusState *ide0, BusState *ide1,
149 ISADevice *s);
150 void pc_pci_device_init(PCIBus *pci_bus);
152 typedef void (*cpu_set_smm_t)(int smm, void *arg);
153 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
155 /* acpi.c */
156 extern int acpi_enabled;
157 extern char *acpi_tables;
158 extern size_t acpi_tables_len;
160 void acpi_bios_init(void);
161 int acpi_table_add(const char *table_desc);
163 /* acpi_piix.c */
165 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
166 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
167 int kvm_enabled);
168 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
170 /* hpet.c */
171 extern int no_hpet;
173 /* pcspk.c */
174 void pcspk_init(ISADevice *pit);
175 int pcspk_audio_init(qemu_irq *pic);
177 /* piix_pci.c */
178 struct PCII440FXState;
179 typedef struct PCII440FXState PCII440FXState;
181 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
182 qemu_irq *pic,
183 MemoryRegion *address_space_mem,
184 MemoryRegion *address_space_io,
185 ram_addr_t ram_size);
186 void i440fx_init_memory_mappings(PCII440FXState *d);
188 /* piix4.c */
189 extern PCIDevice *piix4_dev;
190 int piix4_init(PCIBus *bus, int devfn);
192 /* vga.c */
193 enum vga_retrace_method {
194 VGA_RETRACE_DUMB,
195 VGA_RETRACE_PRECISE
198 extern enum vga_retrace_method vga_retrace_method;
200 static inline int isa_vga_init(void)
202 ISADevice *dev;
204 dev = isa_try_create("isa-vga");
205 if (!dev) {
206 fprintf(stderr, "Warning: isa-vga not available\n");
207 return 0;
209 qdev_init_nofail(&dev->qdev);
210 return 1;
213 int pci_vga_init(PCIBus *bus);
214 int isa_vga_mm_init(target_phys_addr_t vram_base,
215 target_phys_addr_t ctrl_base, int it_shift);
217 /* cirrus_vga.c */
218 void pci_cirrus_vga_init(PCIBus *bus);
219 void isa_cirrus_vga_init(void);
221 /* ne2000.c */
222 static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
224 ISADevice *dev;
226 qemu_check_nic_model(nd, "ne2k_isa");
228 dev = isa_try_create("ne2k_isa");
229 if (!dev) {
230 return false;
232 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
233 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
234 qdev_set_nic_properties(&dev->qdev, nd);
235 qdev_init_nofail(&dev->qdev);
236 return true;
239 /* e820 types */
240 #define E820_RAM 1
241 #define E820_RESERVED 2
242 #define E820_ACPI 3
243 #define E820_NVS 4
244 #define E820_UNUSABLE 5
246 int e820_add_entry(uint64_t, uint64_t, uint32_t);
248 #endif