hw/nand.c

   1 /*
   2  * Flash NAND memory emulation.  Based on "16M x 8 Bit NAND Flash
   3  * Memory" datasheet for the KM29U128AT / K9F2808U0A chips from
   4  * Samsung Electronic.
   5  *
   6  * Copyright (c) 2006 Openedhand Ltd.
   7  * Written by Andrzej Zaborowski <balrog@zabor.org>
   8  *
   9  * This code is licensed under the GNU GPL v2.
  10  */
  11
  12 #ifndef NAND_IO
  13
  14 # include "hw.h"
  15 # include "flash.h"
  16 # include "block.h"
  17 /* FIXME: Pass block device as an argument.  */
  18 # include "sysemu.h"
  19
  20 # define NAND_CMD_READ0         0x00
  21 # define NAND_CMD_READ1         0x01
  22 # define NAND_CMD_READ2         0x50
  23 # define NAND_CMD_LPREAD2       0x30
  24 # define NAND_CMD_NOSERIALREAD2 0x35
  25 # define NAND_CMD_RANDOMREAD1   0x05
  26 # define NAND_CMD_RANDOMREAD2   0xe0
  27 # define NAND_CMD_READID        0x90
  28 # define NAND_CMD_RESET         0xff
  29 # define NAND_CMD_PAGEPROGRAM1  0x80
  30 # define NAND_CMD_PAGEPROGRAM2  0x10
  31 # define NAND_CMD_CACHEPROGRAM2 0x15
  32 # define NAND_CMD_BLOCKERASE1   0x60
  33 # define NAND_CMD_BLOCKERASE2   0xd0
  34 # define NAND_CMD_READSTATUS    0x70
  35 # define NAND_CMD_COPYBACKPRG1  0x85
  36
  37 # define NAND_IOSTATUS_ERROR    (1 << 0)
  38 # define NAND_IOSTATUS_PLANE0   (1 << 1)
  39 # define NAND_IOSTATUS_PLANE1   (1 << 2)
  40 # define NAND_IOSTATUS_PLANE2   (1 << 3)
  41 # define NAND_IOSTATUS_PLANE3   (1 << 4)
  42 # define NAND_IOSTATUS_BUSY     (1 << 6)
  43 # define NAND_IOSTATUS_UNPROTCT (1 << 7)
  44
  45 # define MAX_PAGE               0x800
  46 # define MAX_OOB                0x40
  47
  48 struct NANDFlashState {
  49     uint8_t manf_id, chip_id;
  50     int size, pages;
  51     int page_shift, oob_shift, erase_shift, addr_shift;
  52     uint8_t *storage;
  53     BlockDriverState *bdrv;
  54     int mem_oob;
  55
  56     int cle, ale, ce, wp, gnd;
  57
  58     uint8_t io[MAX_PAGE + MAX_OOB + 0x400];
  59     uint8_t *ioaddr;
  60     int iolen;
  61
  62     uint32_t cmd, addr;
  63     int addrlen;
  64     int status;
  65     int offset;
  66
  67     void (*blk_write)(NANDFlashState *s);
  68     void (*blk_erase)(NANDFlashState *s);
  69     void (*blk_load)(NANDFlashState *s, uint32_t addr, int offset);
  70 };
  71
  72 # define NAND_NO_AUTOINCR       0x00000001
  73 # define NAND_BUSWIDTH_16       0x00000002
  74 # define NAND_NO_PADDING        0x00000004
  75 # define NAND_CACHEPRG          0x00000008
  76 # define NAND_COPYBACK          0x00000010
  77 # define NAND_IS_AND            0x00000020
  78 # define NAND_4PAGE_ARRAY       0x00000040
  79 # define NAND_NO_READRDY        0x00000100
  80 # define NAND_SAMSUNG_LP        (NAND_NO_PADDING | NAND_COPYBACK)
  81
  82 # define NAND_IO
  83
  84 # define PAGE(addr)             ((addr) >> ADDR_SHIFT)
  85 # define PAGE_START(page)       (PAGE(page) * (PAGE_SIZE + OOB_SIZE))
  86 # define PAGE_MASK              ((1 << ADDR_SHIFT) - 1)
  87 # define OOB_SHIFT              (PAGE_SHIFT - 5)
  88 # define OOB_SIZE               (1 << OOB_SHIFT)
  89 # define SECTOR(addr)           ((addr) >> (9 + ADDR_SHIFT - PAGE_SHIFT))
  90 # define SECTOR_OFFSET(addr)    ((addr) & ((511 >> PAGE_SHIFT) << 8))
  91
  92 # define PAGE_SIZE              256
  93 # define PAGE_SHIFT             8
  94 # define PAGE_SECTORS           1
  95 # define ADDR_SHIFT             8
  96 # include "nand.c"
  97 # define PAGE_SIZE              512
  98 # define PAGE_SHIFT             9
  99 # define PAGE_SECTORS           1
 100 # define ADDR_SHIFT             8
 101 # include "nand.c"
 102 # define PAGE_SIZE              2048
 103 # define PAGE_SHIFT             11
 104 # define PAGE_SECTORS           4
 105 # define ADDR_SHIFT             16
 106 # include "nand.c"
 107
 108 /* Information based on Linux drivers/mtd/nand/nand_ids.c */
 109 static const struct {
 110     int size;
 111     int width;
 112     int page_shift;
 113     int erase_shift;
 114     uint32_t options;
 115 } nand_flash_ids[0x100] = {
 116     [0 ... 0xff] = { 0 },
 117
 118     [0x6e] = { 1,       8,      8, 4, 0 },
 119     [0x64] = { 2,       8,      8, 4, 0 },
 120     [0x6b] = { 4,       8,      9, 4, 0 },
 121     [0xe8] = { 1,       8,      8, 4, 0 },
 122     [0xec] = { 1,       8,      8, 4, 0 },
 123     [0xea] = { 2,       8,      8, 4, 0 },
 124     [0xd5] = { 4,       8,      9, 4, 0 },
 125     [0xe3] = { 4,       8,      9, 4, 0 },
 126     [0xe5] = { 4,       8,      9, 4, 0 },
 127     [0xd6] = { 8,       8,      9, 4, 0 },
 128
 129     [0x39] = { 8,       8,      9, 4, 0 },
 130     [0xe6] = { 8,       8,      9, 4, 0 },
 131     [0x49] = { 8,       16,     9, 4, NAND_BUSWIDTH_16 },
 132     [0x59] = { 8,       16,     9, 4, NAND_BUSWIDTH_16 },
 133
 134     [0x33] = { 16,      8,      9, 5, 0 },
 135     [0x73] = { 16,      8,      9, 5, 0 },
 136     [0x43] = { 16,      16,     9, 5, NAND_BUSWIDTH_16 },
 137     [0x53] = { 16,      16,     9, 5, NAND_BUSWIDTH_16 },
 138
 139     [0x35] = { 32,      8,      9, 5, 0 },
 140     [0x75] = { 32,      8,      9, 5, 0 },
 141     [0x45] = { 32,      16,     9, 5, NAND_BUSWIDTH_16 },
 142     [0x55] = { 32,      16,     9, 5, NAND_BUSWIDTH_16 },
 143
 144     [0x36] = { 64,      8,      9, 5, 0 },
 145     [0x76] = { 64,      8,      9, 5, 0 },
 146     [0x46] = { 64,      16,     9, 5, NAND_BUSWIDTH_16 },
 147     [0x56] = { 64,      16,     9, 5, NAND_BUSWIDTH_16 },
 148
 149     [0x78] = { 128,     8,      9, 5, 0 },
 150     [0x39] = { 128,     8,      9, 5, 0 },
 151     [0x79] = { 128,     8,      9, 5, 0 },
 152     [0x72] = { 128,     16,     9, 5, NAND_BUSWIDTH_16 },
 153     [0x49] = { 128,     16,     9, 5, NAND_BUSWIDTH_16 },
 154     [0x74] = { 128,     16,     9, 5, NAND_BUSWIDTH_16 },
 155     [0x59] = { 128,     16,     9, 5, NAND_BUSWIDTH_16 },
 156
 157     [0x71] = { 256,     8,      9, 5, 0 },
 158
 159     /*
 160      * These are the new chips with large page size. The pagesize and the
 161      * erasesize is determined from the extended id bytes
 162      */
 163 # define LP_OPTIONS     (NAND_SAMSUNG_LP | NAND_NO_READRDY | NAND_NO_AUTOINCR)
 164 # define LP_OPTIONS16   (LP_OPTIONS | NAND_BUSWIDTH_16)
 165
 166     /* 512 Megabit */
 167     [0xa2] = { 64,      8,      0, 0, LP_OPTIONS },
 168     [0xf2] = { 64,      8,      0, 0, LP_OPTIONS },
 169     [0xb2] = { 64,      16,     0, 0, LP_OPTIONS16 },
 170     [0xc2] = { 64,      16,     0, 0, LP_OPTIONS16 },
 171
 172     /* 1 Gigabit */
 173     [0xa1] = { 128,     8,      0, 0, LP_OPTIONS },
 174     [0xf1] = { 128,     8,      0, 0, LP_OPTIONS },
 175     [0xb1] = { 128,     16,     0, 0, LP_OPTIONS16 },
 176     [0xc1] = { 128,     16,     0, 0, LP_OPTIONS16 },
 177
 178     /* 2 Gigabit */
 179     [0xaa] = { 256,     8,      0, 0, LP_OPTIONS },
 180     [0xda] = { 256,     8,      0, 0, LP_OPTIONS },
 181     [0xba] = { 256,     16,     0, 0, LP_OPTIONS16 },
 182     [0xca] = { 256,     16,     0, 0, LP_OPTIONS16 },
 183
 184     /* 4 Gigabit */
 185     [0xac] = { 512,     8,      0, 0, LP_OPTIONS },
 186     [0xdc] = { 512,     8,      0, 0, LP_OPTIONS },
 187     [0xbc] = { 512,     16,     0, 0, LP_OPTIONS16 },
 188     [0xcc] = { 512,     16,     0, 0, LP_OPTIONS16 },
 189
 190     /* 8 Gigabit */
 191     [0xa3] = { 1024,    8,      0, 0, LP_OPTIONS },
 192     [0xd3] = { 1024,    8,      0, 0, LP_OPTIONS },
 193     [0xb3] = { 1024,    16,     0, 0, LP_OPTIONS16 },
 194     [0xc3] = { 1024,    16,     0, 0, LP_OPTIONS16 },
 195
 196     /* 16 Gigabit */
 197     [0xa5] = { 2048,    8,      0, 0, LP_OPTIONS },
 198     [0xd5] = { 2048,    8,      0, 0, LP_OPTIONS },
 199     [0xb5] = { 2048,    16,     0, 0, LP_OPTIONS16 },
 200     [0xc5] = { 2048,    16,     0, 0, LP_OPTIONS16 },
 201 };
 202
 203 static void nand_reset(NANDFlashState *s)
 204 {
 205     s->cmd = NAND_CMD_READ0;
 206     s->addr = 0;
 207     s->addrlen = 0;
 208     s->iolen = 0;
 209     s->offset = 0;
 210     s->status &= NAND_IOSTATUS_UNPROTCT;
 211 }
 212
 213 static void nand_command(NANDFlashState *s)
 214 {
 215     unsigned int offset;
 216     switch (s->cmd) {
 217     case NAND_CMD_READ0:
 218         s->iolen = 0;
 219         break;
 220
 221     case NAND_CMD_READID:
 222         s->io[0] = s->manf_id;
 223         s->io[1] = s->chip_id;
 224         s->io[2] = 'Q';         /* Don't-care byte (often 0xa5) */
 225         if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
 226             s->io[3] = 0x15;    /* Page Size, Block Size, Spare Size.. */
 227         else
 228             s->io[3] = 0xc0;    /* Multi-plane */
 229         s->ioaddr = s->io;
 230         s->iolen = 4;
 231         break;
 232
 233     case NAND_CMD_RANDOMREAD2:
 234     case NAND_CMD_NOSERIALREAD2:
 235         if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP))
 236             break;
 237         offset = s->addr & ((1 << s->addr_shift) - 1);
 238         s->blk_load(s, s->addr, offset);
 239         if (s->gnd)
 240             s->iolen = (1 << s->page_shift) - offset;
 241         else
 242             s->iolen = (1 << s->page_shift) + (1 << s->oob_shift) - offset;
 243         break;
 244
 245     case NAND_CMD_RESET:
 246         nand_reset(s);
 247         break;
 248
 249     case NAND_CMD_PAGEPROGRAM1:
 250         s->ioaddr = s->io;
 251         s->iolen = 0;
 252         break;
 253
 254     case NAND_CMD_PAGEPROGRAM2:
 255         if (s->wp) {
 256             s->blk_write(s);
 257         }
 258         break;
 259
 260     case NAND_CMD_BLOCKERASE1:
 261         break;
 262
 263     case NAND_CMD_BLOCKERASE2:
 264         if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
 265             s->addr <<= 16;
 266         else
 267             s->addr <<= 8;
 268
 269         if (s->wp) {
 270             s->blk_erase(s);
 271         }
 272         break;
 273
 274     case NAND_CMD_READSTATUS:
 275         s->io[0] = s->status;
 276         s->ioaddr = s->io;
 277         s->iolen = 1;
 278         break;
 279
 280     default:
 281         printf("%s: Unknown NAND command 0x%02x\n", __FUNCTION__, s->cmd);
 282     }
 283 }
 284
 285 static void nand_save(QEMUFile *f, void *opaque)
 286 {
 287     NANDFlashState *s = (NANDFlashState *) opaque;
 288     qemu_put_byte(f, s->cle);
 289     qemu_put_byte(f, s->ale);
 290     qemu_put_byte(f, s->ce);
 291     qemu_put_byte(f, s->wp);
 292     qemu_put_byte(f, s->gnd);
 293     qemu_put_buffer(f, s->io, sizeof(s->io));
 294     qemu_put_be32(f, s->ioaddr - s->io);
 295     qemu_put_be32(f, s->iolen);
 296
 297     qemu_put_be32s(f, &s->cmd);
 298     qemu_put_be32s(f, &s->addr);
 299     qemu_put_be32(f, s->addrlen);
 300     qemu_put_be32(f, s->status);
 301     qemu_put_be32(f, s->offset);
 302     /* XXX: do we want to save s->storage too? */
 303 }
 304
 305 static int nand_load(QEMUFile *f, void *opaque, int version_id)
 306 {
 307     NANDFlashState *s = (NANDFlashState *) opaque;
 308     s->cle = qemu_get_byte(f);
 309     s->ale = qemu_get_byte(f);
 310     s->ce = qemu_get_byte(f);
 311     s->wp = qemu_get_byte(f);
 312     s->gnd = qemu_get_byte(f);
 313     qemu_get_buffer(f, s->io, sizeof(s->io));
 314     s->ioaddr = s->io + qemu_get_be32(f);
 315     s->iolen = qemu_get_be32(f);
 316     if (s->ioaddr >= s->io + sizeof(s->io) || s->ioaddr < s->io)
 317         return -EINVAL;
 318
 319     qemu_get_be32s(f, &s->cmd);
 320     qemu_get_be32s(f, &s->addr);
 321     s->addrlen = qemu_get_be32(f);
 322     s->status = qemu_get_be32(f);
 323     s->offset = qemu_get_be32(f);
 324     return 0;
 325 }
 326
 327 /*
 328  * Chip inputs are CLE, ALE, CE, WP, GND and eight I/O pins.  Chip
 329  * outputs are R/B and eight I/O pins.
 330  *
 331  * CE, WP and R/B are active low.
 332  */
 333 void nand_setpins(NANDFlashState *s,
 334                 int cle, int ale, int ce, int wp, int gnd)
 335 {
 336     s->cle = cle;
 337     s->ale = ale;
 338     s->ce = ce;
 339     s->wp = wp;
 340     s->gnd = gnd;
 341     if (wp)
 342         s->status |= NAND_IOSTATUS_UNPROTCT;
 343     else
 344         s->status &= ~NAND_IOSTATUS_UNPROTCT;
 345 }
 346
 347 void nand_getpins(NANDFlashState *s, int *rb)
 348 {
 349     *rb = 1;
 350 }
 351
 352 void nand_setio(NANDFlashState *s, uint8_t value)
 353 {
 354     if (!s->ce && s->cle) {
 355         if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) {
 356             if (s->cmd == NAND_CMD_READ0 && value == NAND_CMD_LPREAD2)
 357                 return;
 358             if (value == NAND_CMD_RANDOMREAD1) {
 359                 s->addr &= ~((1 << s->addr_shift) - 1);
 360                 s->addrlen = 0;
 361                 return;
 362             }
 363         }
 364         if (value == NAND_CMD_READ0)
 365             s->offset = 0;
 366         else if (value == NAND_CMD_READ1) {
 367             s->offset = 0x100;
 368             value = NAND_CMD_READ0;
 369         }
 370         else if (value == NAND_CMD_READ2) {
 371             s->offset = 1 << s->page_shift;
 372             value = NAND_CMD_READ0;
 373         }
 374
 375         s->cmd = value;
 376
 377         if (s->cmd == NAND_CMD_READSTATUS ||
 378                 s->cmd == NAND_CMD_PAGEPROGRAM2 ||
 379                 s->cmd == NAND_CMD_BLOCKERASE1 ||
 380                 s->cmd == NAND_CMD_BLOCKERASE2 ||
 381                 s->cmd == NAND_CMD_NOSERIALREAD2 ||
 382                 s->cmd == NAND_CMD_RANDOMREAD2 ||
 383                 s->cmd == NAND_CMD_RESET)
 384             nand_command(s);
 385
 386         if (s->cmd != NAND_CMD_RANDOMREAD2) {
 387             s->addrlen = 0;
 388         }
 389     }
 390
 391     if (s->ale) {
 392         unsigned int shift = s->addrlen * 8;
 393         unsigned int mask = ~(0xff << shift);
 394         unsigned int v = value << shift;
 395
 396         s->addr = (s->addr & mask) | v;
 397         s->addrlen ++;
 398
 399         if (s->addrlen == 1 && s->cmd == NAND_CMD_READID)
 400             nand_command(s);
 401
 402         if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) &&
 403                 s->addrlen == 3 && (
 404                     s->cmd == NAND_CMD_READ0 ||
 405                     s->cmd == NAND_CMD_PAGEPROGRAM1))
 406             nand_command(s);
 407         if ((nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) &&
 408                s->addrlen == 4 && (
 409                     s->cmd == NAND_CMD_READ0 ||
 410                     s->cmd == NAND_CMD_PAGEPROGRAM1))
 411             nand_command(s);
 412     }
 413
 414     if (!s->cle && !s->ale && s->cmd == NAND_CMD_PAGEPROGRAM1) {
 415         if (s->iolen < (1 << s->page_shift) + (1 << s->oob_shift))
 416             s->io[s->iolen ++] = value;
 417     } else if (!s->cle && !s->ale && s->cmd == NAND_CMD_COPYBACKPRG1) {
 418         if ((s->addr & ((1 << s->addr_shift) - 1)) <
 419                 (1 << s->page_shift) + (1 << s->oob_shift)) {
 420             s->io[s->iolen + (s->addr & ((1 << s->addr_shift) - 1))] = value;
 421             s->addr ++;
 422         }
 423     }
 424 }
 425
 426 uint8_t nand_getio(NANDFlashState *s)
 427 {
 428     int offset;
 429
 430     /* Allow sequential reading */
 431     if (!s->iolen && s->cmd == NAND_CMD_READ0) {
 432         offset = (s->addr & ((1 << s->addr_shift) - 1)) + s->offset;
 433         s->offset = 0;
 434
 435         s->blk_load(s, s->addr, offset);
 436         if (s->gnd)
 437             s->iolen = (1 << s->page_shift) - offset;
 438         else
 439             s->iolen = (1 << s->page_shift) + (1 << s->oob_shift) - offset;
 440     }
 441
 442     if (s->ce || s->iolen <= 0)
 443         return 0;
 444
 445     s->iolen --;
 446     s->addr++;
 447     return *(s->ioaddr ++);
 448 }
 449
 450 NANDFlashState *nand_init(int manf_id, int chip_id)
 451 {
 452     int pagesize;
 453     NANDFlashState *s;
 454     DriveInfo *dinfo;
 455
 456     if (nand_flash_ids[chip_id].size == 0) {
 457         hw_error("%s: Unsupported NAND chip ID.\n", __FUNCTION__);
 458     }
 459
 460     s = (NANDFlashState *) qemu_mallocz(sizeof(NANDFlashState));
 461     dinfo = drive_get(IF_MTD, 0, 0);
 462     if (dinfo)
 463         s->bdrv = dinfo->bdrv;
 464     s->manf_id = manf_id;
 465     s->chip_id = chip_id;
 466     s->size = nand_flash_ids[s->chip_id].size << 20;
 467     if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) {
 468         s->page_shift = 11;
 469         s->erase_shift = 6;
 470     } else {
 471         s->page_shift = nand_flash_ids[s->chip_id].page_shift;
 472         s->erase_shift = nand_flash_ids[s->chip_id].erase_shift;
 473     }
 474
 475     switch (1 << s->page_shift) {
 476     case 256:
 477         nand_init_256(s);
 478         break;
 479     case 512:
 480         nand_init_512(s);
 481         break;
 482     case 2048:
 483         nand_init_2048(s);
 484         break;
 485     default:
 486         hw_error("%s: Unsupported NAND block size.\n", __FUNCTION__);
 487     }
 488
 489     pagesize = 1 << s->oob_shift;
 490     s->mem_oob = 1;
 491     if (s->bdrv && bdrv_getlength(s->bdrv) >=
 492                     (s->pages << s->page_shift) + (s->pages << s->oob_shift)) {
 493         pagesize = 0;
 494         s->mem_oob = 0;
 495     }
 496
 497     if (!s->bdrv)
 498         pagesize += 1 << s->page_shift;
 499     if (pagesize)
 500         s->storage = (uint8_t *) memset(qemu_malloc(s->pages * pagesize),
 501                         0xff, s->pages * pagesize);
 502     /* Give s->ioaddr a sane value in case we save state before it
 503        is used.  */
 504     s->ioaddr = s->io;
 505
 506     register_savevm("nand", -1, 0, nand_save, nand_load, s);
 507
 508     return s;
 509 }
 510
 511 void nand_done(NANDFlashState *s)
 512 {
 513     if (s->bdrv) {
 514         bdrv_close(s->bdrv);
 515         bdrv_delete(s->bdrv);
 516     }
 517
 518     if (!s->bdrv || s->mem_oob)
 519         qemu_free(s->storage);
 520
 521     qemu_free(s);
 522 }
 523
 524 #else
 525
 526 /* Program a single page */
 527 static void glue(nand_blk_write_, PAGE_SIZE)(NANDFlashState *s)
 528 {
 529     uint32_t off, page, sector, soff;
 530     uint8_t iobuf[(PAGE_SECTORS + 2) * 0x200];
 531     if (PAGE(s->addr) >= s->pages)
 532         return;
 533
 534     if (!s->bdrv) {
 535         memcpy(s->storage + PAGE_START(s->addr) + (s->addr & PAGE_MASK) +
 536                         s->offset, s->io, s->iolen);
 537     } else if (s->mem_oob) {
 538         sector = SECTOR(s->addr);
 539         off = (s->addr & PAGE_MASK) + s->offset;
 540         soff = SECTOR_OFFSET(s->addr);
 541         if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS) == -1) {
 542             printf("%s: read error in sector %i\n", __FUNCTION__, sector);
 543             return;
 544         }
 545
 546         memcpy(iobuf + (soff | off), s->io, MIN(s->iolen, PAGE_SIZE - off));
 547         if (off + s->iolen > PAGE_SIZE) {
 548             page = PAGE(s->addr);
 549             memcpy(s->storage + (page << OOB_SHIFT), s->io + PAGE_SIZE - off,
 550                             MIN(OOB_SIZE, off + s->iolen - PAGE_SIZE));
 551         }
 552
 553         if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS) == -1)
 554             printf("%s: write error in sector %i\n", __FUNCTION__, sector);
 555     } else {
 556         off = PAGE_START(s->addr) + (s->addr & PAGE_MASK) + s->offset;
 557         sector = off >> 9;
 558         soff = off & 0x1ff;
 559         if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) == -1) {
 560             printf("%s: read error in sector %i\n", __FUNCTION__, sector);
 561             return;
 562         }
 563
 564         memcpy(iobuf + soff, s->io, s->iolen);
 565
 566         if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) == -1)
 567             printf("%s: write error in sector %i\n", __FUNCTION__, sector);
 568     }
 569     s->offset = 0;
 570 }
 571
 572 /* Erase a single block */
 573 static void glue(nand_blk_erase_, PAGE_SIZE)(NANDFlashState *s)
 574 {
 575     uint32_t i, page, addr;
 576     uint8_t iobuf[0x200] = { [0 ... 0x1ff] = 0xff, };
 577     addr = s->addr & ~((1 << (ADDR_SHIFT + s->erase_shift)) - 1);
 578
 579     if (PAGE(addr) >= s->pages)
 580         return;
 581
 582     if (!s->bdrv) {
 583         memset(s->storage + PAGE_START(addr),
 584                         0xff, (PAGE_SIZE + OOB_SIZE) << s->erase_shift);
 585     } else if (s->mem_oob) {
 586         memset(s->storage + (PAGE(addr) << OOB_SHIFT),
 587                         0xff, OOB_SIZE << s->erase_shift);
 588         i = SECTOR(addr);
 589         page = SECTOR(addr + (ADDR_SHIFT + s->erase_shift));
 590         for (; i < page; i ++)
 591             if (bdrv_write(s->bdrv, i, iobuf, 1) == -1)
 592                 printf("%s: write error in sector %i\n", __FUNCTION__, i);
 593     } else {
 594         addr = PAGE_START(addr);
 595         page = addr >> 9;
 596         if (bdrv_read(s->bdrv, page, iobuf, 1) == -1)
 597             printf("%s: read error in sector %i\n", __FUNCTION__, page);
 598         memset(iobuf + (addr & 0x1ff), 0xff, (~addr & 0x1ff) + 1);
 599         if (bdrv_write(s->bdrv, page, iobuf, 1) == -1)
 600             printf("%s: write error in sector %i\n", __FUNCTION__, page);
 601
 602         memset(iobuf, 0xff, 0x200);
 603         i = (addr & ~0x1ff) + 0x200;
 604         for (addr += ((PAGE_SIZE + OOB_SIZE) << s->erase_shift) - 0x200;
 605                         i < addr; i += 0x200)
 606             if (bdrv_write(s->bdrv, i >> 9, iobuf, 1) == -1)
 607                 printf("%s: write error in sector %i\n", __FUNCTION__, i >> 9);
 608
 609         page = i >> 9;
 610         if (bdrv_read(s->bdrv, page, iobuf, 1) == -1)
 611             printf("%s: read error in sector %i\n", __FUNCTION__, page);
 612         memset(iobuf, 0xff, ((addr - 1) & 0x1ff) + 1);
 613         if (bdrv_write(s->bdrv, page, iobuf, 1) == -1)
 614             printf("%s: write error in sector %i\n", __FUNCTION__, page);
 615     }
 616 }
 617
 618 static void glue(nand_blk_load_, PAGE_SIZE)(NANDFlashState *s,
 619                 uint32_t addr, int offset)
 620 {
 621     if (PAGE(addr) >= s->pages)
 622         return;
 623
 624     if (s->bdrv) {
 625         if (s->mem_oob) {
 626             if (bdrv_read(s->bdrv, SECTOR(addr), s->io, PAGE_SECTORS) == -1)
 627                 printf("%s: read error in sector %i\n",
 628                                 __FUNCTION__, SECTOR(addr));
 629             memcpy(s->io + SECTOR_OFFSET(s->addr) + PAGE_SIZE,
 630                             s->storage + (PAGE(s->addr) << OOB_SHIFT),
 631                             OOB_SIZE);
 632             s->ioaddr = s->io + SECTOR_OFFSET(s->addr) + offset;
 633         } else {
 634             if (bdrv_read(s->bdrv, PAGE_START(addr) >> 9,
 635                                     s->io, (PAGE_SECTORS + 2)) == -1)
 636                 printf("%s: read error in sector %i\n",
 637                                 __FUNCTION__, PAGE_START(addr) >> 9);
 638             s->ioaddr = s->io + (PAGE_START(addr) & 0x1ff) + offset;
 639         }
 640     } else {
 641         memcpy(s->io, s->storage + PAGE_START(s->addr) +
 642                         offset, PAGE_SIZE + OOB_SIZE - offset);
 643         s->ioaddr = s->io;
 644     }
 645 }
 646
 647 static void glue(nand_init_, PAGE_SIZE)(NANDFlashState *s)
 648 {
 649     s->oob_shift = PAGE_SHIFT - 5;
 650     s->pages = s->size >> PAGE_SHIFT;
 651     s->addr_shift = ADDR_SHIFT;
 652
 653     s->blk_erase = glue(nand_blk_erase_, PAGE_SIZE);
 654     s->blk_write = glue(nand_blk_write_, PAGE_SIZE);
 655     s->blk_load = glue(nand_blk_load_, PAGE_SIZE);
 656 }
 657
 658 # undef PAGE_SIZE
 659 # undef PAGE_SHIFT
 660 # undef PAGE_SECTORS
 661 # undef ADDR_SHIFT
 662 #endif  /* NAND_IO */