2 * defines common to all virtual CPUs
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu-common.h"
23 #include "cpu-common.h"
25 /* some important defines:
27 * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
30 * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
31 * otherwise little endian.
33 * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
35 * TARGET_WORDS_BIGENDIAN : same for target cpu
38 #include "softfloat.h"
40 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
46 static inline uint16_t tswap16(uint16_t s
)
51 static inline uint32_t tswap32(uint32_t s
)
56 static inline uint64_t tswap64(uint64_t s
)
61 static inline void tswap16s(uint16_t *s
)
66 static inline void tswap32s(uint32_t *s
)
71 static inline void tswap64s(uint64_t *s
)
78 static inline uint16_t tswap16(uint16_t s
)
83 static inline uint32_t tswap32(uint32_t s
)
88 static inline uint64_t tswap64(uint64_t s
)
93 static inline void tswap16s(uint16_t *s
)
97 static inline void tswap32s(uint32_t *s
)
101 static inline void tswap64s(uint64_t *s
)
107 #if TARGET_LONG_SIZE == 4
108 #define tswapl(s) tswap32(s)
109 #define tswapls(s) tswap32s((uint32_t *)(s))
110 #define bswaptls(s) bswap32s(s)
112 #define tswapl(s) tswap64(s)
113 #define tswapls(s) tswap64s((uint64_t *)(s))
114 #define bswaptls(s) bswap64s(s)
122 /* NOTE: arm FPA is horrible as double 32 bit words are stored in big
126 #if defined(HOST_WORDS_BIGENDIAN) \
127 || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT))
144 #if defined(HOST_WORDS_BIGENDIAN) \
145 || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT))
171 /* CPU memory access without any memory or io remapping */
174 * the generic syntax for the memory accesses is:
176 * load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
178 * store: st{type}{size}{endian}_{access_type}(ptr, val)
181 * (empty): integer access
185 * (empty): for floats or 32 bit size
196 * (empty): target cpu endianness or 8 bit access
197 * r : reversed target cpu endianness (not implemented yet)
198 * be : big endian (not implemented yet)
199 * le : little endian (not implemented yet)
202 * raw : host memory access
203 * user : user mode access using soft MMU
204 * kernel : kernel mode access using soft MMU
206 static inline int ldub_p(const void *ptr
)
208 return *(uint8_t *)ptr
;
211 static inline int ldsb_p(const void *ptr
)
213 return *(int8_t *)ptr
;
216 static inline void stb_p(void *ptr
, int v
)
221 /* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
222 kernel handles unaligned load/stores may give better results, but
223 it is a system wide setting : bad */
224 #if defined(HOST_WORDS_BIGENDIAN) || defined(WORDS_ALIGNED)
226 /* conservative code for little endian unaligned accesses */
227 static inline int lduw_le_p(const void *ptr
)
231 __asm__
__volatile__ ("lhbrx %0,0,%1" : "=r" (val
) : "r" (ptr
));
234 const uint8_t *p
= ptr
;
235 return p
[0] | (p
[1] << 8);
239 static inline int ldsw_le_p(const void *ptr
)
243 __asm__
__volatile__ ("lhbrx %0,0,%1" : "=r" (val
) : "r" (ptr
));
246 const uint8_t *p
= ptr
;
247 return (int16_t)(p
[0] | (p
[1] << 8));
251 static inline int ldl_le_p(const void *ptr
)
255 __asm__
__volatile__ ("lwbrx %0,0,%1" : "=r" (val
) : "r" (ptr
));
258 const uint8_t *p
= ptr
;
259 return p
[0] | (p
[1] << 8) | (p
[2] << 16) | (p
[3] << 24);
263 static inline uint64_t ldq_le_p(const void *ptr
)
265 const uint8_t *p
= ptr
;
268 v2
= ldl_le_p(p
+ 4);
269 return v1
| ((uint64_t)v2
<< 32);
272 static inline void stw_le_p(void *ptr
, int v
)
275 __asm__
__volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr
) : "r" (v
), "r" (ptr
));
283 static inline void stl_le_p(void *ptr
, int v
)
286 __asm__
__volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr
) : "r" (v
), "r" (ptr
));
296 static inline void stq_le_p(void *ptr
, uint64_t v
)
299 stl_le_p(p
, (uint32_t)v
);
300 stl_le_p(p
+ 4, v
>> 32);
305 static inline float32
ldfl_le_p(const void *ptr
)
315 static inline void stfl_le_p(void *ptr
, float32 v
)
325 static inline float64
ldfq_le_p(const void *ptr
)
328 u
.l
.lower
= ldl_le_p(ptr
);
329 u
.l
.upper
= ldl_le_p(ptr
+ 4);
333 static inline void stfq_le_p(void *ptr
, float64 v
)
337 stl_le_p(ptr
, u
.l
.lower
);
338 stl_le_p(ptr
+ 4, u
.l
.upper
);
343 static inline int lduw_le_p(const void *ptr
)
345 return *(uint16_t *)ptr
;
348 static inline int ldsw_le_p(const void *ptr
)
350 return *(int16_t *)ptr
;
353 static inline int ldl_le_p(const void *ptr
)
355 return *(uint32_t *)ptr
;
358 static inline uint64_t ldq_le_p(const void *ptr
)
360 return *(uint64_t *)ptr
;
363 static inline void stw_le_p(void *ptr
, int v
)
365 *(uint16_t *)ptr
= v
;
368 static inline void stl_le_p(void *ptr
, int v
)
370 *(uint32_t *)ptr
= v
;
373 static inline void stq_le_p(void *ptr
, uint64_t v
)
375 *(uint64_t *)ptr
= v
;
380 static inline float32
ldfl_le_p(const void *ptr
)
382 return *(float32
*)ptr
;
385 static inline float64
ldfq_le_p(const void *ptr
)
387 return *(float64
*)ptr
;
390 static inline void stfl_le_p(void *ptr
, float32 v
)
395 static inline void stfq_le_p(void *ptr
, float64 v
)
401 #if !defined(HOST_WORDS_BIGENDIAN) || defined(WORDS_ALIGNED)
403 static inline int lduw_be_p(const void *ptr
)
405 #if defined(__i386__)
407 asm volatile ("movzwl %1, %0\n"
410 : "m" (*(uint16_t *)ptr
));
413 const uint8_t *b
= ptr
;
414 return ((b
[0] << 8) | b
[1]);
418 static inline int ldsw_be_p(const void *ptr
)
420 #if defined(__i386__)
422 asm volatile ("movzwl %1, %0\n"
425 : "m" (*(uint16_t *)ptr
));
428 const uint8_t *b
= ptr
;
429 return (int16_t)((b
[0] << 8) | b
[1]);
433 static inline int ldl_be_p(const void *ptr
)
435 #if defined(__i386__) || defined(__x86_64__)
437 asm volatile ("movl %1, %0\n"
440 : "m" (*(uint32_t *)ptr
));
443 const uint8_t *b
= ptr
;
444 return (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | b
[3];
448 static inline uint64_t ldq_be_p(const void *ptr
)
452 b
= ldl_be_p((uint8_t *)ptr
+ 4);
453 return (((uint64_t)a
<<32)|b
);
456 static inline void stw_be_p(void *ptr
, int v
)
458 #if defined(__i386__)
459 asm volatile ("xchgb %b0, %h0\n"
462 : "m" (*(uint16_t *)ptr
), "0" (v
));
464 uint8_t *d
= (uint8_t *) ptr
;
470 static inline void stl_be_p(void *ptr
, int v
)
472 #if defined(__i386__) || defined(__x86_64__)
473 asm volatile ("bswap %0\n"
476 : "m" (*(uint32_t *)ptr
), "0" (v
));
478 uint8_t *d
= (uint8_t *) ptr
;
486 static inline void stq_be_p(void *ptr
, uint64_t v
)
488 stl_be_p(ptr
, v
>> 32);
489 stl_be_p((uint8_t *)ptr
+ 4, v
);
494 static inline float32
ldfl_be_p(const void *ptr
)
504 static inline void stfl_be_p(void *ptr
, float32 v
)
514 static inline float64
ldfq_be_p(const void *ptr
)
517 u
.l
.upper
= ldl_be_p(ptr
);
518 u
.l
.lower
= ldl_be_p((uint8_t *)ptr
+ 4);
522 static inline void stfq_be_p(void *ptr
, float64 v
)
526 stl_be_p(ptr
, u
.l
.upper
);
527 stl_be_p((uint8_t *)ptr
+ 4, u
.l
.lower
);
532 static inline int lduw_be_p(const void *ptr
)
534 return *(uint16_t *)ptr
;
537 static inline int ldsw_be_p(const void *ptr
)
539 return *(int16_t *)ptr
;
542 static inline int ldl_be_p(const void *ptr
)
544 return *(uint32_t *)ptr
;
547 static inline uint64_t ldq_be_p(const void *ptr
)
549 return *(uint64_t *)ptr
;
552 static inline void stw_be_p(void *ptr
, int v
)
554 *(uint16_t *)ptr
= v
;
557 static inline void stl_be_p(void *ptr
, int v
)
559 *(uint32_t *)ptr
= v
;
562 static inline void stq_be_p(void *ptr
, uint64_t v
)
564 *(uint64_t *)ptr
= v
;
569 static inline float32
ldfl_be_p(const void *ptr
)
571 return *(float32
*)ptr
;
574 static inline float64
ldfq_be_p(const void *ptr
)
576 return *(float64
*)ptr
;
579 static inline void stfl_be_p(void *ptr
, float32 v
)
584 static inline void stfq_be_p(void *ptr
, float64 v
)
591 /* target CPU memory access functions */
592 #if defined(TARGET_WORDS_BIGENDIAN)
593 #define lduw_p(p) lduw_be_p(p)
594 #define ldsw_p(p) ldsw_be_p(p)
595 #define ldl_p(p) ldl_be_p(p)
596 #define ldq_p(p) ldq_be_p(p)
597 #define ldfl_p(p) ldfl_be_p(p)
598 #define ldfq_p(p) ldfq_be_p(p)
599 #define stw_p(p, v) stw_be_p(p, v)
600 #define stl_p(p, v) stl_be_p(p, v)
601 #define stq_p(p, v) stq_be_p(p, v)
602 #define stfl_p(p, v) stfl_be_p(p, v)
603 #define stfq_p(p, v) stfq_be_p(p, v)
605 #define lduw_p(p) lduw_le_p(p)
606 #define ldsw_p(p) ldsw_le_p(p)
607 #define ldl_p(p) ldl_le_p(p)
608 #define ldq_p(p) ldq_le_p(p)
609 #define ldfl_p(p) ldfl_le_p(p)
610 #define ldfq_p(p) ldfq_le_p(p)
611 #define stw_p(p, v) stw_le_p(p, v)
612 #define stl_p(p, v) stl_le_p(p, v)
613 #define stq_p(p, v) stq_le_p(p, v)
614 #define stfl_p(p, v) stfl_le_p(p, v)
615 #define stfq_p(p, v) stfq_le_p(p, v)
618 /* MMU memory access macros */
620 #if defined(CONFIG_USER_ONLY)
622 #include "qemu-types.h"
624 /* On some host systems the guest address space is reserved on the host.
625 * This allows the guest address space to be offset to a convenient location.
627 #if defined(CONFIG_USE_GUEST_BASE)
628 extern unsigned long guest_base
;
629 extern int have_guest_base
;
630 #define GUEST_BASE guest_base
632 #define GUEST_BASE 0ul
635 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */
636 #define g2h(x) ((void *)((unsigned long)(x) + GUEST_BASE))
638 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
639 #define h2g_valid(x) 1
641 #define h2g_valid(x) ({ \
642 unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
643 __guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS); \
648 unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
649 /* Check if given address fits target address space */ \
650 assert(h2g_valid(x)); \
654 #define saddr(x) g2h(x)
655 #define laddr(x) g2h(x)
657 #else /* !CONFIG_USER_ONLY */
658 /* NOTE: we use double casts if pointers and target_ulong have
660 #define saddr(x) (uint8_t *)(long)(x)
661 #define laddr(x) (uint8_t *)(long)(x)
664 #define ldub_raw(p) ldub_p(laddr((p)))
665 #define ldsb_raw(p) ldsb_p(laddr((p)))
666 #define lduw_raw(p) lduw_p(laddr((p)))
667 #define ldsw_raw(p) ldsw_p(laddr((p)))
668 #define ldl_raw(p) ldl_p(laddr((p)))
669 #define ldq_raw(p) ldq_p(laddr((p)))
670 #define ldfl_raw(p) ldfl_p(laddr((p)))
671 #define ldfq_raw(p) ldfq_p(laddr((p)))
672 #define stb_raw(p, v) stb_p(saddr((p)), v)
673 #define stw_raw(p, v) stw_p(saddr((p)), v)
674 #define stl_raw(p, v) stl_p(saddr((p)), v)
675 #define stq_raw(p, v) stq_p(saddr((p)), v)
676 #define stfl_raw(p, v) stfl_p(saddr((p)), v)
677 #define stfq_raw(p, v) stfq_p(saddr((p)), v)
680 #if defined(CONFIG_USER_ONLY)
682 /* if user mode, no other memory access functions */
683 #define ldub(p) ldub_raw(p)
684 #define ldsb(p) ldsb_raw(p)
685 #define lduw(p) lduw_raw(p)
686 #define ldsw(p) ldsw_raw(p)
687 #define ldl(p) ldl_raw(p)
688 #define ldq(p) ldq_raw(p)
689 #define ldfl(p) ldfl_raw(p)
690 #define ldfq(p) ldfq_raw(p)
691 #define stb(p, v) stb_raw(p, v)
692 #define stw(p, v) stw_raw(p, v)
693 #define stl(p, v) stl_raw(p, v)
694 #define stq(p, v) stq_raw(p, v)
695 #define stfl(p, v) stfl_raw(p, v)
696 #define stfq(p, v) stfq_raw(p, v)
698 #define ldub_code(p) ldub_raw(p)
699 #define ldsb_code(p) ldsb_raw(p)
700 #define lduw_code(p) lduw_raw(p)
701 #define ldsw_code(p) ldsw_raw(p)
702 #define ldl_code(p) ldl_raw(p)
703 #define ldq_code(p) ldq_raw(p)
705 #define ldub_kernel(p) ldub_raw(p)
706 #define ldsb_kernel(p) ldsb_raw(p)
707 #define lduw_kernel(p) lduw_raw(p)
708 #define ldsw_kernel(p) ldsw_raw(p)
709 #define ldl_kernel(p) ldl_raw(p)
710 #define ldq_kernel(p) ldq_raw(p)
711 #define ldfl_kernel(p) ldfl_raw(p)
712 #define ldfq_kernel(p) ldfq_raw(p)
713 #define stb_kernel(p, v) stb_raw(p, v)
714 #define stw_kernel(p, v) stw_raw(p, v)
715 #define stl_kernel(p, v) stl_raw(p, v)
716 #define stq_kernel(p, v) stq_raw(p, v)
717 #define stfl_kernel(p, v) stfl_raw(p, v)
718 #define stfq_kernel(p, vt) stfq_raw(p, v)
720 #endif /* defined(CONFIG_USER_ONLY) */
722 /* page related stuff */
724 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
725 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
726 #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
728 /* ??? These should be the larger of unsigned long and target_ulong. */
729 extern unsigned long qemu_real_host_page_size
;
730 extern unsigned long qemu_host_page_bits
;
731 extern unsigned long qemu_host_page_size
;
732 extern unsigned long qemu_host_page_mask
;
734 #define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
736 /* same as PROT_xxx */
737 #define PAGE_READ 0x0001
738 #define PAGE_WRITE 0x0002
739 #define PAGE_EXEC 0x0004
740 #define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
741 #define PAGE_VALID 0x0008
742 /* original state of the write flag (used when tracking self-modifying
744 #define PAGE_WRITE_ORG 0x0010
745 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
746 /* FIXME: Code that sets/uses this is broken and needs to go away. */
747 #define PAGE_RESERVED 0x0020
750 #if defined(CONFIG_USER_ONLY)
751 void page_dump(FILE *f
);
753 typedef int (*walk_memory_regions_fn
)(void *, abi_ulong
,
754 abi_ulong
, unsigned long);
755 int walk_memory_regions(void *, walk_memory_regions_fn
);
757 int page_get_flags(target_ulong address
);
758 void page_set_flags(target_ulong start
, target_ulong end
, int flags
);
759 int page_check_range(target_ulong start
, target_ulong len
, int flags
);
762 CPUState
*cpu_copy(CPUState
*env
);
763 CPUState
*qemu_get_cpu(int cpu
);
765 void cpu_dump_state(CPUState
*env
, FILE *f
,
766 int (*cpu_fprintf
)(FILE *f
, const char *fmt
, ...),
768 void cpu_dump_statistics (CPUState
*env
, FILE *f
,
769 int (*cpu_fprintf
)(FILE *f
, const char *fmt
, ...),
772 void QEMU_NORETURN
cpu_abort(CPUState
*env
, const char *fmt
, ...)
773 __attribute__ ((__format__ (__printf__
, 2, 3)));
774 extern CPUState
*first_cpu
;
775 extern CPUState
*cpu_single_env
;
777 #define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */
778 #define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
779 #define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */
780 #define CPU_INTERRUPT_FIQ 0x10 /* Fast interrupt pending. */
781 #define CPU_INTERRUPT_HALT 0x20 /* CPU halt wanted */
782 #define CPU_INTERRUPT_SMI 0x40 /* (x86 only) SMI interrupt pending */
783 #define CPU_INTERRUPT_DEBUG 0x80 /* Debug event occured. */
784 #define CPU_INTERRUPT_VIRQ 0x100 /* virtual interrupt pending. */
785 #define CPU_INTERRUPT_NMI 0x200 /* NMI pending. */
786 #define CPU_INTERRUPT_INIT 0x400 /* INIT pending. */
787 #define CPU_INTERRUPT_SIPI 0x800 /* SIPI pending. */
788 #define CPU_INTERRUPT_MCE 0x1000 /* (x86 only) MCE pending. */
790 void cpu_interrupt(CPUState
*s
, int mask
);
791 void cpu_reset_interrupt(CPUState
*env
, int mask
);
793 void cpu_exit(CPUState
*s
);
795 int qemu_cpu_has_work(CPUState
*env
);
797 /* Breakpoint/watchpoint flags */
798 #define BP_MEM_READ 0x01
799 #define BP_MEM_WRITE 0x02
800 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
801 #define BP_STOP_BEFORE_ACCESS 0x04
802 #define BP_WATCHPOINT_HIT 0x08
806 int cpu_breakpoint_insert(CPUState
*env
, target_ulong pc
, int flags
,
807 CPUBreakpoint
**breakpoint
);
808 int cpu_breakpoint_remove(CPUState
*env
, target_ulong pc
, int flags
);
809 void cpu_breakpoint_remove_by_ref(CPUState
*env
, CPUBreakpoint
*breakpoint
);
810 void cpu_breakpoint_remove_all(CPUState
*env
, int mask
);
811 int cpu_watchpoint_insert(CPUState
*env
, target_ulong addr
, target_ulong len
,
812 int flags
, CPUWatchpoint
**watchpoint
);
813 int cpu_watchpoint_remove(CPUState
*env
, target_ulong addr
,
814 target_ulong len
, int flags
);
815 void cpu_watchpoint_remove_by_ref(CPUState
*env
, CPUWatchpoint
*watchpoint
);
816 void cpu_watchpoint_remove_all(CPUState
*env
, int mask
);
818 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
819 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
820 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
822 void cpu_single_step(CPUState
*env
, int enabled
);
823 void cpu_reset(CPUState
*s
);
824 int cpu_is_stopped(CPUState
*env
);
825 void run_on_cpu(CPUState
*env
, void (*func
)(void *data
), void *data
);
827 #define CPU_LOG_TB_OUT_ASM (1 << 0)
828 #define CPU_LOG_TB_IN_ASM (1 << 1)
829 #define CPU_LOG_TB_OP (1 << 2)
830 #define CPU_LOG_TB_OP_OPT (1 << 3)
831 #define CPU_LOG_INT (1 << 4)
832 #define CPU_LOG_EXEC (1 << 5)
833 #define CPU_LOG_PCALL (1 << 6)
834 #define CPU_LOG_IOPORT (1 << 7)
835 #define CPU_LOG_TB_CPU (1 << 8)
836 #define CPU_LOG_RESET (1 << 9)
838 /* define log items */
839 typedef struct CPULogItem
{
845 extern const CPULogItem cpu_log_items
[];
847 void cpu_set_log(int log_flags
);
848 void cpu_set_log_filename(const char *filename
);
849 int cpu_str_to_log_mask(const char *str
);
851 #if !defined(CONFIG_USER_ONLY)
853 /* Return the physical page corresponding to a virtual one. Use it
854 only for debugging because no protection checks are done. Return -1
856 target_phys_addr_t
cpu_get_phys_page_debug(CPUState
*env
, target_ulong addr
);
860 extern int phys_ram_fd
;
861 extern uint8_t *phys_ram_dirty
;
862 extern ram_addr_t ram_size
;
863 extern ram_addr_t last_ram_offset
;
865 extern const char *mem_path
;
866 extern int mem_prealloc
;
868 /* physical memory access */
870 /* MMIO pages are identified by a combination of an IO device index and
871 3 flags. The ROMD code stores the page ram offset in iotlb entry,
872 so only a limited number of ids are avaiable. */
874 #define IO_MEM_NB_ENTRIES (1 << (TARGET_PAGE_BITS - IO_MEM_SHIFT))
876 /* Flags stored in the low bits of the TLB virtual address. These are
877 defined so that fast path ram access is all zeros. */
878 /* Zero if TLB entry is valid. */
879 #define TLB_INVALID_MASK (1 << 3)
880 /* Set if TLB entry references a clean RAM page. The iotlb entry will
881 contain the page physical address. */
882 #define TLB_NOTDIRTY (1 << 4)
883 /* Set if TLB entry is an IO callback. */
884 #define TLB_MMIO (1 << 5)
886 #define VGA_DIRTY_FLAG 0x01
887 #define CODE_DIRTY_FLAG 0x02
888 #define MIGRATION_DIRTY_FLAG 0x08
890 /* read dirty bit (return 0 or 1) */
891 static inline int cpu_physical_memory_is_dirty(ram_addr_t addr
)
893 return phys_ram_dirty
[addr
>> TARGET_PAGE_BITS
] == 0xff;
896 static inline int cpu_physical_memory_get_dirty_flags(ram_addr_t addr
)
898 return phys_ram_dirty
[addr
>> TARGET_PAGE_BITS
];
901 static inline int cpu_physical_memory_get_dirty(ram_addr_t addr
,
904 return phys_ram_dirty
[addr
>> TARGET_PAGE_BITS
] & dirty_flags
;
907 static inline void cpu_physical_memory_set_dirty(ram_addr_t addr
)
909 phys_ram_dirty
[addr
>> TARGET_PAGE_BITS
] = 0xff;
912 static inline int cpu_physical_memory_set_dirty_flags(ram_addr_t addr
,
915 return phys_ram_dirty
[addr
>> TARGET_PAGE_BITS
] |= dirty_flags
;
918 static inline void cpu_physical_memory_mask_dirty_range(ram_addr_t start
,
925 len
= length
>> TARGET_PAGE_BITS
;
927 p
= phys_ram_dirty
+ (start
>> TARGET_PAGE_BITS
);
928 for (i
= 0; i
< len
; i
++) {
933 void cpu_physical_memory_reset_dirty(ram_addr_t start
, ram_addr_t end
,
935 void cpu_tlb_update_dirty(CPUState
*env
);
937 int cpu_physical_memory_set_dirty_tracking(int enable
);
939 int cpu_physical_memory_get_dirty_tracking(void);
941 int cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr
,
942 target_phys_addr_t end_addr
);
944 void dump_exec_info(FILE *f
,
945 int (*cpu_fprintf
)(FILE *f
, const char *fmt
, ...));
946 #endif /* !CONFIG_USER_ONLY */
948 int cpu_memory_rw_debug(CPUState
*env
, target_ulong addr
,
949 uint8_t *buf
, int len
, int is_write
);
951 void cpu_inject_x86_mce(CPUState
*cenv
, int bank
, uint64_t status
,
952 uint64_t mcg_status
, uint64_t addr
, uint64_t misc
);
954 #endif /* CPU_ALL_H */