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migration: move some declarations to migration.h
[qemu/lumag.git] / target-i386 / cpuid.c
blob814d13e767250f97f3ea71940d525f9067d9846b
1 /*
2 * i386 CPUID helper functions
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <string.h>
22 #include <inttypes.h>
23
24 #include "cpu.h"
25 #include "kvm.h"
26
27 #include "qemu-option.h"
28 #include "qemu-config.h"
29
30 /* feature flags taken from "Intel Processor Identification and the CPUID
31 * Instruction" and AMD's "CPUID Specification". In cases of disagreement
32 * between feature naming conventions, aliases may be added.
33 */
34 static const char *feature_name[] = {
35 "fpu", "vme", "de", "pse",
36 "tsc", "msr", "pae", "mce",
37 "cx8", "apic", NULL, "sep",
38 "mtrr", "pge", "mca", "cmov",
39 "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
40 NULL, "ds" /* Intel dts */, "acpi", "mmx",
41 "fxsr", "sse", "sse2", "ss",
42 "ht" /* Intel htt */, "tm", "ia64", "pbe",
43 };
44 static const char *ext_feature_name[] = {
45 "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
46 "ds_cpl", "vmx", "smx", "est",
47 "tm2", "ssse3", "cid", NULL,
48 "fma", "cx16", "xtpr", "pdcm",
49 NULL, NULL, "dca", "sse4.1|sse4_1",
50 "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
51 NULL, "aes", "xsave", "osxsave",
52 "avx", NULL, NULL, "hypervisor",
53 };
54 static const char *ext2_feature_name[] = {
55 "fpu", "vme", "de", "pse",
56 "tsc", "msr", "pae", "mce",
57 "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
58 "mtrr", "pge", "mca", "cmov",
59 "pat", "pse36", NULL, NULL /* Linux mp */,
60 "nx" /* Intel xd */, NULL, "mmxext", "mmx",
61 "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
62 NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
63 };
64 static const char *ext3_feature_name[] = {
65 "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
66 "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
67 "3dnowprefetch", "osvw", "ibs", "xop",
68 "skinit", "wdt", NULL, NULL,
69 "fma4", NULL, "cvt16", "nodeid_msr",
70 NULL, NULL, NULL, NULL,
71 NULL, NULL, NULL, NULL,
72 NULL, NULL, NULL, NULL,
73 };
74
75 static const char *kvm_feature_name[] = {
76 "kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, "kvm_asyncpf", NULL, NULL, NULL,
77 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
78 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
79 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
80 };
81
82 static const char *svm_feature_name[] = {
83 "npt", "lbrv", "svm_lock", "nrip_save",
84 "tsc_scale", "vmcb_clean", "flushbyasid", "decodeassists",
85 NULL, NULL, "pause_filter", NULL,
86 "pfthreshold", NULL, NULL, NULL,
87 NULL, NULL, NULL, NULL,
88 NULL, NULL, NULL, NULL,
89 NULL, NULL, NULL, NULL,
90 NULL, NULL, NULL, NULL,
91 };
92
93 /* collects per-function cpuid data
94 */
95 typedef struct model_features_t {
96 uint32_t *guest_feat;
97 uint32_t *host_feat;
98 uint32_t check_feat;
99 const char **flag_names;
100 uint32_t cpuid;
101 } model_features_t;
102
103 int check_cpuid = 0;
104 int enforce_cpuid = 0;
105
106 void host_cpuid(uint32_t function, uint32_t count,
107 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
108 {
109 #if defined(CONFIG_KVM)
110 uint32_t vec[4];
111
112 #ifdef __x86_64__
113 asm volatile("cpuid"
114 : "=a"(vec[0]), "=b"(vec[1]),
115 "=c"(vec[2]), "=d"(vec[3])
116 : "0"(function), "c"(count) : "cc");
117 #else
118 asm volatile("pusha \n\t"
119 "cpuid \n\t"
120 "mov %%eax, 0(%2) \n\t"
121 "mov %%ebx, 4(%2) \n\t"
122 "mov %%ecx, 8(%2) \n\t"
123 "mov %%edx, 12(%2) \n\t"
124 "popa"
125 : : "a"(function), "c"(count), "S"(vec)
126 : "memory", "cc");
127 #endif
128
129 if (eax)
130 *eax = vec[0];
131 if (ebx)
132 *ebx = vec[1];
133 if (ecx)
134 *ecx = vec[2];
135 if (edx)
136 *edx = vec[3];
137 #endif
138 }
139
140 #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
141
142 /* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
143 * a substring. ex if !NULL points to the first char after a substring,
144 * otherwise the string is assumed to sized by a terminating nul.
145 * Return lexical ordering of *s1:*s2.
146 */
147 static int sstrcmp(const char *s1, const char *e1, const char *s2,
148 const char *e2)
149 {
150 for (;;) {
151 if (!*s1 || !*s2 || *s1 != *s2)
152 return (*s1 - *s2);
153 ++s1, ++s2;
154 if (s1 == e1 && s2 == e2)
155 return (0);
156 else if (s1 == e1)
157 return (*s2);
158 else if (s2 == e2)
159 return (*s1);
160 }
161 }
162
163 /* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
164 * '|' delimited (possibly empty) strings in which case search for a match
165 * within the alternatives proceeds left to right. Return 0 for success,
166 * non-zero otherwise.
167 */
168 static int altcmp(const char *s, const char *e, const char *altstr)
169 {
170 const char *p, *q;
171
172 for (q = p = altstr; ; ) {
173 while (*p && *p != '|')
174 ++p;
175 if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
176 return (0);
177 if (!*p)
178 return (1);
179 else
180 q = ++p;
181 }
182 }
183
184 /* search featureset for flag *[s..e), if found set corresponding bit in
185 * *pval and return success, otherwise return zero
186 */
187 static int lookup_feature(uint32_t *pval, const char *s, const char *e,
188 const char **featureset)
189 {
190 uint32_t mask;
191 const char **ppc;
192
193 for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc)
194 if (*ppc && !altcmp(s, e, *ppc)) {
195 *pval |= mask;
196 break;
197 }
198 return (mask ? 1 : 0);
199 }
200
201 static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
202 uint32_t *ext_features,
203 uint32_t *ext2_features,
204 uint32_t *ext3_features,
205 uint32_t *kvm_features,
206 uint32_t *svm_features)
207 {
208 if (!lookup_feature(features, flagname, NULL, feature_name) &&
209 !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
210 !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
211 !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
212 !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
213 !lookup_feature(svm_features, flagname, NULL, svm_feature_name))
214 fprintf(stderr, "CPU feature %s not found\n", flagname);
215 }
216
217 typedef struct x86_def_t {
218 struct x86_def_t *next;
219 const char *name;
220 uint32_t level;
221 uint32_t vendor1, vendor2, vendor3;
222 int family;
223 int model;
224 int stepping;
225 uint32_t features, ext_features, ext2_features, ext3_features;
226 uint32_t kvm_features, svm_features;
227 uint32_t xlevel;
228 char model_id[48];
229 int vendor_override;
230 uint32_t flags;
231 } x86_def_t;
232
233 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
234 #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
235 CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
236 #define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
237 CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
238 CPUID_PSE36 | CPUID_FXSR)
239 #define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
240 #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
241 CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
242 CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
243 CPUID_PAE | CPUID_SEP | CPUID_APIC)
244 #define EXT2_FEATURE_MASK 0x0183F3FF
245
246 #define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
247 CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
248 CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
249 CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
250 CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
251 /* partly implemented:
252 CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
253 CPUID_PSE36 (needed for Solaris) */
254 /* missing:
255 CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
256 #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
257 CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
258 CPUID_EXT_HYPERVISOR)
259 /* missing:
260 CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
261 CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
262 #define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
263 CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
264 CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
265 /* missing:
266 CPUID_EXT2_PDPE1GB */
267 #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
268 CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
269 #define TCG_SVM_FEATURES 0
270
271 /* maintains list of cpu model definitions
272 */
273 static x86_def_t *x86_defs = {NULL};
274
275 /* built-in cpu model definitions (deprecated)
276 */
277 static x86_def_t builtin_x86_defs[] = {
278 {
279 .name = "qemu64",
280 .level = 4,
281 .vendor1 = CPUID_VENDOR_AMD_1,
282 .vendor2 = CPUID_VENDOR_AMD_2,
283 .vendor3 = CPUID_VENDOR_AMD_3,
284 .family = 6,
285 .model = 2,
286 .stepping = 3,
287 .features = PPRO_FEATURES |
288 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
289 CPUID_PSE36,
290 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
291 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
292 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
293 .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
294 CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
295 .xlevel = 0x8000000A,
296 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
297 },
298 {
299 .name = "phenom",
300 .level = 5,
301 .vendor1 = CPUID_VENDOR_AMD_1,
302 .vendor2 = CPUID_VENDOR_AMD_2,
303 .vendor3 = CPUID_VENDOR_AMD_3,
304 .family = 16,
305 .model = 2,
306 .stepping = 3,
307 .features = PPRO_FEATURES |
308 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
309 CPUID_PSE36 | CPUID_VME | CPUID_HT,
310 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
311 CPUID_EXT_POPCNT,
312 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
313 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
314 CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
315 CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
316 /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
317 CPUID_EXT3_CR8LEG,
318 CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
319 CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
320 .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
321 CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
322 .svm_features = CPUID_SVM_NPT | CPUID_SVM_LBRV,
323 .xlevel = 0x8000001A,
324 .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
325 },
326 {
327 .name = "core2duo",
328 .level = 10,
329 .family = 6,
330 .model = 15,
331 .stepping = 11,
332 .features = PPRO_FEATURES |
333 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
334 CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
335 CPUID_HT | CPUID_TM | CPUID_PBE,
336 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
337 CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
338 CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
339 .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
340 .ext3_features = CPUID_EXT3_LAHF_LM,
341 .xlevel = 0x80000008,
342 .model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
343 },
344 {
345 .name = "kvm64",
346 .level = 5,
347 .vendor1 = CPUID_VENDOR_INTEL_1,
348 .vendor2 = CPUID_VENDOR_INTEL_2,
349 .vendor3 = CPUID_VENDOR_INTEL_3,
350 .family = 15,
351 .model = 6,
352 .stepping = 1,
353 /* Missing: CPUID_VME, CPUID_HT */
354 .features = PPRO_FEATURES |
355 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
356 CPUID_PSE36,
357 /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
358 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
359 /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
360 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
361 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
362 /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
363 CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
364 CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
365 CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
366 .ext3_features = 0,
367 .xlevel = 0x80000008,
368 .model_id = "Common KVM processor"
369 },
370 {
371 .name = "qemu32",
372 .level = 4,
373 .family = 6,
374 .model = 3,
375 .stepping = 3,
376 .features = PPRO_FEATURES,
377 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
378 .xlevel = 0x80000004,
379 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
380 },
381 {
382 .name = "kvm32",
383 .level = 5,
384 .family = 15,
385 .model = 6,
386 .stepping = 1,
387 .features = PPRO_FEATURES |
388 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
389 .ext_features = CPUID_EXT_SSE3,
390 .ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
391 .ext3_features = 0,
392 .xlevel = 0x80000008,
393 .model_id = "Common 32-bit KVM processor"
394 },
395 {
396 .name = "coreduo",
397 .level = 10,
398 .family = 6,
399 .model = 14,
400 .stepping = 8,
401 .features = PPRO_FEATURES | CPUID_VME |
402 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
403 CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
404 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
405 CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
406 .ext2_features = CPUID_EXT2_NX,
407 .xlevel = 0x80000008,
408 .model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
409 },
410 {
411 .name = "486",
412 .level = 1,
413 .family = 4,
414 .model = 0,
415 .stepping = 0,
416 .features = I486_FEATURES,
417 .xlevel = 0,
418 },
419 {
420 .name = "pentium",
421 .level = 1,
422 .family = 5,
423 .model = 4,
424 .stepping = 3,
425 .features = PENTIUM_FEATURES,
426 .xlevel = 0,
427 },
428 {
429 .name = "pentium2",
430 .level = 2,
431 .family = 6,
432 .model = 5,
433 .stepping = 2,
434 .features = PENTIUM2_FEATURES,
435 .xlevel = 0,
436 },
437 {
438 .name = "pentium3",
439 .level = 2,
440 .family = 6,
441 .model = 7,
442 .stepping = 3,
443 .features = PENTIUM3_FEATURES,
444 .xlevel = 0,
445 },
446 {
447 .name = "athlon",
448 .level = 2,
449 .vendor1 = CPUID_VENDOR_AMD_1,
450 .vendor2 = CPUID_VENDOR_AMD_2,
451 .vendor3 = CPUID_VENDOR_AMD_3,
452 .family = 6,
453 .model = 2,
454 .stepping = 3,
455 .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
456 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
457 .xlevel = 0x80000008,
458 /* XXX: put another string ? */
459 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
460 },
461 {
462 .name = "n270",
463 /* original is on level 10 */
464 .level = 5,
465 .family = 6,
466 .model = 28,
467 .stepping = 2,
468 .features = PPRO_FEATURES |
469 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
470 CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
471 /* Some CPUs got no CPUID_SEP */
472 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
473 CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
474 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
475 .ext3_features = CPUID_EXT3_LAHF_LM,
476 .xlevel = 0x8000000A,
477 .model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
478 },
479 };
480
481 static int cpu_x86_fill_model_id(char *str)
482 {
483 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
484 int i;
485
486 for (i = 0; i < 3; i++) {
487 host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
488 memcpy(str + i * 16 + 0, &eax, 4);
489 memcpy(str + i * 16 + 4, &ebx, 4);
490 memcpy(str + i * 16 + 8, &ecx, 4);
491 memcpy(str + i * 16 + 12, &edx, 4);
492 }
493 return 0;
494 }
495
496 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
497 {
498 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
499
500 x86_cpu_def->name = "host";
501 host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
502 x86_cpu_def->level = eax;
503 x86_cpu_def->vendor1 = ebx;
504 x86_cpu_def->vendor2 = edx;
505 x86_cpu_def->vendor3 = ecx;
506
507 host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
508 x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
509 x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
510 x86_cpu_def->stepping = eax & 0x0F;
511 x86_cpu_def->ext_features = ecx;
512 x86_cpu_def->features = edx;
513
514 host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
515 x86_cpu_def->xlevel = eax;
516
517 host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
518 x86_cpu_def->ext2_features = edx;
519 x86_cpu_def->ext3_features = ecx;
520 cpu_x86_fill_model_id(x86_cpu_def->model_id);
521 x86_cpu_def->vendor_override = 0;
522
523
524 /*
525 * Every SVM feature requires emulation support in KVM - so we can't just
526 * read the host features here. KVM might even support SVM features not
527 * available on the host hardware. Just set all bits and mask out the
528 * unsupported ones later.
529 */
530 x86_cpu_def->svm_features = -1;
531
532 return 0;
533 }
534
535 static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
536 {
537 int i;
538
539 for (i = 0; i < 32; ++i)
540 if (1 << i & mask) {
541 fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
542 " flag '%s' [0x%08x]\n",
543 f->cpuid >> 16, f->cpuid & 0xffff,
544 f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
545 break;
546 }
547 return 0;
548 }
549
550 /* best effort attempt to inform user requested cpu flags aren't making
551 * their way to the guest. Note: ft[].check_feat ideally should be
552 * specified via a guest_def field to suppress report of extraneous flags.
553 */
554 static int check_features_against_host(x86_def_t *guest_def)
555 {
556 x86_def_t host_def;
557 uint32_t mask;
558 int rv, i;
559 struct model_features_t ft[] = {
560 {&guest_def->features, &host_def.features,
561 ~0, feature_name, 0x00000000},
562 {&guest_def->ext_features, &host_def.ext_features,
563 ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
564 {&guest_def->ext2_features, &host_def.ext2_features,
565 ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
566 {&guest_def->ext3_features, &host_def.ext3_features,
567 ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
568
569 cpu_x86_fill_host(&host_def);
570 for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
571 for (mask = 1; mask; mask <<= 1)
572 if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
573 !(*ft[i].host_feat & mask)) {
574 unavailable_host_feature(&ft[i], mask);
575 rv = 1;
576 }
577 return rv;
578 }
579
580 static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
581 {
582 unsigned int i;
583 x86_def_t *def;
584
585 char *s = strdup(cpu_model);
586 char *featurestr, *name = strtok(s, ",");
587 /* Features to be added*/
588 uint32_t plus_features = 0, plus_ext_features = 0;
589 uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
590 uint32_t plus_kvm_features = 0, plus_svm_features = 0;
591 /* Features to be removed */
592 uint32_t minus_features = 0, minus_ext_features = 0;
593 uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
594 uint32_t minus_kvm_features = 0, minus_svm_features = 0;
595 uint32_t numvalue;
596
597 for (def = x86_defs; def; def = def->next)
598 if (!strcmp(name, def->name))
599 break;
600 if (kvm_enabled() && strcmp(name, "host") == 0) {
601 cpu_x86_fill_host(x86_cpu_def);
602 } else if (!def) {
603 goto error;
604 } else {
605 memcpy(x86_cpu_def, def, sizeof(*def));
606 }
607
608 plus_kvm_features = ~0; /* not supported bits will be filtered out later */
609
610 add_flagname_to_bitmaps("hypervisor", &plus_features,
611 &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
612 &plus_kvm_features, &plus_svm_features);
613
614 featurestr = strtok(NULL, ",");
615
616 while (featurestr) {
617 char *val;
618 if (featurestr[0] == '+') {
619 add_flagname_to_bitmaps(featurestr + 1, &plus_features,
620 &plus_ext_features, &plus_ext2_features,
621 &plus_ext3_features, &plus_kvm_features,
622 &plus_svm_features);
623 } else if (featurestr[0] == '-') {
624 add_flagname_to_bitmaps(featurestr + 1, &minus_features,
625 &minus_ext_features, &minus_ext2_features,
626 &minus_ext3_features, &minus_kvm_features,
627 &minus_svm_features);
628 } else if ((val = strchr(featurestr, '='))) {
629 *val = 0; val++;
630 if (!strcmp(featurestr, "family")) {
631 char *err;
632 numvalue = strtoul(val, &err, 0);
633 if (!*val || *err) {
634 fprintf(stderr, "bad numerical value %s\n", val);
635 goto error;
636 }
637 x86_cpu_def->family = numvalue;
638 } else if (!strcmp(featurestr, "model")) {
639 char *err;
640 numvalue = strtoul(val, &err, 0);
641 if (!*val || *err || numvalue > 0xff) {
642 fprintf(stderr, "bad numerical value %s\n", val);
643 goto error;
644 }
645 x86_cpu_def->model = numvalue;
646 } else if (!strcmp(featurestr, "stepping")) {
647 char *err;
648 numvalue = strtoul(val, &err, 0);
649 if (!*val || *err || numvalue > 0xf) {
650 fprintf(stderr, "bad numerical value %s\n", val);
651 goto error;
652 }
653 x86_cpu_def->stepping = numvalue ;
654 } else if (!strcmp(featurestr, "level")) {
655 char *err;
656 numvalue = strtoul(val, &err, 0);
657 if (!*val || *err) {
658 fprintf(stderr, "bad numerical value %s\n", val);
659 goto error;
660 }
661 x86_cpu_def->level = numvalue;
662 } else if (!strcmp(featurestr, "xlevel")) {
663 char *err;
664 numvalue = strtoul(val, &err, 0);
665 if (!*val || *err) {
666 fprintf(stderr, "bad numerical value %s\n", val);
667 goto error;
668 }
669 if (numvalue < 0x80000000) {
670 numvalue += 0x80000000;
671 }
672 x86_cpu_def->xlevel = numvalue;
673 } else if (!strcmp(featurestr, "vendor")) {
674 if (strlen(val) != 12) {
675 fprintf(stderr, "vendor string must be 12 chars long\n");
676 goto error;
677 }
678 x86_cpu_def->vendor1 = 0;
679 x86_cpu_def->vendor2 = 0;
680 x86_cpu_def->vendor3 = 0;
681 for(i = 0; i < 4; i++) {
682 x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
683 x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
684 x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
685 }
686 x86_cpu_def->vendor_override = 1;
687 } else if (!strcmp(featurestr, "model_id")) {
688 pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
689 val);
690 } else {
691 fprintf(stderr, "unrecognized feature %s\n", featurestr);
692 goto error;
693 }
694 } else if (!strcmp(featurestr, "check")) {
695 check_cpuid = 1;
696 } else if (!strcmp(featurestr, "enforce")) {
697 check_cpuid = enforce_cpuid = 1;
698 } else {
699 fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
700 goto error;
701 }
702 featurestr = strtok(NULL, ",");
703 }
704 x86_cpu_def->features |= plus_features;
705 x86_cpu_def->ext_features |= plus_ext_features;
706 x86_cpu_def->ext2_features |= plus_ext2_features;
707 x86_cpu_def->ext3_features |= plus_ext3_features;
708 x86_cpu_def->kvm_features |= plus_kvm_features;
709 x86_cpu_def->svm_features |= plus_svm_features;
710 x86_cpu_def->features &= ~minus_features;
711 x86_cpu_def->ext_features &= ~minus_ext_features;
712 x86_cpu_def->ext2_features &= ~minus_ext2_features;
713 x86_cpu_def->ext3_features &= ~minus_ext3_features;
714 x86_cpu_def->kvm_features &= ~minus_kvm_features;
715 x86_cpu_def->svm_features &= ~minus_svm_features;
716 if (check_cpuid) {
717 if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
718 goto error;
719 }
720 free(s);
721 return 0;
722
723 error:
724 free(s);
725 return -1;
726 }
727
728 /* generate a composite string into buf of all cpuid names in featureset
729 * selected by fbits. indicate truncation at bufsize in the event of overflow.
730 * if flags, suppress names undefined in featureset.
731 */
732 static void listflags(char *buf, int bufsize, uint32_t fbits,
733 const char **featureset, uint32_t flags)
734 {
735 const char **p = &featureset[31];
736 char *q, *b, bit;
737 int nc;
738
739 b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
740 *buf = '\0';
741 for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
742 if (fbits & 1 << bit && (*p || !flags)) {
743 if (*p)
744 nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
745 else
746 nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
747 if (bufsize <= nc) {
748 if (b) {
749 memcpy(b, "...", sizeof("..."));
750 }
751 return;
752 }
753 q += nc;
754 bufsize -= nc;
755 }
756 }
757
758 /* generate CPU information:
759 * -? list model names
760 * -?model list model names/IDs
761 * -?dump output all model (x86_def_t) data
762 * -?cpuid list all recognized cpuid flag names
763 */
764 void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
765 {
766 unsigned char model = !strcmp("?model", optarg);
767 unsigned char dump = !strcmp("?dump", optarg);
768 unsigned char cpuid = !strcmp("?cpuid", optarg);
769 x86_def_t *def;
770 char buf[256];
771
772 if (cpuid) {
773 (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
774 listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
775 (*cpu_fprintf)(f, " f_edx: %s\n", buf);
776 listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
777 (*cpu_fprintf)(f, " f_ecx: %s\n", buf);
778 listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
779 (*cpu_fprintf)(f, " extf_edx: %s\n", buf);
780 listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
781 (*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
782 return;
783 }
784 for (def = x86_defs; def; def = def->next) {
785 snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
786 if (model || dump) {
787 (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
788 } else {
789 (*cpu_fprintf)(f, "x86 %16s\n", buf);
790 }
791 if (dump) {
792 memcpy(buf, &def->vendor1, sizeof (def->vendor1));
793 memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
794 memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
795 buf[12] = '\0';
796 (*cpu_fprintf)(f,
797 " family %d model %d stepping %d level %d xlevel 0x%x"
798 " vendor \"%s\"\n",
799 def->family, def->model, def->stepping, def->level,
800 def->xlevel, buf);
801 listflags(buf, sizeof (buf), def->features, feature_name, 0);
802 (*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
803 buf);
804 listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
805 0);
806 (*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
807 buf);
808 listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
809 0);
810 (*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
811 def->ext2_features, buf);
812 listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
813 0);
814 (*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
815 def->ext3_features, buf);
816 (*cpu_fprintf)(f, "\n");
817 }
818 }
819 if (kvm_enabled()) {
820 (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
821 }
822 }
823
824 int cpu_x86_register (CPUX86State *env, const char *cpu_model)
825 {
826 x86_def_t def1, *def = &def1;
827
828 memset(def, 0, sizeof(*def));
829
830 if (cpu_x86_find_by_name(def, cpu_model) < 0)
831 return -1;
832 if (def->vendor1) {
833 env->cpuid_vendor1 = def->vendor1;
834 env->cpuid_vendor2 = def->vendor2;
835 env->cpuid_vendor3 = def->vendor3;
836 } else {
837 env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
838 env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
839 env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
840 }
841 env->cpuid_vendor_override = def->vendor_override;
842 env->cpuid_level = def->level;
843 if (def->family > 0x0f)
844 env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
845 else
846 env->cpuid_version = def->family << 8;
847 env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
848 env->cpuid_version |= def->stepping;
849 env->cpuid_features = def->features;
850 env->cpuid_ext_features = def->ext_features;
851 env->cpuid_ext2_features = def->ext2_features;
852 env->cpuid_ext3_features = def->ext3_features;
853 env->cpuid_xlevel = def->xlevel;
854 env->cpuid_kvm_features = def->kvm_features;
855 env->cpuid_svm_features = def->svm_features;
856 if (!kvm_enabled()) {
857 env->cpuid_features &= TCG_FEATURES;
858 env->cpuid_ext_features &= TCG_EXT_FEATURES;
859 env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
860 #ifdef TARGET_X86_64
861 | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
862 #endif
863 );
864 env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
865 env->cpuid_svm_features &= TCG_SVM_FEATURES;
866 }
867 {
868 const char *model_id = def->model_id;
869 int c, len, i;
870 if (!model_id)
871 model_id = "";
872 len = strlen(model_id);
873 for(i = 0; i < 48; i++) {
874 if (i >= len)
875 c = '\0';
876 else
877 c = (uint8_t)model_id[i];
878 env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
879 }
880 }
881 return 0;
882 }
883
884 #if !defined(CONFIG_USER_ONLY)
885 /* copy vendor id string to 32 bit register, nul pad as needed
886 */
887 static void cpyid(const char *s, uint32_t *id)
888 {
889 char *d = (char *)id;
890 char i;
891
892 for (i = sizeof (*id); i--; )
893 *d++ = *s ? *s++ : '\0';
894 }
895
896 /* interpret radix and convert from string to arbitrary scalar,
897 * otherwise flag failure
898 */
899 #define setscalar(pval, str, perr) \
900 { \
901 char *pend; \
902 unsigned long ul; \
903 \
904 ul = strtoul(str, &pend, 0); \
905 *str && !*pend ? (*pval = ul) : (*perr = 1); \
906 }
907
908 /* map cpuid options to feature bits, otherwise return failure
909 * (option tags in *str are delimited by whitespace)
910 */
911 static void setfeatures(uint32_t *pval, const char *str,
912 const char **featureset, int *perr)
913 {
914 const char *p, *q;
915
916 for (q = p = str; *p || *q; q = p) {
917 while (iswhite(*p))
918 q = ++p;
919 while (*p && !iswhite(*p))
920 ++p;
921 if (!*q && !*p)
922 return;
923 if (!lookup_feature(pval, q, p, featureset)) {
924 fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
925 (int)(p - q), q);
926 *perr = 1;
927 return;
928 }
929 }
930 }
931
932 /* map config file options to x86_def_t form
933 */
934 static int cpudef_setfield(const char *name, const char *str, void *opaque)
935 {
936 x86_def_t *def = opaque;
937 int err = 0;
938
939 if (!strcmp(name, "name")) {
940 def->name = strdup(str);
941 } else if (!strcmp(name, "model_id")) {
942 strncpy(def->model_id, str, sizeof (def->model_id));
943 } else if (!strcmp(name, "level")) {
944 setscalar(&def->level, str, &err)
945 } else if (!strcmp(name, "vendor")) {
946 cpyid(&str[0], &def->vendor1);
947 cpyid(&str[4], &def->vendor2);
948 cpyid(&str[8], &def->vendor3);
949 } else if (!strcmp(name, "family")) {
950 setscalar(&def->family, str, &err)
951 } else if (!strcmp(name, "model")) {
952 setscalar(&def->model, str, &err)
953 } else if (!strcmp(name, "stepping")) {
954 setscalar(&def->stepping, str, &err)
955 } else if (!strcmp(name, "feature_edx")) {
956 setfeatures(&def->features, str, feature_name, &err);
957 } else if (!strcmp(name, "feature_ecx")) {
958 setfeatures(&def->ext_features, str, ext_feature_name, &err);
959 } else if (!strcmp(name, "extfeature_edx")) {
960 setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
961 } else if (!strcmp(name, "extfeature_ecx")) {
962 setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
963 } else if (!strcmp(name, "xlevel")) {
964 setscalar(&def->xlevel, str, &err)
965 } else {
966 fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
967 return (1);
968 }
969 if (err) {
970 fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
971 return (1);
972 }
973 return (0);
974 }
975
976 /* register config file entry as x86_def_t
977 */
978 static int cpudef_register(QemuOpts *opts, void *opaque)
979 {
980 x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
981
982 qemu_opt_foreach(opts, cpudef_setfield, def, 1);
983 def->next = x86_defs;
984 x86_defs = def;
985 return (0);
986 }
987
988 void cpu_clear_apic_feature(CPUX86State *env)
989 {
990 env->cpuid_features &= ~CPUID_APIC;
991 }
992
993 #endif /* !CONFIG_USER_ONLY */
994
995 /* register "cpudef" models defined in configuration file. Here we first
996 * preload any built-in definitions
997 */
998 void x86_cpudef_setup(void)
999 {
1000 int i;
1001
1002 for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
1003 builtin_x86_defs[i].next = x86_defs;
1004 builtin_x86_defs[i].flags = 1;
1005 x86_defs = &builtin_x86_defs[i];
1006 }
1007 #if !defined(CONFIG_USER_ONLY)
1008 qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
1009 #endif
1010 }
1011
1012 static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
1013 uint32_t *ecx, uint32_t *edx)
1014 {
1015 *ebx = env->cpuid_vendor1;
1016 *edx = env->cpuid_vendor2;
1017 *ecx = env->cpuid_vendor3;
1018
1019 /* sysenter isn't supported on compatibility mode on AMD, syscall
1020 * isn't supported in compatibility mode on Intel.
1021 * Normally we advertise the actual cpu vendor, but you can override
1022 * this if you want to use KVM's sysenter/syscall emulation
1023 * in compatibility mode and when doing cross vendor migration
1024 */
1025 if (kvm_enabled() && ! env->cpuid_vendor_override) {
1026 host_cpuid(0, 0, NULL, ebx, ecx, edx);
1027 }
1028 }
1029
1030 void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
1031 uint32_t *eax, uint32_t *ebx,
1032 uint32_t *ecx, uint32_t *edx)
1033 {
1034 /* test if maximum index reached */
1035 if (index & 0x80000000) {
1036 if (index > env->cpuid_xlevel)
1037 index = env->cpuid_level;
1038 } else {
1039 if (index > env->cpuid_level)
1040 index = env->cpuid_level;
1041 }
1042
1043 switch(index) {
1044 case 0:
1045 *eax = env->cpuid_level;
1046 get_cpuid_vendor(env, ebx, ecx, edx);
1047 break;
1048 case 1:
1049 *eax = env->cpuid_version;
1050 *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
1051 *ecx = env->cpuid_ext_features;
1052 *edx = env->cpuid_features;
1053 if (env->nr_cores * env->nr_threads > 1) {
1054 *ebx |= (env->nr_cores * env->nr_threads) << 16;
1055 *edx |= 1 << 28; /* HTT bit */
1056 }
1057 break;
1058 case 2:
1059 /* cache info: needed for Pentium Pro compatibility */
1060 *eax = 1;
1061 *ebx = 0;
1062 *ecx = 0;
1063 *edx = 0x2c307d;
1064 break;
1065 case 4:
1066 /* cache info: needed for Core compatibility */
1067 if (env->nr_cores > 1) {
1068 *eax = (env->nr_cores - 1) << 26;
1069 } else {
1070 *eax = 0;
1071 }
1072 switch (count) {
1073 case 0: /* L1 dcache info */
1074 *eax |= 0x0000121;
1075 *ebx = 0x1c0003f;
1076 *ecx = 0x000003f;
1077 *edx = 0x0000001;
1078 break;
1079 case 1: /* L1 icache info */
1080 *eax |= 0x0000122;
1081 *ebx = 0x1c0003f;
1082 *ecx = 0x000003f;
1083 *edx = 0x0000001;
1084 break;
1085 case 2: /* L2 cache info */
1086 *eax |= 0x0000143;
1087 if (env->nr_threads > 1) {
1088 *eax |= (env->nr_threads - 1) << 14;
1089 }
1090 *ebx = 0x3c0003f;
1091 *ecx = 0x0000fff;
1092 *edx = 0x0000001;
1093 break;
1094 default: /* end of info */
1095 *eax = 0;
1096 *ebx = 0;
1097 *ecx = 0;
1098 *edx = 0;
1099 break;
1100 }
1101 break;
1102 case 5:
1103 /* mwait info: needed for Core compatibility */
1104 *eax = 0; /* Smallest monitor-line size in bytes */
1105 *ebx = 0; /* Largest monitor-line size in bytes */
1106 *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1107 *edx = 0;
1108 break;
1109 case 6:
1110 /* Thermal and Power Leaf */
1111 *eax = 0;
1112 *ebx = 0;
1113 *ecx = 0;
1114 *edx = 0;
1115 break;
1116 case 9:
1117 /* Direct Cache Access Information Leaf */
1118 *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1119 *ebx = 0;
1120 *ecx = 0;
1121 *edx = 0;
1122 break;
1123 case 0xA:
1124 /* Architectural Performance Monitoring Leaf */
1125 *eax = 0;
1126 *ebx = 0;
1127 *ecx = 0;
1128 *edx = 0;
1129 break;
1130 case 0xD:
1131 /* Processor Extended State */
1132 if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
1133 *eax = 0;
1134 *ebx = 0;
1135 *ecx = 0;
1136 *edx = 0;
1137 break;
1138 }
1139 if (kvm_enabled()) {
1140 *eax = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EAX);
1141 *ebx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EBX);
1142 *ecx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_ECX);
1143 *edx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EDX);
1144 } else {
1145 *eax = 0;
1146 *ebx = 0;
1147 *ecx = 0;
1148 *edx = 0;
1149 }
1150 break;
1151 case 0x80000000:
1152 *eax = env->cpuid_xlevel;
1153 *ebx = env->cpuid_vendor1;
1154 *edx = env->cpuid_vendor2;
1155 *ecx = env->cpuid_vendor3;
1156 break;
1157 case 0x80000001:
1158 *eax = env->cpuid_version;
1159 *ebx = 0;
1160 *ecx = env->cpuid_ext3_features;
1161 *edx = env->cpuid_ext2_features;
1162
1163 /* The Linux kernel checks for the CMPLegacy bit and
1164 * discards multiple thread information if it is set.
1165 * So dont set it here for Intel to make Linux guests happy.
1166 */
1167 if (env->nr_cores * env->nr_threads > 1) {
1168 uint32_t tebx, tecx, tedx;
1169 get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1170 if (tebx != CPUID_VENDOR_INTEL_1 ||
1171 tedx != CPUID_VENDOR_INTEL_2 ||
1172 tecx != CPUID_VENDOR_INTEL_3) {
1173 *ecx |= 1 << 1; /* CmpLegacy bit */
1174 }
1175 }
1176 break;
1177 case 0x80000002:
1178 case 0x80000003:
1179 case 0x80000004:
1180 *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1181 *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1182 *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1183 *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1184 break;
1185 case 0x80000005:
1186 /* cache info (L1 cache) */
1187 *eax = 0x01ff01ff;
1188 *ebx = 0x01ff01ff;
1189 *ecx = 0x40020140;
1190 *edx = 0x40020140;
1191 break;
1192 case 0x80000006:
1193 /* cache info (L2 cache) */
1194 *eax = 0;
1195 *ebx = 0x42004200;
1196 *ecx = 0x02008140;
1197 *edx = 0;
1198 break;
1199 case 0x80000008:
1200 /* virtual & phys address size in low 2 bytes. */
1201 /* XXX: This value must match the one used in the MMU code. */
1202 if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1203 /* 64 bit processor */
1204 /* XXX: The physical address space is limited to 42 bits in exec.c. */
1205 *eax = 0x00003028; /* 48 bits virtual, 40 bits physical */
1206 } else {
1207 if (env->cpuid_features & CPUID_PSE36)
1208 *eax = 0x00000024; /* 36 bits physical */
1209 else
1210 *eax = 0x00000020; /* 32 bits physical */
1211 }
1212 *ebx = 0;
1213 *ecx = 0;
1214 *edx = 0;
1215 if (env->nr_cores * env->nr_threads > 1) {
1216 *ecx |= (env->nr_cores * env->nr_threads) - 1;
1217 }
1218 break;
1219 case 0x8000000A:
1220 if (env->cpuid_ext3_features & CPUID_EXT3_SVM) {
1221 *eax = 0x00000001; /* SVM Revision */
1222 *ebx = 0x00000010; /* nr of ASIDs */
1223 *ecx = 0;
1224 *edx = env->cpuid_svm_features; /* optional features */
1225 } else {
1226 *eax = 0;
1227 *ebx = 0;
1228 *ecx = 0;
1229 *edx = 0;
1230 }
1231 break;
1232 default:
1233 /* reserved values: zero */
1234 *eax = 0;
1235 *ebx = 0;
1236 *ecx = 0;
1237 *edx = 0;
1238 break;
1239 }
1240 }
various patches