hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "ioport.h"
   6 #include "isa.h"
   7 #include "fdc.h"
   8 #include "net.h"
   9
  10 /* PC-style peripherals (also used by other machines).  */
  11
  12 /* serial.c */
  13
  14 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  15                          CharDriverState *chr);
  16 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  17                              qemu_irq irq, int baudbase,
  18                              CharDriverState *chr, int ioregister,
  19                              int be);
  20 static inline bool serial_isa_init(int index, CharDriverState *chr)
  21 {
  22     ISADevice *dev;
  23
  24     dev = isa_try_create("isa-serial");
  25     if (!dev) {
  26         return false;
  27     }
  28     qdev_prop_set_uint32(&dev->qdev, "index", index);
  29     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  30     if (qdev_init(&dev->qdev) < 0) {
  31         return false;
  32     }
  33     return true;
  34 }
  35
  36 void serial_set_frequency(SerialState *s, uint32_t frequency);
  37
  38 /* parallel.c */
  39 static inline bool parallel_init(int index, CharDriverState *chr)
  40 {
  41     ISADevice *dev;
  42
  43     dev = isa_try_create("isa-parallel");
  44     if (!dev) {
  45         return false;
  46     }
  47     qdev_prop_set_uint32(&dev->qdev, "index", index);
  48     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  49     if (qdev_init(&dev->qdev) < 0) {
  50         return false;
  51     }
  52     return true;
  53 }
  54
  55 bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
  56                       CharDriverState *chr);
  57
  58 /* i8259.c */
  59
  60 typedef struct PicState2 PicState2;
  61 extern PicState2 *isa_pic;
  62 void pic_set_irq(int irq, int level);
  63 void pic_set_irq_new(void *opaque, int irq, int level);
  64 qemu_irq *i8259_init(qemu_irq parent_irq);
  65 int pic_read_irq(PicState2 *s);
  66 void pic_update_irq(PicState2 *s);
  67 uint32_t pic_intack_read(PicState2 *s);
  68 void pic_info(Monitor *mon);
  69 void irq_info(Monitor *mon);
  70
  71 /* ISA */
  72 #define IOAPIC_NUM_PINS 0x18
  73
  74 typedef struct isa_irq_state {
  75     qemu_irq *i8259;
  76     qemu_irq ioapic[IOAPIC_NUM_PINS];
  77 } IsaIrqState;
  78
  79 void isa_irq_handler(void *opaque, int n, int level);
  80
  81 /* i8254.c */
  82
  83 #define PIT_FREQ 1193182
  84
  85 typedef struct PITState PITState;
  86
  87 PITState *pit_init(int base, qemu_irq irq);
  88 void pit_set_gate(PITState *pit, int channel, int val);
  89 int pit_get_gate(PITState *pit, int channel);
  90 int pit_get_initial_count(PITState *pit, int channel);
  91 int pit_get_mode(PITState *pit, int channel);
  92 int pit_get_out(PITState *pit, int channel, int64_t current_time);
  93
  94 void hpet_pit_disable(void);
  95 void hpet_pit_enable(void);
  96
  97 /* vmport.c */
  98 static inline void vmport_init(void)
  99 {
 100     isa_create_simple("vmport");
 101 }
 102 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
 103 void vmmouse_get_data(uint32_t *data);
 104 void vmmouse_set_data(const uint32_t *data);
 105
 106 /* pckbd.c */
 107
 108 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
 109 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 110                    target_phys_addr_t base, ram_addr_t size,
 111                    target_phys_addr_t mask);
 112 void i8042_isa_mouse_fake_event(void *opaque);
 113 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
 114
 115 /* pc.c */
 116 extern int fd_bootchk;
 117
 118 void pc_register_ferr_irq(qemu_irq irq);
 119 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
 120 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 121
 122 void pc_cpus_init(const char *cpu_model);
 123 void pc_memory_init(ram_addr_t ram_size,
 124                     const char *kernel_filename,
 125                     const char *kernel_cmdline,
 126                     const char *initrd_filename,
 127                     ram_addr_t *below_4g_mem_size_p,
 128                     ram_addr_t *above_4g_mem_size_p);
 129 qemu_irq *pc_allocate_cpu_irq(void);
 130 void pc_vga_init(PCIBus *pci_bus);
 131 void pc_basic_device_init(qemu_irq *isa_irq,
 132                           ISADevice **rtc_state);
 133 void pc_init_ne2k_isa(NICInfo *nd);
 134 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 135                   const char *boot_device,
 136                   BusState *ide0, BusState *ide1,
 137                   ISADevice *s);
 138 void pc_pci_device_init(PCIBus *pci_bus);
 139
 140 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 141 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 142
 143 /* acpi.c */
 144 extern int acpi_enabled;
 145 extern char *acpi_tables;
 146 extern size_t acpi_tables_len;
 147
 148 void acpi_bios_init(void);
 149 int acpi_table_add(const char *table_desc);
 150
 151 /* acpi_piix.c */
 152
 153 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 154                        qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
 155                        int kvm_enabled);
 156 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 157
 158 /* hpet.c */
 159 extern int no_hpet;
 160
 161 /* pcspk.c */
 162 void pcspk_init(PITState *);
 163 int pcspk_audio_init(qemu_irq *pic);
 164
 165 /* piix_pci.c */
 166 struct PCII440FXState;
 167 typedef struct PCII440FXState PCII440FXState;
 168
 169 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
 170 void i440fx_init_memory_mappings(PCII440FXState *d);
 171
 172 /* piix4.c */
 173 extern PCIDevice *piix4_dev;
 174 int piix4_init(PCIBus *bus, int devfn);
 175
 176 /* vga.c */
 177 enum vga_retrace_method {
 178     VGA_RETRACE_DUMB,
 179     VGA_RETRACE_PRECISE
 180 };
 181
 182 extern enum vga_retrace_method vga_retrace_method;
 183
 184 int isa_vga_init(void);
 185 int pci_vga_init(PCIBus *bus);
 186 int isa_vga_mm_init(target_phys_addr_t vram_base,
 187                     target_phys_addr_t ctrl_base, int it_shift);
 188
 189 /* cirrus_vga.c */
 190 void pci_cirrus_vga_init(PCIBus *bus);
 191 void isa_cirrus_vga_init(void);
 192
 193 /* ne2000.c */
 194 static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
 195 {
 196     ISADevice *dev;
 197
 198     qemu_check_nic_model(nd, "ne2k_isa");
 199
 200     dev = isa_try_create("ne2k_isa");
 201     if (!dev) {
 202         return false;
 203     }
 204     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
 205     qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
 206     qdev_set_nic_properties(&dev->qdev, nd);
 207     qdev_init_nofail(&dev->qdev);
 208     return true;
 209 }
 210
 211 /* e820 types */
 212 #define E820_RAM        1
 213 #define E820_RESERVED   2
 214 #define E820_ACPI       3
 215 #define E820_NVS        4
 216 #define E820_UNUSABLE   5
 217
 218 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 219
 220 #endif