2 * i386 execution defines
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "dyngen-exec.h"
22 /* XXX: factorize this mess */
24 #define TARGET_LONG_BITS 64
26 #define TARGET_LONG_BITS 32
31 register struct CPUX86State
*env
asm(AREG0
);
33 #include "qemu-common.h"
37 #define EAX (env->regs[R_EAX])
39 #define ECX (env->regs[R_ECX])
41 #define EDX (env->regs[R_EDX])
43 #define EBX (env->regs[R_EBX])
45 #define ESP (env->regs[R_ESP])
47 #define EBP (env->regs[R_EBP])
49 #define ESI (env->regs[R_ESI])
51 #define EDI (env->regs[R_EDI])
53 #define EIP (env->eip)
56 #define CC_SRC (env->cc_src)
57 #define CC_DST (env->cc_dst)
58 #define CC_OP (env->cc_op)
61 #define FT0 (env->ft0)
62 #define ST0 (env->fpregs[env->fpstt].d)
63 #define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
70 void do_interrupt(int intno
, int is_int
, int error_code
,
71 target_ulong next_eip
, int is_hw
);
72 void do_interrupt_user(int intno
, int is_int
, int error_code
,
73 target_ulong next_eip
);
74 void QEMU_NORETURN
raise_exception_err(int exception_index
, int error_code
);
75 void QEMU_NORETURN
raise_exception(int exception_index
);
76 void do_smm_enter(void);
78 /* n must be a constant to be efficient */
79 static inline target_long
lshift(target_long x
, int n
)
89 static inline void svm_check_intercept(uint32_t type
)
91 helper_svm_check_intercept_param(type
, 0);
94 #if !defined(CONFIG_USER_ONLY)
96 #include "softmmu_exec.h"
98 #endif /* !defined(CONFIG_USER_ONLY) */
100 #ifdef USE_X86LDOUBLE
101 /* use long double functions */
102 #define floatx_to_int32 floatx80_to_int32
103 #define floatx_to_int64 floatx80_to_int64
104 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
105 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
106 #define int32_to_floatx int32_to_floatx80
107 #define int64_to_floatx int64_to_floatx80
108 #define float32_to_floatx float32_to_floatx80
109 #define float64_to_floatx float64_to_floatx80
110 #define floatx_to_float32 floatx80_to_float32
111 #define floatx_to_float64 floatx80_to_float64
112 #define floatx_abs floatx80_abs
113 #define floatx_chs floatx80_chs
114 #define floatx_round_to_int floatx80_round_to_int
115 #define floatx_compare floatx80_compare
116 #define floatx_compare_quiet floatx80_compare_quiet
118 #define floatx_to_int32 float64_to_int32
119 #define floatx_to_int64 float64_to_int64
120 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
121 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
122 #define int32_to_floatx int32_to_float64
123 #define int64_to_floatx int64_to_float64
124 #define float32_to_floatx float32_to_float64
125 #define float64_to_floatx(x, e) (x)
126 #define floatx_to_float32 float64_to_float32
127 #define floatx_to_float64(x, e) (x)
128 #define floatx_abs float64_abs
129 #define floatx_chs float64_chs
130 #define floatx_round_to_int float64_round_to_int
131 #define floatx_compare float64_compare
132 #define floatx_compare_quiet float64_compare_quiet
135 #define RC_MASK 0xc00
136 #define RC_NEAR 0x000
137 #define RC_DOWN 0x400
139 #define RC_CHOP 0xc00
141 #define MAXTAN 9223372036854775808.0
143 #ifdef USE_X86LDOUBLE
149 unsigned long long lower
;
150 unsigned short upper
;
154 /* the following deal with x86 long double-precision numbers */
155 #define MAXEXPD 0x7fff
156 #define EXPBIAS 16383
157 #define EXPD(fp) (fp.l.upper & 0x7fff)
158 #define SIGND(fp) ((fp.l.upper) & 0x8000)
159 #define MANTD(fp) (fp.l.lower)
160 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
164 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
167 #if !defined(HOST_WORDS_BIGENDIAN) && !defined(__arm__)
183 /* the following deal with IEEE double-precision numbers */
184 #define MAXEXPD 0x7ff
186 #define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
187 #define SIGND(fp) ((fp.l.upper) & 0x80000000)
189 #define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
191 #define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
193 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
196 static inline void fpush(void)
198 env
->fpstt
= (env
->fpstt
- 1) & 7;
199 env
->fptags
[env
->fpstt
] = 0; /* validate stack entry */
202 static inline void fpop(void)
204 env
->fptags
[env
->fpstt
] = 1; /* invvalidate stack entry */
205 env
->fpstt
= (env
->fpstt
+ 1) & 7;
208 #ifndef USE_X86LDOUBLE
209 static inline CPU86_LDouble
helper_fldt(target_ulong ptr
)
216 upper
= lduw(ptr
+ 8);
217 /* XXX: handle overflow ? */
218 e
= (upper
& 0x7fff) - 16383 + EXPBIAS
; /* exponent */
219 e
|= (upper
>> 4) & 0x800; /* sign */
220 ll
= (ldq(ptr
) >> 11) & ((1LL << 52) - 1);
222 temp
.l
.upper
= (e
<< 20) | (ll
>> 32);
225 temp
.ll
= ll
| ((uint64_t)e
<< 52);
230 static inline void helper_fstt(CPU86_LDouble f
, target_ulong ptr
)
237 stq(ptr
, (MANTD(temp
) << 11) | (1LL << 63));
238 /* exponent + sign */
239 e
= EXPD(temp
) - EXPBIAS
+ 16383;
240 e
|= SIGND(temp
) >> 16;
245 /* we use memory access macros */
247 static inline CPU86_LDouble
helper_fldt(target_ulong ptr
)
251 temp
.l
.lower
= ldq(ptr
);
252 temp
.l
.upper
= lduw(ptr
+ 8);
256 static inline void helper_fstt(CPU86_LDouble f
, target_ulong ptr
)
261 stq(ptr
, temp
.l
.lower
);
262 stw(ptr
+ 8, temp
.l
.upper
);
265 #endif /* USE_X86LDOUBLE */
267 #define FPUS_IE (1 << 0)
268 #define FPUS_DE (1 << 1)
269 #define FPUS_ZE (1 << 2)
270 #define FPUS_OE (1 << 3)
271 #define FPUS_UE (1 << 4)
272 #define FPUS_PE (1 << 5)
273 #define FPUS_SF (1 << 6)
274 #define FPUS_SE (1 << 7)
275 #define FPUS_B (1 << 15)
279 static inline uint32_t compute_eflags(void)
281 return env
->eflags
| helper_cc_compute_all(CC_OP
) | (DF
& DF_MASK
);
284 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
285 static inline void load_eflags(int eflags
, int update_mask
)
287 CC_SRC
= eflags
& (CC_O
| CC_S
| CC_Z
| CC_A
| CC_P
| CC_C
);
288 DF
= 1 - (2 * ((eflags
>> 10) & 1));
289 env
->eflags
= (env
->eflags
& ~update_mask
) |
290 (eflags
& update_mask
) | 0x2;
293 static inline int cpu_has_work(CPUState
*env
)
297 work
= (env
->interrupt_request
& CPU_INTERRUPT_HARD
) &&
298 (env
->eflags
& IF_MASK
);
299 work
|= env
->interrupt_request
& CPU_INTERRUPT_NMI
;
300 work
|= env
->interrupt_request
& CPU_INTERRUPT_INIT
;
301 work
|= env
->interrupt_request
& CPU_INTERRUPT_SIPI
;
306 static inline int cpu_halted(CPUState
*env
) {
307 /* handle exit of HALTED state */
310 /* disable halt condition */
311 if (cpu_has_work(env
)) {
318 /* load efer and update the corresponding hflags. XXX: do consistency
319 checks with cpuid bits ? */
320 static inline void cpu_load_efer(CPUState
*env
, uint64_t val
)
323 env
->hflags
&= ~(HF_LMA_MASK
| HF_SVME_MASK
);
324 if (env
->efer
& MSR_EFER_LMA
)
325 env
->hflags
|= HF_LMA_MASK
;
326 if (env
->efer
& MSR_EFER_SVME
)
327 env
->hflags
|= HF_SVME_MASK
;