hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "mips_cpudevs.h"
  13 #include "pc.h"
  14 #include "isa.h"
  15 #include "net.h"
  16 #include "sysemu.h"
  17 #include "boards.h"
  18 #include "flash.h"
  19 #include "qemu-log.h"
  20 #include "mips-bios.h"
  21 #include "ide.h"
  22 #include "loader.h"
  23 #include "elf.h"
  24 #include "mc146818rtc.h"
  25
  26 #define MAX_IDE_BUS 2
  27
  28 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  29 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  30 static const int ide_irq[2] = { 14, 15 };
  31
  32 static PITState *pit; /* PIT i8254 */
  33
  34 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  35
  36 static struct _loaderparams {
  37     int ram_size;
  38     const char *kernel_filename;
  39     const char *kernel_cmdline;
  40     const char *initrd_filename;
  41 } loaderparams;
  42
  43 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  44                               uint32_t val)
  45 {
  46     if ((addr & 0xffff) == 0 && val == 42)
  47         qemu_system_reset_request ();
  48     else if ((addr & 0xffff) == 4 && val == 42)
  49         qemu_system_shutdown_request ();
  50 }
  51
  52 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  53 {
  54     return 0;
  55 }
  56
  57 static CPUWriteMemoryFunc * const mips_qemu_write[] = {
  58     &mips_qemu_writel,
  59     &mips_qemu_writel,
  60     &mips_qemu_writel,
  61 };
  62
  63 static CPUReadMemoryFunc * const mips_qemu_read[] = {
  64     &mips_qemu_readl,
  65     &mips_qemu_readl,
  66     &mips_qemu_readl,
  67 };
  68
  69 static int mips_qemu_iomemtype = 0;
  70
  71 typedef struct ResetData {
  72     CPUState *env;
  73     uint64_t vector;
  74 } ResetData;
  75
  76 static int64_t load_kernel(void)
  77 {
  78     int64_t entry, kernel_high;
  79     long kernel_size, initrd_size, params_size;
  80     ram_addr_t initrd_offset;
  81     uint32_t *params_buf;
  82     int big_endian;
  83
  84 #ifdef TARGET_WORDS_BIGENDIAN
  85     big_endian = 1;
  86 #else
  87     big_endian = 0;
  88 #endif
  89     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  90                            NULL, (uint64_t *)&entry, NULL,
  91                            (uint64_t *)&kernel_high, big_endian,
  92                            ELF_MACHINE, 1);
  93     if (kernel_size >= 0) {
  94         if ((entry & ~0x7fffffffULL) == 0x80000000)
  95             entry = (int32_t)entry;
  96     } else {
  97         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  98                 loaderparams.kernel_filename);
  99         exit(1);
 100     }
 101
 102     /* load initrd */
 103     initrd_size = 0;
 104     initrd_offset = 0;
 105     if (loaderparams.initrd_filename) {
 106         initrd_size = get_image_size (loaderparams.initrd_filename);
 107         if (initrd_size > 0) {
 108             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 109             if (initrd_offset + initrd_size > ram_size) {
 110                 fprintf(stderr,
 111                         "qemu: memory too small for initial ram disk '%s'\n",
 112                         loaderparams.initrd_filename);
 113                 exit(1);
 114             }
 115             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 116                                               initrd_offset,
 117                                               ram_size - initrd_offset);
 118         }
 119         if (initrd_size == (target_ulong) -1) {
 120             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 121                     loaderparams.initrd_filename);
 122             exit(1);
 123         }
 124     }
 125
 126     /* Store command line.  */
 127     params_size = 264;
 128     params_buf = qemu_malloc(params_size);
 129
 130     params_buf[0] = tswap32(ram_size);
 131     params_buf[1] = tswap32(0x12345678);
 132
 133     if (initrd_size > 0) {
 134         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 135                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 136                  initrd_size, loaderparams.kernel_cmdline);
 137     } else {
 138         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 139     }
 140
 141     rom_add_blob_fixed("params", params_buf, params_size,
 142                        (16 << 20) - 264);
 143
 144     return entry;
 145 }
 146
 147 static void main_cpu_reset(void *opaque)
 148 {
 149     ResetData *s = (ResetData *)opaque;
 150     CPUState *env = s->env;
 151
 152     cpu_reset(env);
 153     env->active_tc.PC = s->vector;
 154 }
 155
 156 static const int sector_len = 32 * 1024;
 157 static
 158 void mips_r4k_init (ram_addr_t ram_size,
 159                     const char *boot_device,
 160                     const char *kernel_filename, const char *kernel_cmdline,
 161                     const char *initrd_filename, const char *cpu_model)
 162 {
 163     char *filename;
 164     ram_addr_t ram_offset;
 165     ram_addr_t bios_offset;
 166     int bios_size;
 167     CPUState *env;
 168     ResetData *reset_info;
 169     ISADevice *rtc_state;
 170     int i;
 171     qemu_irq *i8259;
 172     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 173     DriveInfo *dinfo;
 174     int be;
 175
 176     /* init CPUs */
 177     if (cpu_model == NULL) {
 178 #ifdef TARGET_MIPS64
 179         cpu_model = "R4000";
 180 #else
 181         cpu_model = "24Kf";
 182 #endif
 183     }
 184     env = cpu_init(cpu_model);
 185     if (!env) {
 186         fprintf(stderr, "Unable to find CPU definition\n");
 187         exit(1);
 188     }
 189     reset_info = qemu_mallocz(sizeof(ResetData));
 190     reset_info->env = env;
 191     reset_info->vector = env->active_tc.PC;
 192     qemu_register_reset(main_cpu_reset, reset_info);
 193
 194     /* allocate RAM */
 195     if (ram_size > (256 << 20)) {
 196         fprintf(stderr,
 197                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 198                 ((unsigned int)ram_size / (1 << 20)));
 199         exit(1);
 200     }
 201     ram_offset = qemu_ram_alloc(NULL, "mips_r4k.ram", ram_size);
 202
 203     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 204
 205     if (!mips_qemu_iomemtype) {
 206         mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read,
 207                                                      mips_qemu_write, NULL);
 208     }
 209     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 210
 211     /* Try to load a BIOS image. If this fails, we continue regardless,
 212        but initialize the hardware ourselves. When a kernel gets
 213        preloaded we also initialize the hardware, since the BIOS wasn't
 214        run. */
 215     if (bios_name == NULL)
 216         bios_name = BIOS_FILENAME;
 217     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 218     if (filename) {
 219         bios_size = get_image_size(filename);
 220     } else {
 221         bios_size = -1;
 222     }
 223 #ifdef TARGET_WORDS_BIGENDIAN
 224     be = 1;
 225 #else
 226     be = 0;
 227 #endif
 228     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 229         bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", BIOS_SIZE);
 230         cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
 231                                      bios_offset | IO_MEM_ROM);
 232
 233         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 234     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 235         uint32_t mips_rom = 0x00400000;
 236         bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", mips_rom);
 237         if (!pflash_cfi01_register(0x1fc00000, bios_offset,
 238                                    dinfo->bdrv, sector_len,
 239                                    mips_rom / sector_len,
 240                                    4, 0, 0, 0, 0, be)) {
 241             fprintf(stderr, "qemu: Error registering flash memory.\n");
 242         }
 243     }
 244     else {
 245         /* not fatal */
 246         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 247                 bios_name);
 248     }
 249     if (filename) {
 250         qemu_free(filename);
 251     }
 252
 253     if (kernel_filename) {
 254         loaderparams.ram_size = ram_size;
 255         loaderparams.kernel_filename = kernel_filename;
 256         loaderparams.kernel_cmdline = kernel_cmdline;
 257         loaderparams.initrd_filename = initrd_filename;
 258         reset_info->vector = load_kernel();
 259     }
 260
 261     /* Init CPU internal devices */
 262     cpu_mips_irq_init_cpu(env);
 263     cpu_mips_clock_init(env);
 264
 265     /* The PIC is attached to the MIPS CPU INT0 pin */
 266     i8259 = i8259_init(env->irq[2]);
 267     isa_bus_new(NULL);
 268     isa_bus_irqs(i8259);
 269
 270     rtc_state = rtc_init(2000, NULL);
 271
 272     /* Register 64 KB of ISA IO space at 0x14000000 */
 273 #ifdef TARGET_WORDS_BIGENDIAN
 274     isa_mmio_init(0x14000000, 0x00010000, 1);
 275 #else
 276     isa_mmio_init(0x14000000, 0x00010000, 0);
 277 #endif
 278     isa_mem_base = 0x10000000;
 279
 280     pit = pit_init(0x40, i8259[0]);
 281
 282     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 283         if (serial_hds[i]) {
 284             serial_isa_init(i, serial_hds[i]);
 285         }
 286     }
 287
 288     isa_vga_init();
 289
 290     if (nd_table[0].vlan)
 291         isa_ne2000_init(0x300, 9, &nd_table[0]);
 292
 293     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 294         fprintf(stderr, "qemu: too many IDE bus\n");
 295         exit(1);
 296     }
 297
 298     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 299         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 300     }
 301
 302     for(i = 0; i < MAX_IDE_BUS; i++)
 303         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 304                      hd[MAX_IDE_DEVS * i],
 305                      hd[MAX_IDE_DEVS * i + 1]);
 306
 307     isa_create_simple("i8042");
 308 }
 309
 310 static QEMUMachine mips_machine = {
 311     .name = "mips",
 312     .desc = "mips r4k platform",
 313     .init = mips_r4k_init,
 314 };
 315
 316 static void mips_machine_init(void)
 317 {
 318     qemu_register_machine(&mips_machine);
 319 }
 320
 321 machine_init(mips_machine_init);