pc: Allocate all ram in a single qemu_ram_alloc()
[qemu/kraxel.git] / hw / vga_int.h
blob6a46a434fec84b77651631defe3be12ba2016813
1 /*
2 * QEMU internal VGA defines.
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include <hw/hw.h>
27 #define MSR_COLOR_EMULATION 0x01
28 #define MSR_PAGE_SELECT 0x20
30 #define ST01_V_RETRACE 0x08
31 #define ST01_DISP_ENABLE 0x01
33 /* bochs VBE support */
34 #define CONFIG_BOCHS_VBE
36 #define VBE_DISPI_MAX_XRES 1600
37 #define VBE_DISPI_MAX_YRES 1200
38 #define VBE_DISPI_MAX_BPP 32
40 #define VBE_DISPI_INDEX_ID 0x0
41 #define VBE_DISPI_INDEX_XRES 0x1
42 #define VBE_DISPI_INDEX_YRES 0x2
43 #define VBE_DISPI_INDEX_BPP 0x3
44 #define VBE_DISPI_INDEX_ENABLE 0x4
45 #define VBE_DISPI_INDEX_BANK 0x5
46 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
47 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
48 #define VBE_DISPI_INDEX_X_OFFSET 0x8
49 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
50 #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
51 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
53 #define VBE_DISPI_ID0 0xB0C0
54 #define VBE_DISPI_ID1 0xB0C1
55 #define VBE_DISPI_ID2 0xB0C2
56 #define VBE_DISPI_ID3 0xB0C3
57 #define VBE_DISPI_ID4 0xB0C4
58 #define VBE_DISPI_ID5 0xB0C5
60 #define VBE_DISPI_DISABLED 0x00
61 #define VBE_DISPI_ENABLED 0x01
62 #define VBE_DISPI_GETCAPS 0x02
63 #define VBE_DISPI_8BIT_DAC 0x20
64 #define VBE_DISPI_LFB_ENABLED 0x40
65 #define VBE_DISPI_NOCLEARMEM 0x80
67 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
69 #ifdef CONFIG_BOCHS_VBE
71 #define VGA_STATE_COMMON_BOCHS_VBE \
72 uint16_t vbe_index; \
73 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
74 uint32_t vbe_start_addr; \
75 uint32_t vbe_line_offset; \
76 uint32_t vbe_bank_mask; \
77 int vbe_mapped;
78 #else
80 #define VGA_STATE_COMMON_BOCHS_VBE
82 #endif /* !CONFIG_BOCHS_VBE */
84 #define CH_ATTR_SIZE (160 * 100)
85 #define VGA_MAX_HEIGHT 2048
87 struct vga_precise_retrace {
88 int64_t ticks_per_char;
89 int64_t total_chars;
90 int htotal;
91 int hstart;
92 int hend;
93 int vstart;
94 int vend;
95 int freq;
98 union vga_retrace {
99 struct vga_precise_retrace precise;
102 struct VGACommonState;
103 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
104 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
106 typedef struct VGACommonState {
107 uint8_t *vram_ptr;
108 ram_addr_t vram_offset;
109 unsigned int vram_size;
110 uint32_t lfb_addr;
111 uint32_t lfb_end;
112 uint32_t map_addr;
113 uint32_t map_end;
114 uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */
115 uint32_t bios_offset;
116 uint32_t bios_size;
117 uint32_t latch;
118 uint8_t sr_index;
119 uint8_t sr[256];
120 uint8_t gr_index;
121 uint8_t gr[256];
122 uint8_t ar_index;
123 uint8_t ar[21];
124 int ar_flip_flop;
125 uint8_t cr_index;
126 uint8_t cr[256]; /* CRT registers */
127 uint8_t msr; /* Misc Output Register */
128 uint8_t fcr; /* Feature Control Register */
129 uint8_t st00; /* status 0 */
130 uint8_t st01; /* status 1 */
131 uint8_t dac_state;
132 uint8_t dac_sub_index;
133 uint8_t dac_read_index;
134 uint8_t dac_write_index;
135 uint8_t dac_cache[3]; /* used when writing */
136 int dac_8bit;
137 uint8_t palette[768];
138 int32_t bank_offset;
139 int vga_io_memory;
140 int (*get_bpp)(struct VGACommonState *s);
141 void (*get_offsets)(struct VGACommonState *s,
142 uint32_t *pline_offset,
143 uint32_t *pstart_addr,
144 uint32_t *pline_compare);
145 void (*get_resolution)(struct VGACommonState *s,
146 int *pwidth,
147 int *pheight);
148 VGA_STATE_COMMON_BOCHS_VBE
149 /* display refresh support */
150 DisplayState *ds;
151 uint32_t font_offsets[2];
152 int graphic_mode;
153 uint8_t shift_control;
154 uint8_t double_scan;
155 uint32_t line_offset;
156 uint32_t line_compare;
157 uint32_t start_addr;
158 uint32_t plane_updated;
159 uint32_t last_line_offset;
160 uint8_t last_cw, last_ch;
161 uint32_t last_width, last_height; /* in chars or pixels */
162 uint32_t last_scr_width, last_scr_height; /* in pixels */
163 uint32_t last_depth; /* in bits */
164 uint8_t cursor_start, cursor_end;
165 uint32_t cursor_offset;
166 unsigned int (*rgb_to_pixel)(unsigned int r,
167 unsigned int g, unsigned b);
168 vga_hw_update_ptr update;
169 vga_hw_invalidate_ptr invalidate;
170 vga_hw_screen_dump_ptr screen_dump;
171 vga_hw_text_update_ptr text_update;
172 /* hardware mouse cursor support */
173 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
174 void (*cursor_invalidate)(struct VGACommonState *s);
175 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
176 /* tell for each page if it has been updated since the last time */
177 uint32_t last_palette[256];
178 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
179 /* retrace */
180 vga_retrace_fn retrace;
181 vga_update_retrace_info_fn update_retrace_info;
182 union vga_retrace retrace_info;
183 uint8_t is_vbe_vmstate;
184 } VGACommonState;
186 static inline int c6_to_8(int v)
188 int b;
189 v &= 0x3f;
190 b = v & 1;
191 return (v << 2) | (b << 1) | b;
194 void vga_common_init(VGACommonState *s, int vga_ram_size);
195 void vga_init(VGACommonState *s);
196 void vga_common_reset(VGACommonState *s);
198 void vga_dirty_log_start(VGACommonState *s);
199 void vga_dirty_log_stop(VGACommonState *s);
200 void vga_dirty_log_restart(VGACommonState *s);
202 extern const VMStateDescription vmstate_vga_common;
203 uint32_t vga_ioport_read(void *opaque, uint32_t addr);
204 void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
205 uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
206 void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
207 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
208 int ppm_save(const char *filename, struct DisplaySurface *ds);
210 void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
211 int poffset, int w,
212 unsigned int color0, unsigned int color1,
213 unsigned int color_xor);
214 void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
215 int poffset, int w,
216 unsigned int color0, unsigned int color1,
217 unsigned int color_xor);
218 void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
219 int poffset, int w,
220 unsigned int color0, unsigned int color1,
221 unsigned int color_xor);
223 int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
224 void vga_init_vbe(VGACommonState *s);
226 extern const uint8_t sr_mask[8];
227 extern const uint8_t gr_mask[16];
229 #define VGA_RAM_SIZE (8192 * 1024)
230 #define VGABIOS_FILENAME "vgabios.bin"
231 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
233 extern CPUReadMemoryFunc * const vga_mem_read[3];
234 extern CPUWriteMemoryFunc * const vga_mem_write[3];