2019-10-14 | Richard Henderson | tcg/ppc: Add support for vector add/subtract ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Add support for vector maximum/minimum ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Add support for load/store/logic/comparison ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Enable tcg backend vector compilation ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Replace HAVE_ISEL macro with a variable ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Replace HAVE_ISA_2_06 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Create TCGPowerISA and have_isa ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC() ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Introduce macro VX4() ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-10-14 | Richard Henderson | tcg/ppc: Introduce Altivec registers ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Tidy helper_fp_exc_raise_s ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-8-richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Mask IOV exception with INV for user... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-7-richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Write to fpcr_flush_to_zero once ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-6-richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Handle SWCR_MAP_DMZ earlier ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-5-richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Fix SWCR_TRAP_ENABLE_MASK ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-4-richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Fix SWCR_MAP_UMZ ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-3-richard.henderson@linaro.org> |
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2019-09-26 | Richard Henderson | target/alpha: Use array for FPCR_DYN conversion ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190921043256.4575-2-richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Pass retaddr to tb_check_watchpoint ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Pass retaddr to tb_invalidate_phys_page_fast ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Remove cpu->mem_io_vaddr ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Handle TLB_NOTDIRTY in probe_access ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Merge and move memory_notdirty_write_{prepare... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Partially inline memory_region_section_get_iotlb ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Move NOTDIRTY handling from I/O path to TLB... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Move ROM handling from I/O path to TLB path ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | exec: Adjust notdirty tracing ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Introduce TLB_BSWAP ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Split out load/store_memop ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Use qemu_build_not_reached in load/store_helpers ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | qemu/compiler.h: Add qemu_build_not_reached ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | cputlb: Disable __always_inline__ without optimization ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-25 | Richard Henderson | exec: Use TARGET_PAGE_BITS_MIN for TLB flags ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2019-09-11 | Richard Henderson | linux-user/arm: Adjust MAX_RESERVED_VA for M-profile ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190822185929.16891-3-richard.henderson@linaro.org> |
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2019-09-11 | Richard Henderson | linux-user: Pass CPUState to MAX_RESERVED_VA ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190822185929.16891-2-richard.henderson@linaro.org> |
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2019-09-10 | Richard Henderson | linux-user: Add AT_HWCAP2 for aarch64-linux-user ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20190809171156.3476-1-richard.henderson@linaro.org> |
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2019-09-05 | Richard Henderson | target/arm: Inline gen_bx_im into callers ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-70-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Clean up disas_thumb_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-69-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, long branches ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-68-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, Unconditional branch ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-67-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, load (literal) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-66-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, shift immediate ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-65-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, Miscellaneous 16-bit instructions ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-64-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, Conditional branches, Supervisor... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-63-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, push and pop ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-62-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Split gen_nop_hint ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-61-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, nop hints ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-60-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, Reverse bytes ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-59-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, Change processor state ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-58-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16, extract ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-57-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 adjust sp (immediate) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-56-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 add, compare, move (two high... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-55-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 branch and exchange ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-54-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 one low register and immediate ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-53-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 add/sub (3 low, 2 low and imm) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-52-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 load/store multiple ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-51-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 add pc/sp (immediate) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-50-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 load/store (immediate offset) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-49-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 load/store (register offset) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-48-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T16 data-processing (two low regs) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-47-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Add skeleton for T16 decodetree ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-46-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify disas_arm_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-45-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify disas_thumb2_insn ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-44-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert TT ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-43-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert SG ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-42-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Table Branch ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-41-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Unallocated memory hint ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-40-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert PLI, PLD, PLDW ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-39-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert SETEND ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-38-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert CPS (privileged) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-37-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Clear-Exclusive, Barriers ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-36-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert RFE and SRS ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-35-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert SVC ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-34-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert B, BL, BLX (immediate) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-33-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Diagnose base == pc for LDM/STM ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-32-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Diagnose too few registers in list for... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-31-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Diagnose writeback register in list for... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-30-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert LDM, STM ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-29-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert MOVW, MOVT ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-28-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Signed multiply, signed and unsigned... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-27-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert packing, unpacking, saturation... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-26-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Parallel addition and subtraction ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-25-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-24-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Diagnose UNPREDICTABLE ldrex/strex cases ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-23-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Synchronization primitives ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-22-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert load/store (register, immediate... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-21-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert T32 ADDW/SUBW ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-20-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert the rest of A32 Miscelaneous instructions ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-19-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert ERET ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-18-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert CLZ ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-17-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert BX, BXJ, BLX (register) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-16-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Cyclic Redundancy Check ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-15-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert MRS/MSR (banked, register) ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-14-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert MSR (immediate) and hints ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-13-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify op_smlawx for SMLAW* ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-12-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify op_smlaxxx for SMLAL* ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-11-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Halfword multiply and multiply... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-10-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert Saturating addition and subtraction ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-9-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Simplify UMAAL ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-8-richard.henderson@linaro.org |
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2019-09-05 | Richard Henderson | target/arm: Convert multiply and multiply accumulate ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20190904193059.26202-7-richard.henderson@linaro.org |
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