| commit | 42281ec646f906aaa63e28daf2f6ba7ca2dd7caf | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Sun, 23 Jun 2019 17:04:34 +0000 (23 19:04 +0200) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Mon, 14 Oct 2019 14:08:30 +0000 (14 07:08 -0700) | ||
| tree | 080e48481d40a3e5189acbc29bcca1a98fa81510 | treesnapshot (tar.gz zip) |
| parent | 98b2e3c9ab3abfe476a2b02f8f51813edb90e72d | commitdiff |
tcg/ppc: Introduce Altivec registers
Altivec supports 32 128-bit vector registers, whose names are
by convention v0 through v31.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Altivec supports 32 128-bit vector registers, whose names are
by convention v0 through v31.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
| tcg/ppc/tcg-target.h | diffblobblamehistory | |
| tcg/ppc/tcg-target.inc.c | diffblobblamehistory |