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hw/arm: Integrate ADC model into Aspeed SoC
2021-10-12 Andrew Jefferyhw/arm: Integrate ADC model into Aspeed SoC
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2021-10-12 Andrew Jefferyhw/adc: Add basic Aspeed ADC model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2021-09-20 Andrew Jefferymisc/pca9552: Fix LED status register indexing in pca955x_ge...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210723043624.348158-1-andrew@aj.id.au>
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2021-09-20 Andrew Jefferywatchdog: aspeed: Fix sequential control writes
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...Id: <20210709053107.1829304-3-andrew@aj.id.au>
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2021-09-20 Andrew Jefferywatchdog: aspeed: Sanitize control register values
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...Id: <20210709053107.1829304-2-andrew@aj.id.au>
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2021-03-09 Andrew Jefferyhw/misc: Model KCS devices in the Aspeed LPC controller
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210302014317.915120-6-andrew@aj.id.au>
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2021-03-09 Andrew Jefferyhw/arm: ast2600: Correct the iBT interrupt ID
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210302014317.915120-4-andrew@aj.id.au>
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2021-03-09 Andrew Jefferyhw/arm: ast2600: Set AST2600_MAX_IRQ to value from...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210302014317.915120-3-andrew@aj.id.au>
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2021-03-09 Andrew Jefferyhw/arm: ast2600: Force a multiple of 32 of IRQs for...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210302014317.915120-2-andrew@aj.id.au>
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2020-01-30 Andrew Jefferyhw/arm: ast2600: Wire up the eMMC controller
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2020-01-30 Andrew Jefferyhw/sd: Configure number of slots exposed by the ASPEED...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-12-20 Andrew Jefferyast2600: Configure CNTFRQ at 1125MHz
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...0d434fb6c186f2b6e.1576215453.git-series.andrew@aj.id.au
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2019-12-20 Andrew Jefferytarget/arm: Prepare generic timer for per-platform...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...addcb712149f46bf2.1576215453.git-series.andrew@aj.id.au
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2019-12-20 Andrew Jefferytarget/arm: Abstract the generic timer frequency
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...82999d099ac72bb2e.1576215453.git-series.andrew@aj.id.au
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2019-12-20 Andrew Jefferytarget/arm: Remove redundant scaling of nexttick
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...cb604ad27fdbeb2e0.1576215453.git-series.andrew@aj.id.au
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2019-09-03 Andrew Jefferyaspeed/timer: Provide back-pressure information for...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-07-01 Andrew Jefferyaspeed: vic: Add support for legacy register interface
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-07-01 Andrew Jefferyaspeed/timer: Fix match calculations
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-07-01 Andrew Jefferyaspeed/timer: Status register contains reload for stopped...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2018-07-16 Andrew Jefferyaspeed: Implement write-1-{set, clear} for AST2500...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 20180709143524.17480-1-andrew@aj.id.au
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2017-09-04 Andrew Jefferyaspeed_soc: Propagate silicon-rev to watchdog
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2017-09-04 Andrew Jefferywatchdog: wdt_aspeed: Add support for the reset width...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-06-27 Andrew Jefferypalmetto-bmc: Configure the SCU's hardware strapping...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1466744305-23163-4-git-send-email-andrew@aj.id.au
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2016-06-27 Andrew Jefferyast2400: Integrate the SCU model and set silicon revision
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1466744305-23163-3-git-send-email-andrew@aj.id.au
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2016-06-27 Andrew Jefferyhw/misc: Add a model for the ASPEED System Control...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1466744305-23163-2-git-send-email-andrew@aj.id.au
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2016-06-17 Andrew Jefferyhw/timer: Add value matching support to aspeed_timer
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1465974248-20434-1-git-send-email-andrew@aj.id.au
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2016-03-16 Andrew Jefferyhw/arm: Add palmetto-bmc machine
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1458096317-25223-5-git-send-email-andrew@aj.id.au
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2016-03-16 Andrew Jefferyhw/arm: Add ASPEED AST2400 SoC model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1458096317-25223-4-git-send-email-andrew@aj.id.au
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2016-03-16 Andrew Jefferyhw/intc: Add (new) ASPEED VIC device model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1458096317-25223-3-git-send-email-andrew@aj.id.au
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2016-03-16 Andrew Jefferyhw/timer: Add ASPEED timer device model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
...1458096317-25223-2-git-send-email-andrew@aj.id.au
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Random patches