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target-microblaze: Name special registers we support
2018-05-29 Edgar E. Iglesiastarget-microblaze: Name special registers we support
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Use TCGv for load/store addresses
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Remove pointer indirection for ld...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Make compute_ldst_addr always use...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Bypass MMU with MMU_NOMMU_IDX
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Conditionalize setting of PVR11_USE_MMU
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Remove USE_MMU PVR checks
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Tighten up TCGv_i32 vs TCGv type...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Correct the PVR array size
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Correct special register array sizes
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: Fallback to our latest CPU version
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: compute_ldst_addr: Use bool instead...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: dec_store: Use bool instead of unsigned int
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-05-29 Edgar E. Iglesiastarget-microblaze: dec_load: Use bool instead of unsigned int
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-04-30 Edgar E. Iglesiastarget-microblaze: mmu: Make the TLBX MISS bit read...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-04-30 Edgar E. Iglesiastarget-microblaze: mmu: Make TLBSX write-only
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-04-30 Edgar E. Iglesiastarget-microblaze: Don't clobber the IMM reg for ld...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-04-30 Edgar E. Iglesiastarget-microblaze: Fix trap checks for FPU insns
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2018-04-30 Edgar E. Iglesiastarget-microblaze: Respect MSR.PVR as read-only
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-12-13 Edgar E. Iglesiastarget/arm: Extend PAR format determination
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiasxilinx-dp: Add support for the yuy2 video format
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Add CPU version 10.0
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: dec_barrel: Add BSIFI
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: dec_barrel: Add BSEFI
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: dec_barrel: Plug TCG temp leak
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: dec_barrel: Add braces around if...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: dec_barrel: Use extract32
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: dec_barrel: Use bool instead of...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Introduce a use-pcmp-instr property
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Introduce a use-msr-instr property
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Introduce a use-hw-mul property
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Introduce a use-div property
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Introduce a use-barrel property
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Add CPU versions 9.4, 9.5 and 9.6
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Don't hard code 0xb as initial MB...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2017-07-04 Edgar E. Iglesiastarget-microblaze: Correct bit shift for the PVR0 version...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-10-04 Edgar E. Iglesiastarget-arm: A64: Fix decoding of iss_sf in disas_ld_lit
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-06-06 Edgar E. Iglesiasxlnx-zynqmp: Use the in kernel GIC model for KVM runs
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-06-06 Edgar E. Iglesiasxlnx-zynqmp: Delay realization of GIC until post CPU...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-06-06 Edgar E. Iglesiasxlnx-zynqmp: Make the RPU subsystem optional
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-06-06 Edgar E. Iglesiasxlnx-zynqmp: Add a secure prop to en/disable ARM Security...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-06-06 Edgar E. Iglesiastarget-arm: A64: Create Instruction Syndromes for Data...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-05-12 Edgar E. Iglesiastarget-arm/translate-a64.c: Unify some of the ldst_reg...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-05-12 Edgar E. Iglesiastarget-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-05-12 Edgar E. Iglesiasgen-icount: Use tcg_set_insn_param
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-05-12 Edgar E. Iglesiastcg: Add tcg_set_insn_param
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-02-26 Edgar E. Iglesiastarget-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-02-19 Edgar E. Iglesiasetraxfs_dma: Dont forward zero-length payload to clients
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-02-03 Edgar E. Iglesiastarget-arm: Implement the S2 MMU inputsize > pamax...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-02-03 Edgar E. Iglesiastarget-arm: Rename check_s2_startlevel to check_s2_mmu_setup
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-02-03 Edgar E. Iglesiastarget-arm: Apply S2 MMU startlevel table size check...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-02-03 Edgar E. Iglesiashw/arm: Setup EL1 and EL2 in AArch64 mode for 64bit...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-01-07 Edgar E. Iglesiaspetalogix-ml605: Set the MicroBlaze CPU version to...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2016-01-07 Edgar E. Iglesiass3adsp1800: Set the MicroBlaze CPU version to 7.10.d
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add support for S1 + S2 MMU translations
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Route S2 MMU faults to EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add S2 translation to 32bit S1 PTWs
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add S2 translation to 64bit S1 PTWs
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add ARMMMUFaultInfo
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Avoid inline for get_phys_addr
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add support for S2 page-table protection...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add computation of starting level for S2 PTW
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: lpae: Rename granule_sz to stride
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: lpae: Replace tsz with computed inputsize
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add support for AArch32 S2 negative t0sz
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: lpae: Move declaration of t0sz and t1sz
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: lpae: Make t0sz and t1sz signed integers
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-10-27 Edgar E. Iglesiastarget-arm: Add HPFAR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Add VMPIDR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Break out mpidr_read_val()
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Add VPIDR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Suppress EPD for S2, EL2 and EL3 translations
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Suppress TBI for S2 translations
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Add VTTBR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiastarget-arm: Add VTCR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-14 Edgar E. Iglesiashw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-08 Edgar E. Iglesiastarget-arm: Add AArch64 access to PAR_EL1
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-08 Edgar E. Iglesiastarget-arm: Correct opc1 for AT_S12Exx
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-09-08 Edgar E. Iglesiastarget-arm: Log the target EL when taking exceptions
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-08-13 Edgar E. Iglesiashw/arm/virt: Connect the Hypervisor timer
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-08-13 Edgar E. Iglesiashw/arm/virt: Replace magic IRQ constants with macros
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-08-13 Edgar E. Iglesiastarget-arm: Add the Hypervisor timer
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-08-13 Edgar E. Iglesiastarget-arm: Pass timeridx as argument to various timer...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-08-13 Edgar E. Iglesiastarget-arm: Add CNTHCTL_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-08-13 Edgar E. Iglesiastarget-arm: Add CNTVOFF_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add TLBI_VAE2{IS}
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add TLBI_ALLE2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add TLBI_ALLE1{IS}
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add TTBR0_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add TPIDR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add SCTLR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add TCR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Add MAIR_EL2
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Break down TLB_LOCKDOWN
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-06-02 Edgar E. Iglesiastarget-arm: Correct check for non-EL3
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-05-18 Edgar E. Iglesiastarget-arm: Remove unneeded '+'
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-05-18 Edgar E. Iglesiastarget-arm: Correct accessfn for CNTV_TVAL_EL0
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-05-18 Edgar E. Iglesiastarget-arm: Correct accessfn for CNTP_{CT}VAL_EL0
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2015-05-08 Edgar E. Iglesiashw/ptimer: Do not artificially limit timers when using...
...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2014-09-29 Edgar E. Iglesiastarget-arm: Add support for VIRQ and VFIQ
 ...off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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