| commit | 173ff58580b383a7841b18fddb293038c9d40d1c | |
| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | |
| Tue, 4 Oct 2016 12:28:10 +0000 (4 13:28 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 4 Oct 2016 12:28:10 +0000 (4 13:28 +0100) | ||
| tree | f7a1d6c382da891a88b172df38877deb2ae68732 | treesnapshot (tar.gz zip) |
| parent | 79b2ac8f28748b09816d09bd62a2b49ddc01ebeb | commitdiff |
target-arm: A64: Fix decoding of iss_sf in disas_ld_lit
Fix the decoding of iss_sf in disas_ld_lit.
The SF (Sixty-Four) field in the ISS (Instruction Specific Syndrome)
is a bit that specifies the width of the register that the
instruction loads to.
If cleared it specifies 32 bits.
If set it specifies 64 bits.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1475230780-8669-1-git-send-email-edgar.iglesias@gmail.com
[PMM: tweaked phrasing per on-list discussion]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fix the decoding of iss_sf in disas_ld_lit.
The SF (Sixty-Four) field in the ISS (Instruction Specific Syndrome)
is a bit that specifies the width of the register that the
instruction loads to.
If cleared it specifies 32 bits.
If set it specifies 64 bits.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1475230780-8669-1-git-send-email-edgar.iglesias@gmail.com
[PMM: tweaked phrasing per on-list discussion]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target-arm/translate-a64.c | diffblobblamehistory |