target/riscv: Fix the bug of HLVX/HLV/HSV
commitc63ca4ff7f81116c26984973052991ff0bd7caec
authorYifei Jiang <jiangyifei@huawei.com>
Mon, 30 Nov 2020 01:28:10 +0000 (30 09:28 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 18 Dec 2020 05:56:43 +0000 (17 21:56 -0800)
treed9d6c2f36ef5968566403ccfe3638eadbd471751
parentb3d2a4296ffdf1870669974ae949fffa2ae638ff
target/riscv: Fix the bug of HLVX/HLV/HSV

We found that the hypervisor virtual-machine load and store instructions,
included HLVX/HLV/HSV, couldn't access guest userspace memory.

In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow:
"As usual when V=1, two-stage address translation is applied, and
the HS-level sstatus.SUM is ignored."

But get_physical_address() doesn't ignore sstatus.SUM, when HLVX/HLV/HSV
accesses guest userspace memory. So this patch fixes it.

Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201130012810.899-1-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu_helper.c