2 * QEMU ATI SVGA emulation
4 * Copyright (c) 2019 BALATON Zoltan
6 * This work is licensed under the GNU GPL license version 2 or later.
12 #include "qemu/timer.h"
13 #include "hw/pci/pci_device.h"
14 #include "hw/i2c/bitbang_i2c.h"
16 #include "qom/object.h"
21 #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__)
23 #define DPRINTF(fmt, ...) do {} while (0)
26 #define PCI_VENDOR_ID_ATI 0x1002
28 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046
29 /* Radeon RV100 (VE) */
30 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
32 #define TYPE_ATI_VGA "ati-vga"
33 OBJECT_DECLARE_SIMPLE_TYPE(ATIVGAState
, ATI_VGA
)
35 typedef struct ATIVGARegs
{
37 uint32_t bios_scratch
[8];
38 uint32_t gen_int_cntl
;
39 uint32_t gen_int_status
;
40 uint32_t crtc_gen_cntl
;
41 uint32_t crtc_ext_cntl
;
43 uint32_t gpio_vga_ddc
;
44 uint32_t gpio_dvi_ddc
;
47 uint32_t palette
[256];
48 uint32_t crtc_h_total_disp
;
49 uint32_t crtc_h_sync_strt_wid
;
50 uint32_t crtc_v_total_disp
;
51 uint32_t crtc_v_sync_strt_wid
;
53 uint32_t crtc_offset_cntl
;
72 uint32_t dp_gui_master_cntl
;
73 uint32_t dp_brush_bkgd_clr
;
74 uint32_t dp_brush_frgd_clr
;
75 uint32_t dp_src_frgd_clr
;
76 uint32_t dp_src_bkgd_clr
;
80 uint32_t dp_write_mask
;
81 uint32_t default_offset
;
82 uint32_t default_pitch
;
83 uint32_t default_tile
;
84 uint32_t default_sc_bottom_right
;
94 bool cursor_guest_mode
;
96 uint32_t cursor_offset
;
98 QEMUTimer vblank_timer
;
99 bitbang_i2c_interface bbi2c
;
105 const char *ati_reg_name(int num
);
107 void ati_2d_blt(ATIVGAState
*s
);
109 #endif /* ATI_INT_H */