block: Set BDRV_O_ALLOW_RDWR during rw reopen
[qemu/kevin.git] / hw / pci-bridge / pci_bridge_dev.c
blob4373f1d3e2d1d6ee97fedb0350864f87c10488c1
1 /*
2 * Standard PCI Bridge Device
4 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com>
6 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu/osdep.h"
23 #include "qapi/error.h"
24 #include "hw/pci/pci_bridge.h"
25 #include "hw/pci/pci_ids.h"
26 #include "hw/pci/msi.h"
27 #include "hw/pci/shpc.h"
28 #include "hw/pci/slotid_cap.h"
29 #include "exec/memory.h"
30 #include "hw/pci/pci_bus.h"
31 #include "hw/hotplug.h"
33 #define TYPE_PCI_BRIDGE_DEV "pci-bridge"
34 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat"
35 #define PCI_BRIDGE_DEV(obj) \
36 OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV)
38 struct PCIBridgeDev {
39 /*< private >*/
40 PCIBridge parent_obj;
41 /*< public >*/
43 MemoryRegion bar;
44 uint8_t chassis_nr;
45 #define PCI_BRIDGE_DEV_F_SHPC_REQ 0
46 uint32_t flags;
48 OnOffAuto msi;
50 typedef struct PCIBridgeDev PCIBridgeDev;
52 static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp)
54 PCIBridge *br = PCI_BRIDGE(dev);
55 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
56 int err;
57 Error *local_err = NULL;
59 pci_bridge_initfn(dev, TYPE_PCI_BUS);
61 if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) {
62 dev->config[PCI_INTERRUPT_PIN] = 0x1;
63 memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar",
64 shpc_bar_size(dev));
65 err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0, errp);
66 if (err) {
67 goto shpc_error;
69 } else {
70 /* MSI is not applicable without SHPC */
71 bridge_dev->msi = ON_OFF_AUTO_OFF;
74 err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp);
75 if (err) {
76 goto slotid_error;
79 if (bridge_dev->msi != ON_OFF_AUTO_OFF) {
80 /* it means SHPC exists, because MSI is needed by SHPC */
82 err = msi_init(dev, 0, 1, true, true, &local_err);
83 /* Any error other than -ENOTSUP(board's MSI support is broken)
84 * is a programming error */
85 assert(!err || err == -ENOTSUP);
86 if (err && bridge_dev->msi == ON_OFF_AUTO_ON) {
87 /* Can't satisfy user's explicit msi=on request, fail */
88 error_append_hint(&local_err, "You have to use msi=auto (default) "
89 "or msi=off with this machine type.\n");
90 error_propagate(errp, local_err);
91 goto msi_error;
93 assert(!local_err || bridge_dev->msi == ON_OFF_AUTO_AUTO);
94 /* With msi=auto, we fall back to MSI off silently */
95 error_free(local_err);
98 if (shpc_present(dev)) {
99 /* TODO: spec recommends using 64 bit prefetcheable BAR.
100 * Check whether that works well. */
101 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
102 PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
104 return;
106 msi_error:
107 slotid_cap_cleanup(dev);
108 slotid_error:
109 if (shpc_present(dev)) {
110 shpc_cleanup(dev, &bridge_dev->bar);
112 shpc_error:
113 pci_bridge_exitfn(dev);
116 static void pci_bridge_dev_exitfn(PCIDevice *dev)
118 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
119 if (msi_present(dev)) {
120 msi_uninit(dev);
122 slotid_cap_cleanup(dev);
123 if (shpc_present(dev)) {
124 shpc_cleanup(dev, &bridge_dev->bar);
126 pci_bridge_exitfn(dev);
129 static void pci_bridge_dev_instance_finalize(Object *obj)
131 /* this function is idempotent and handles (PCIDevice.shpc == NULL) */
132 shpc_free(PCI_DEVICE(obj));
135 static void pci_bridge_dev_write_config(PCIDevice *d,
136 uint32_t address, uint32_t val, int len)
138 pci_bridge_write_config(d, address, val, len);
139 if (msi_present(d)) {
140 msi_write_config(d, address, val, len);
142 if (shpc_present(d)) {
143 shpc_cap_write_config(d, address, val, len);
147 static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
149 PCIDevice *dev = PCI_DEVICE(qdev);
151 pci_bridge_reset(qdev);
152 if (shpc_present(dev)) {
153 shpc_reset(dev);
157 static Property pci_bridge_dev_properties[] = {
158 /* Note: 0 is not a legal chassis number. */
159 DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr,
161 DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi,
162 ON_OFF_AUTO_AUTO),
163 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags,
164 PCI_BRIDGE_DEV_F_SHPC_REQ, true),
165 DEFINE_PROP_END_OF_LIST(),
168 static bool pci_device_shpc_present(void *opaque, int version_id)
170 PCIDevice *dev = opaque;
172 return shpc_present(dev);
175 static const VMStateDescription pci_bridge_dev_vmstate = {
176 .name = "pci_bridge",
177 .fields = (VMStateField[]) {
178 VMSTATE_PCI_DEVICE(parent_obj, PCIBridge),
179 SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present),
180 VMSTATE_END_OF_LIST()
184 static void pci_bridge_dev_hotplug_cb(HotplugHandler *hotplug_dev,
185 DeviceState *dev, Error **errp)
187 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
189 if (!shpc_present(pci_hotplug_dev)) {
190 error_setg(errp, "standard hotplug controller has been disabled for "
191 "this %s", TYPE_PCI_BRIDGE_DEV);
192 return;
194 shpc_device_hotplug_cb(hotplug_dev, dev, errp);
197 static void pci_bridge_dev_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
198 DeviceState *dev,
199 Error **errp)
201 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
203 if (!shpc_present(pci_hotplug_dev)) {
204 error_setg(errp, "standard hotplug controller has been disabled for "
205 "this %s", TYPE_PCI_BRIDGE_DEV);
206 return;
208 shpc_device_hot_unplug_request_cb(hotplug_dev, dev, errp);
211 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
213 DeviceClass *dc = DEVICE_CLASS(klass);
214 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
215 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
217 k->realize = pci_bridge_dev_realize;
218 k->exit = pci_bridge_dev_exitfn;
219 k->config_write = pci_bridge_dev_write_config;
220 k->vendor_id = PCI_VENDOR_ID_REDHAT;
221 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
222 k->class_id = PCI_CLASS_BRIDGE_PCI;
223 k->is_bridge = 1,
224 dc->desc = "Standard PCI Bridge";
225 dc->reset = qdev_pci_bridge_dev_reset;
226 dc->props = pci_bridge_dev_properties;
227 dc->vmsd = &pci_bridge_dev_vmstate;
228 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
229 hc->plug = pci_bridge_dev_hotplug_cb;
230 hc->unplug_request = pci_bridge_dev_hot_unplug_request_cb;
233 static const TypeInfo pci_bridge_dev_info = {
234 .name = TYPE_PCI_BRIDGE_DEV,
235 .parent = TYPE_PCI_BRIDGE,
236 .instance_size = sizeof(PCIBridgeDev),
237 .class_init = pci_bridge_dev_class_init,
238 .instance_finalize = pci_bridge_dev_instance_finalize,
239 .interfaces = (InterfaceInfo[]) {
240 { TYPE_HOTPLUG_HANDLER },
246 * Multiseat bridge. Same as the standard pci bridge, only with a
247 * different pci id, so we can match it easily in the guest for
248 * automagic multiseat configuration. See docs/multiseat.txt for more.
250 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data)
252 DeviceClass *dc = DEVICE_CLASS(klass);
253 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
255 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT;
256 dc->desc = "Standard PCI Bridge (multiseat)";
259 static const TypeInfo pci_bridge_dev_seat_info = {
260 .name = TYPE_PCI_BRIDGE_SEAT_DEV,
261 .parent = TYPE_PCI_BRIDGE_DEV,
262 .instance_size = sizeof(PCIBridgeDev),
263 .class_init = pci_bridge_dev_seat_class_init,
266 static void pci_bridge_dev_register(void)
268 type_register_static(&pci_bridge_dev_info);
269 type_register_static(&pci_bridge_dev_seat_info);
272 type_init(pci_bridge_dev_register);