hw/arm/npcm7xx_boards.c

   1 /*
   2  * Machine definitions for boards featuring an NPCM7xx SoC.
   3  *
   4  * Copyright 2020 Google LLC
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14  * for more details.
  15  */
  16
  17 #include "qemu/osdep.h"
  18
  19 #include "exec/address-spaces.h"
  20 #include "hw/arm/npcm7xx.h"
  21 #include "hw/core/cpu.h"
  22 #include "hw/loader.h"
  23 #include "hw/qdev-properties.h"
  24 #include "qapi/error.h"
  25 #include "qemu-common.h"
  26 #include "qemu/units.h"
  27 #include "sysemu/sysemu.h"
  28
  29 #define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7
  30 #define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff
  31
  32 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
  33
  34 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc)
  35 {
  36     g_autofree char *filename = NULL;
  37     int ret;
  38
  39     if (!bios_name) {
  40         bios_name = npcm7xx_default_bootrom;
  41     }
  42
  43     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
  44     if (!filename) {
  45         error_report("Could not find ROM image '%s'", bios_name);
  46         if (!machine->kernel_filename) {
  47             /* We can't boot without a bootrom or a kernel image. */
  48             exit(1);
  49         }
  50         return;
  51     }
  52     ret = load_image_mr(filename, &soc->irom);
  53     if (ret < 0) {
  54         error_report("Failed to load ROM image '%s'", filename);
  55         exit(1);
  56     }
  57 }
  58
  59 static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no,
  60                                   const char *flash_type, DriveInfo *dinfo)
  61 {
  62     DeviceState *flash;
  63     qemu_irq flash_cs;
  64
  65     flash = qdev_new(flash_type);
  66     if (dinfo) {
  67         qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo));
  68     }
  69     qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal);
  70
  71     flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0);
  72     qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs);
  73 }
  74
  75 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
  76 {
  77     memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram);
  78
  79     object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram),
  80                              &error_abort);
  81 }
  82
  83 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
  84                                         uint32_t hw_straps)
  85 {
  86     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
  87     MachineClass *mc = &nmc->parent;
  88     Object *obj;
  89
  90     if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
  91         error_report("This board can only be used with %s",
  92                      mc->default_cpu_type);
  93         exit(1);
  94     }
  95
  96     obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
  97                                 &error_abort, NULL);
  98     object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
  99
 100     return NPCM7XX(obj);
 101 }
 102
 103 static void npcm750_evb_init(MachineState *machine)
 104 {
 105     NPCM7xxState *soc;
 106
 107     soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS);
 108     npcm7xx_connect_dram(soc, machine->ram);
 109     qdev_realize(DEVICE(soc), NULL, &error_fatal);
 110
 111     npcm7xx_load_bootrom(machine, soc);
 112     npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0));
 113     npcm7xx_load_kernel(machine, soc);
 114 }
 115
 116 static void quanta_gsj_init(MachineState *machine)
 117 {
 118     NPCM7xxState *soc;
 119
 120     soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS);
 121     npcm7xx_connect_dram(soc, machine->ram);
 122     qdev_realize(DEVICE(soc), NULL, &error_fatal);
 123
 124     npcm7xx_load_bootrom(machine, soc);
 125     npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e",
 126                           drive_get(IF_MTD, 0, 0));
 127     npcm7xx_load_kernel(machine, soc);
 128 }
 129
 130 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
 131 {
 132     NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
 133     MachineClass *mc = MACHINE_CLASS(nmc);
 134
 135     nmc->soc_type = type;
 136     mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
 137 }
 138
 139 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
 140 {
 141     MachineClass *mc = MACHINE_CLASS(oc);
 142
 143     mc->no_floppy = 1;
 144     mc->no_cdrom = 1;
 145     mc->no_parallel = 1;
 146     mc->default_ram_id = "ram";
 147     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
 148 }
 149
 150 /*
 151  * Schematics:
 152  * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf
 153  */
 154 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data)
 155 {
 156     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
 157     MachineClass *mc = MACHINE_CLASS(oc);
 158
 159     npcm7xx_set_soc_type(nmc, TYPE_NPCM750);
 160
 161     mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex A9)";
 162     mc->init = npcm750_evb_init;
 163     mc->default_ram_size = 512 * MiB;
 164 };
 165
 166 static void gsj_machine_class_init(ObjectClass *oc, void *data)
 167 {
 168     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
 169     MachineClass *mc = MACHINE_CLASS(oc);
 170
 171     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
 172
 173     mc->desc = "Quanta GSJ (Cortex A9)";
 174     mc->init = quanta_gsj_init;
 175     mc->default_ram_size = 512 * MiB;
 176 };
 177
 178 static const TypeInfo npcm7xx_machine_types[] = {
 179     {
 180         .name           = TYPE_NPCM7XX_MACHINE,
 181         .parent         = TYPE_MACHINE,
 182         .instance_size  = sizeof(NPCM7xxMachine),
 183         .class_size     = sizeof(NPCM7xxMachineClass),
 184         .class_init     = npcm7xx_machine_class_init,
 185         .abstract       = true,
 186     }, {
 187         .name           = MACHINE_TYPE_NAME("npcm750-evb"),
 188         .parent         = TYPE_NPCM7XX_MACHINE,
 189         .class_init     = npcm750_evb_machine_class_init,
 190     }, {
 191         .name           = MACHINE_TYPE_NAME("quanta-gsj"),
 192         .parent         = TYPE_NPCM7XX_MACHINE,
 193         .class_init     = gsj_machine_class_init,
 194     },
 195 };
 196
 197 DEFINE_TYPES(npcm7xx_machine_types)