hw/isa/pc87312: Consolidate the use of device_class_set_parent_realize()
[qemu/kevin.git] / target / openrisc / fpu_helper.c
blob8b81d2f62f796b9c64029a9007bbe5f06c3fb202
1 /*
2 * OpenRISC float helper routines
4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
5 * Feng Gao <gf91597@gmail.com>
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
22 #include "cpu.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "fpu/softfloat.h"
27 static int ieee_ex_to_openrisc(int fexcp)
29 int ret = 0;
30 if (fexcp & float_flag_invalid) {
31 ret |= FPCSR_IVF;
33 if (fexcp & float_flag_overflow) {
34 ret |= FPCSR_OVF;
36 if (fexcp & float_flag_underflow) {
37 ret |= FPCSR_UNF;
39 if (fexcp & float_flag_divbyzero) {
40 ret |= FPCSR_DZF;
42 if (fexcp & float_flag_inexact) {
43 ret |= FPCSR_IXF;
45 return ret;
48 static G_NORETURN
49 void do_fpe(CPUOpenRISCState *env, uintptr_t pc)
51 CPUState *cs = env_cpu(env);
53 cs->exception_index = EXCP_FPE;
54 cpu_loop_exit_restore(cs, pc);
57 void HELPER(update_fpcsr)(CPUOpenRISCState *env)
59 int tmp = get_float_exception_flags(&env->fp_status);
61 if (tmp) {
62 set_float_exception_flags(0, &env->fp_status);
63 tmp = ieee_ex_to_openrisc(tmp);
64 if (tmp) {
65 env->fpcsr |= tmp;
66 if (env->fpcsr & FPCSR_FPEE) {
67 do_fpe(env, GETPC());
73 void cpu_set_fpcsr(CPUOpenRISCState *env, uint32_t val)
75 static const int rm_to_sf[] = {
76 float_round_nearest_even,
77 float_round_to_zero,
78 float_round_up,
79 float_round_down
82 env->fpcsr = val & 0xfff;
83 set_float_rounding_mode(rm_to_sf[extract32(val, 1, 2)], &env->fp_status);
86 uint64_t HELPER(itofd)(CPUOpenRISCState *env, uint64_t val)
88 return int64_to_float64(val, &env->fp_status);
91 uint32_t HELPER(itofs)(CPUOpenRISCState *env, uint32_t val)
93 return int32_to_float32(val, &env->fp_status);
96 uint64_t HELPER(ftoid)(CPUOpenRISCState *env, uint64_t val)
98 return float64_to_int64_round_to_zero(val, &env->fp_status);
101 uint32_t HELPER(ftois)(CPUOpenRISCState *env, uint32_t val)
103 return float32_to_int32_round_to_zero(val, &env->fp_status);
106 uint64_t HELPER(stod)(CPUOpenRISCState *env, uint32_t val)
108 return float32_to_float64(val, &env->fp_status);
111 uint32_t HELPER(dtos)(CPUOpenRISCState *env, uint64_t val)
113 return float64_to_float32(val, &env->fp_status);
116 #define FLOAT_CALC(name) \
117 uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \
118 uint64_t fdt0, uint64_t fdt1) \
119 { return float64_ ## name(fdt0, fdt1, &env->fp_status); } \
120 uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
121 uint32_t fdt0, uint32_t fdt1) \
122 { return float32_ ## name(fdt0, fdt1, &env->fp_status); }
124 FLOAT_CALC(add)
125 FLOAT_CALC(sub)
126 FLOAT_CALC(mul)
127 FLOAT_CALC(div)
128 FLOAT_CALC(rem)
129 #undef FLOAT_CALC
132 uint64_t helper_float_madd_d(CPUOpenRISCState *env, uint64_t a,
133 uint64_t b, uint64_t c)
135 /* Note that or1ksim doesn't use fused operation. */
136 b = float64_mul(b, c, &env->fp_status);
137 return float64_add(a, b, &env->fp_status);
140 uint32_t helper_float_madd_s(CPUOpenRISCState *env, uint32_t a,
141 uint32_t b, uint32_t c)
143 /* Note that or1ksim doesn't use fused operation. */
144 b = float32_mul(b, c, &env->fp_status);
145 return float32_add(a, b, &env->fp_status);
149 #define FLOAT_CMP(name, impl) \
150 target_ulong helper_float_ ## name ## _d(CPUOpenRISCState *env, \
151 uint64_t fdt0, uint64_t fdt1) \
152 { return float64_ ## impl(fdt0, fdt1, &env->fp_status); } \
153 target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \
154 uint32_t fdt0, uint32_t fdt1) \
155 { return float32_ ## impl(fdt0, fdt1, &env->fp_status); }
157 FLOAT_CMP(le, le)
158 FLOAT_CMP(lt, lt)
159 FLOAT_CMP(eq, eq_quiet)
160 FLOAT_CMP(un, unordered_quiet)
161 #undef FLOAT_CMP
163 #define FLOAT_UCMP(name, expr) \
164 target_ulong helper_float_ ## name ## _d(CPUOpenRISCState *env, \
165 uint64_t fdt0, uint64_t fdt1) \
167 FloatRelation r = float64_compare_quiet(fdt0, fdt1, &env->fp_status); \
168 return expr; \
170 target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \
171 uint32_t fdt0, uint32_t fdt1) \
173 FloatRelation r = float32_compare_quiet(fdt0, fdt1, &env->fp_status); \
174 return expr; \
177 FLOAT_UCMP(ueq, r == float_relation_equal || r == float_relation_unordered)
178 FLOAT_UCMP(ult, r == float_relation_less || r == float_relation_unordered)
179 FLOAT_UCMP(ule, r != float_relation_greater)
180 #undef FLOAT_UCMP