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hw/arm/virt: Add board property to enable EL2
[qemu/kevin.git] / memory.c
blob2bfc37f65cb2f46a0f8505ba5f3a71b57a4ada6e
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33
34 //#define DEBUG_UNASSIGNED
35
36 static unsigned memory_region_transaction_depth;
37 static bool memory_region_update_pending;
38 static bool ioeventfd_update_pending;
39 static bool global_dirty_log = false;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 typedef struct AddrRange AddrRange;
48
49 /*
50 * Note that signed integers are needed for negative offsetting in aliases
51 * (large MemoryRegion::alias_offset).
52 */
53 struct AddrRange {
54 Int128 start;
55 Int128 size;
56 };
57
58 static AddrRange addrrange_make(Int128 start, Int128 size)
59 {
60 return (AddrRange) { start, size };
61 }
62
63 static bool addrrange_equal(AddrRange r1, AddrRange r2)
64 {
65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
66 }
67
68 static Int128 addrrange_end(AddrRange r)
69 {
70 return int128_add(r.start, r.size);
71 }
72
73 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
74 {
75 int128_addto(&range.start, delta);
76 return range;
77 }
78
79 static bool addrrange_contains(AddrRange range, Int128 addr)
80 {
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83 }
84
85 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86 {
87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
89 }
90
91 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92 {
93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
96 }
97
98 enum ListenerDirection { Forward, Reverse };
99
100 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
101 do { \
102 MemoryListener *_listener; \
103 \
104 switch (_direction) { \
105 case Forward: \
106 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
107 if (_listener->_callback) { \
108 _listener->_callback(_listener, ##_args); \
109 } \
110 } \
111 break; \
112 case Reverse: \
113 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
114 memory_listeners, link) { \
115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
118 } \
119 break; \
120 default: \
121 abort(); \
122 } \
123 } while (0)
124
125 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
126 do { \
127 MemoryListener *_listener; \
128 struct memory_listeners_as *list = &(_as)->listeners; \
129 \
130 switch (_direction) { \
131 case Forward: \
132 QTAILQ_FOREACH(_listener, list, link_as) { \
133 if (_listener->_callback) { \
134 _listener->_callback(_listener, _section, ##_args); \
135 } \
136 } \
137 break; \
138 case Reverse: \
139 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
140 link_as) { \
141 if (_listener->_callback) { \
142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
151 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
152 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
153 do { \
154 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
155 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
156 } while(0)
157
158 struct CoalescedMemoryRange {
159 AddrRange addr;
160 QTAILQ_ENTRY(CoalescedMemoryRange) link;
161 };
162
163 struct MemoryRegionIoeventfd {
164 AddrRange addr;
165 bool match_data;
166 uint64_t data;
167 EventNotifier *e;
168 };
169
170 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
171 MemoryRegionIoeventfd b)
172 {
173 if (int128_lt(a.addr.start, b.addr.start)) {
174 return true;
175 } else if (int128_gt(a.addr.start, b.addr.start)) {
176 return false;
177 } else if (int128_lt(a.addr.size, b.addr.size)) {
178 return true;
179 } else if (int128_gt(a.addr.size, b.addr.size)) {
180 return false;
181 } else if (a.match_data < b.match_data) {
182 return true;
183 } else if (a.match_data > b.match_data) {
184 return false;
185 } else if (a.match_data) {
186 if (a.data < b.data) {
187 return true;
188 } else if (a.data > b.data) {
189 return false;
190 }
191 }
192 if (a.e < b.e) {
193 return true;
194 } else if (a.e > b.e) {
195 return false;
196 }
197 return false;
198 }
199
200 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
201 MemoryRegionIoeventfd b)
202 {
203 return !memory_region_ioeventfd_before(a, b)
204 && !memory_region_ioeventfd_before(b, a);
205 }
206
207 typedef struct FlatRange FlatRange;
208 typedef struct FlatView FlatView;
209
210 /* Range of memory in the global map. Addresses are absolute. */
211 struct FlatRange {
212 MemoryRegion *mr;
213 hwaddr offset_in_region;
214 AddrRange addr;
215 uint8_t dirty_log_mask;
216 bool romd_mode;
217 bool readonly;
218 };
219
220 /* Flattened global view of current active memory hierarchy. Kept in sorted
221 * order.
222 */
223 struct FlatView {
224 struct rcu_head rcu;
225 unsigned ref;
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static inline MemoryRegionSection
237 section_from_flat_range(FlatRange *fr, AddressSpace *as)
238 {
239 return (MemoryRegionSection) {
240 .mr = fr->mr,
241 .address_space = as,
242 .offset_within_region = fr->offset_in_region,
243 .size = fr->addr.size,
244 .offset_within_address_space = int128_get64(fr->addr.start),
245 .readonly = fr->readonly,
246 };
247 }
248
249 static bool flatrange_equal(FlatRange *a, FlatRange *b)
250 {
251 return a->mr == b->mr
252 && addrrange_equal(a->addr, b->addr)
253 && a->offset_in_region == b->offset_in_region
254 && a->romd_mode == b->romd_mode
255 && a->readonly == b->readonly;
256 }
257
258 static void flatview_init(FlatView *view)
259 {
260 view->ref = 1;
261 view->ranges = NULL;
262 view->nr = 0;
263 view->nr_allocated = 0;
264 }
265
266 /* Insert a range into a given position. Caller is responsible for maintaining
267 * sorting order.
268 */
269 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
270 {
271 if (view->nr == view->nr_allocated) {
272 view->nr_allocated = MAX(2 * view->nr, 10);
273 view->ranges = g_realloc(view->ranges,
274 view->nr_allocated * sizeof(*view->ranges));
275 }
276 memmove(view->ranges + pos + 1, view->ranges + pos,
277 (view->nr - pos) * sizeof(FlatRange));
278 view->ranges[pos] = *range;
279 memory_region_ref(range->mr);
280 ++view->nr;
281 }
282
283 static void flatview_destroy(FlatView *view)
284 {
285 int i;
286
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
290 g_free(view->ranges);
291 g_free(view);
292 }
293
294 static void flatview_ref(FlatView *view)
295 {
296 atomic_inc(&view->ref);
297 }
298
299 static void flatview_unref(FlatView *view)
300 {
301 if (atomic_fetch_dec(&view->ref) == 1) {
302 flatview_destroy(view);
303 }
304 }
305
306 static bool can_merge(FlatRange *r1, FlatRange *r2)
307 {
308 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
309 && r1->mr == r2->mr
310 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
311 r1->addr.size),
312 int128_make64(r2->offset_in_region))
313 && r1->dirty_log_mask == r2->dirty_log_mask
314 && r1->romd_mode == r2->romd_mode
315 && r1->readonly == r2->readonly;
316 }
317
318 /* Attempt to simplify a view by merging adjacent ranges */
319 static void flatview_simplify(FlatView *view)
320 {
321 unsigned i, j;
322
323 i = 0;
324 while (i < view->nr) {
325 j = i + 1;
326 while (j < view->nr
327 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
328 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
329 ++j;
330 }
331 ++i;
332 memmove(&view->ranges[i], &view->ranges[j],
333 (view->nr - j) * sizeof(view->ranges[j]));
334 view->nr -= j - i;
335 }
336 }
337
338 static bool memory_region_big_endian(MemoryRegion *mr)
339 {
340 #ifdef TARGET_WORDS_BIGENDIAN
341 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
342 #else
343 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
344 #endif
345 }
346
347 static bool memory_region_wrong_endianness(MemoryRegion *mr)
348 {
349 #ifdef TARGET_WORDS_BIGENDIAN
350 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
351 #else
352 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
353 #endif
354 }
355
356 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
357 {
358 if (memory_region_wrong_endianness(mr)) {
359 switch (size) {
360 case 1:
361 break;
362 case 2:
363 *data = bswap16(*data);
364 break;
365 case 4:
366 *data = bswap32(*data);
367 break;
368 case 8:
369 *data = bswap64(*data);
370 break;
371 default:
372 abort();
373 }
374 }
375 }
376
377 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
378 {
379 MemoryRegion *root;
380 hwaddr abs_addr = offset;
381
382 abs_addr += mr->addr;
383 for (root = mr; root->container; ) {
384 root = root->container;
385 abs_addr += root->addr;
386 }
387
388 return abs_addr;
389 }
390
391 static int get_cpu_index(void)
392 {
393 if (current_cpu) {
394 return current_cpu->cpu_index;
395 }
396 return -1;
397 }
398
399 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
400 hwaddr addr,
401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask,
405 MemTxAttrs attrs)
406 {
407 uint64_t tmp;
408
409 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
410 if (mr->subpage) {
411 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
412 } else if (mr == &io_mem_notdirty) {
413 /* Accesses to code which has previously been translated into a TB show
414 * up in the MMIO path, as accesses to the io_mem_notdirty
415 * MemoryRegion. */
416 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
417 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
418 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
419 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
420 }
421 *value |= (tmp & mask) << shift;
422 return MEMTX_OK;
423 }
424
425 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
426 hwaddr addr,
427 uint64_t *value,
428 unsigned size,
429 unsigned shift,
430 uint64_t mask,
431 MemTxAttrs attrs)
432 {
433 uint64_t tmp;
434
435 tmp = mr->ops->read(mr->opaque, addr, size);
436 if (mr->subpage) {
437 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
438 } else if (mr == &io_mem_notdirty) {
439 /* Accesses to code which has previously been translated into a TB show
440 * up in the MMIO path, as accesses to the io_mem_notdirty
441 * MemoryRegion. */
442 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
443 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
446 }
447 *value |= (tmp & mask) << shift;
448 return MEMTX_OK;
449 }
450
451 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask,
457 MemTxAttrs attrs)
458 {
459 uint64_t tmp = 0;
460 MemTxResult r;
461
462 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
463 if (mr->subpage) {
464 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
465 } else if (mr == &io_mem_notdirty) {
466 /* Accesses to code which has previously been translated into a TB show
467 * up in the MMIO path, as accesses to the io_mem_notdirty
468 * MemoryRegion. */
469 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
470 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
471 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
472 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
473 }
474 *value |= (tmp & mask) << shift;
475 return r;
476 }
477
478 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
479 hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 unsigned shift,
483 uint64_t mask,
484 MemTxAttrs attrs)
485 {
486 uint64_t tmp;
487
488 tmp = (*value >> shift) & mask;
489 if (mr->subpage) {
490 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
491 } else if (mr == &io_mem_notdirty) {
492 /* Accesses to code which has previously been translated into a TB show
493 * up in the MMIO path, as accesses to the io_mem_notdirty
494 * MemoryRegion. */
495 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
496 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
497 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
498 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
499 }
500 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
501 return MEMTX_OK;
502 }
503
504 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
505 hwaddr addr,
506 uint64_t *value,
507 unsigned size,
508 unsigned shift,
509 uint64_t mask,
510 MemTxAttrs attrs)
511 {
512 uint64_t tmp;
513
514 tmp = (*value >> shift) & mask;
515 if (mr->subpage) {
516 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
517 } else if (mr == &io_mem_notdirty) {
518 /* Accesses to code which has previously been translated into a TB show
519 * up in the MMIO path, as accesses to the io_mem_notdirty
520 * MemoryRegion. */
521 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
522 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
523 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
524 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
525 }
526 mr->ops->write(mr->opaque, addr, tmp, size);
527 return MEMTX_OK;
528 }
529
530 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
531 hwaddr addr,
532 uint64_t *value,
533 unsigned size,
534 unsigned shift,
535 uint64_t mask,
536 MemTxAttrs attrs)
537 {
538 uint64_t tmp;
539
540 tmp = (*value >> shift) & mask;
541 if (mr->subpage) {
542 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
543 } else if (mr == &io_mem_notdirty) {
544 /* Accesses to code which has previously been translated into a TB show
545 * up in the MMIO path, as accesses to the io_mem_notdirty
546 * MemoryRegion. */
547 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
548 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
549 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
550 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
551 }
552 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
553 }
554
555 static MemTxResult access_with_adjusted_size(hwaddr addr,
556 uint64_t *value,
557 unsigned size,
558 unsigned access_size_min,
559 unsigned access_size_max,
560 MemTxResult (*access)(MemoryRegion *mr,
561 hwaddr addr,
562 uint64_t *value,
563 unsigned size,
564 unsigned shift,
565 uint64_t mask,
566 MemTxAttrs attrs),
567 MemoryRegion *mr,
568 MemTxAttrs attrs)
569 {
570 uint64_t access_mask;
571 unsigned access_size;
572 unsigned i;
573 MemTxResult r = MEMTX_OK;
574
575 if (!access_size_min) {
576 access_size_min = 1;
577 }
578 if (!access_size_max) {
579 access_size_max = 4;
580 }
581
582 /* FIXME: support unaligned access? */
583 access_size = MAX(MIN(size, access_size_max), access_size_min);
584 access_mask = -1ULL >> (64 - access_size * 8);
585 if (memory_region_big_endian(mr)) {
586 for (i = 0; i < size; i += access_size) {
587 r |= access(mr, addr + i, value, access_size,
588 (size - access_size - i) * 8, access_mask, attrs);
589 }
590 } else {
591 for (i = 0; i < size; i += access_size) {
592 r |= access(mr, addr + i, value, access_size, i * 8,
593 access_mask, attrs);
594 }
595 }
596 return r;
597 }
598
599 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
600 {
601 AddressSpace *as;
602
603 while (mr->container) {
604 mr = mr->container;
605 }
606 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
607 if (mr == as->root) {
608 return as;
609 }
610 }
611 return NULL;
612 }
613
614 /* Render a memory region into the global view. Ranges in @view obscure
615 * ranges in @mr.
616 */
617 static void render_memory_region(FlatView *view,
618 MemoryRegion *mr,
619 Int128 base,
620 AddrRange clip,
621 bool readonly)
622 {
623 MemoryRegion *subregion;
624 unsigned i;
625 hwaddr offset_in_region;
626 Int128 remain;
627 Int128 now;
628 FlatRange fr;
629 AddrRange tmp;
630
631 if (!mr->enabled) {
632 return;
633 }
634
635 int128_addto(&base, int128_make64(mr->addr));
636 readonly |= mr->readonly;
637
638 tmp = addrrange_make(base, mr->size);
639
640 if (!addrrange_intersects(tmp, clip)) {
641 return;
642 }
643
644 clip = addrrange_intersection(tmp, clip);
645
646 if (mr->alias) {
647 int128_subfrom(&base, int128_make64(mr->alias->addr));
648 int128_subfrom(&base, int128_make64(mr->alias_offset));
649 render_memory_region(view, mr->alias, base, clip, readonly);
650 return;
651 }
652
653 /* Render subregions in priority order. */
654 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
655 render_memory_region(view, subregion, base, clip, readonly);
656 }
657
658 if (!mr->terminates) {
659 return;
660 }
661
662 offset_in_region = int128_get64(int128_sub(clip.start, base));
663 base = clip.start;
664 remain = clip.size;
665
666 fr.mr = mr;
667 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
668 fr.romd_mode = mr->romd_mode;
669 fr.readonly = readonly;
670
671 /* Render the region itself into any gaps left by the current view. */
672 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
673 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
674 continue;
675 }
676 if (int128_lt(base, view->ranges[i].addr.start)) {
677 now = int128_min(remain,
678 int128_sub(view->ranges[i].addr.start, base));
679 fr.offset_in_region = offset_in_region;
680 fr.addr = addrrange_make(base, now);
681 flatview_insert(view, i, &fr);
682 ++i;
683 int128_addto(&base, now);
684 offset_in_region += int128_get64(now);
685 int128_subfrom(&remain, now);
686 }
687 now = int128_sub(int128_min(int128_add(base, remain),
688 addrrange_end(view->ranges[i].addr)),
689 base);
690 int128_addto(&base, now);
691 offset_in_region += int128_get64(now);
692 int128_subfrom(&remain, now);
693 }
694 if (int128_nz(remain)) {
695 fr.offset_in_region = offset_in_region;
696 fr.addr = addrrange_make(base, remain);
697 flatview_insert(view, i, &fr);
698 }
699 }
700
701 /* Render a memory topology into a list of disjoint absolute ranges. */
702 static FlatView *generate_memory_topology(MemoryRegion *mr)
703 {
704 FlatView *view;
705
706 view = g_new(FlatView, 1);
707 flatview_init(view);
708
709 if (mr) {
710 render_memory_region(view, mr, int128_zero(),
711 addrrange_make(int128_zero(), int128_2_64()), false);
712 }
713 flatview_simplify(view);
714
715 return view;
716 }
717
718 static void address_space_add_del_ioeventfds(AddressSpace *as,
719 MemoryRegionIoeventfd *fds_new,
720 unsigned fds_new_nb,
721 MemoryRegionIoeventfd *fds_old,
722 unsigned fds_old_nb)
723 {
724 unsigned iold, inew;
725 MemoryRegionIoeventfd *fd;
726 MemoryRegionSection section;
727
728 /* Generate a symmetric difference of the old and new fd sets, adding
729 * and deleting as necessary.
730 */
731
732 iold = inew = 0;
733 while (iold < fds_old_nb || inew < fds_new_nb) {
734 if (iold < fds_old_nb
735 && (inew == fds_new_nb
736 || memory_region_ioeventfd_before(fds_old[iold],
737 fds_new[inew]))) {
738 fd = &fds_old[iold];
739 section = (MemoryRegionSection) {
740 .address_space = as,
741 .offset_within_address_space = int128_get64(fd->addr.start),
742 .size = fd->addr.size,
743 };
744 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
745 fd->match_data, fd->data, fd->e);
746 ++iold;
747 } else if (inew < fds_new_nb
748 && (iold == fds_old_nb
749 || memory_region_ioeventfd_before(fds_new[inew],
750 fds_old[iold]))) {
751 fd = &fds_new[inew];
752 section = (MemoryRegionSection) {
753 .address_space = as,
754 .offset_within_address_space = int128_get64(fd->addr.start),
755 .size = fd->addr.size,
756 };
757 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
758 fd->match_data, fd->data, fd->e);
759 ++inew;
760 } else {
761 ++iold;
762 ++inew;
763 }
764 }
765 }
766
767 static FlatView *address_space_get_flatview(AddressSpace *as)
768 {
769 FlatView *view;
770
771 rcu_read_lock();
772 view = atomic_rcu_read(&as->current_map);
773 flatview_ref(view);
774 rcu_read_unlock();
775 return view;
776 }
777
778 static void address_space_update_ioeventfds(AddressSpace *as)
779 {
780 FlatView *view;
781 FlatRange *fr;
782 unsigned ioeventfd_nb = 0;
783 MemoryRegionIoeventfd *ioeventfds = NULL;
784 AddrRange tmp;
785 unsigned i;
786
787 view = address_space_get_flatview(as);
788 FOR_EACH_FLAT_RANGE(fr, view) {
789 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
790 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
791 int128_sub(fr->addr.start,
792 int128_make64(fr->offset_in_region)));
793 if (addrrange_intersects(fr->addr, tmp)) {
794 ++ioeventfd_nb;
795 ioeventfds = g_realloc(ioeventfds,
796 ioeventfd_nb * sizeof(*ioeventfds));
797 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
798 ioeventfds[ioeventfd_nb-1].addr = tmp;
799 }
800 }
801 }
802
803 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
804 as->ioeventfds, as->ioeventfd_nb);
805
806 g_free(as->ioeventfds);
807 as->ioeventfds = ioeventfds;
808 as->ioeventfd_nb = ioeventfd_nb;
809 flatview_unref(view);
810 }
811
812 static void address_space_update_topology_pass(AddressSpace *as,
813 const FlatView *old_view,
814 const FlatView *new_view,
815 bool adding)
816 {
817 unsigned iold, inew;
818 FlatRange *frold, *frnew;
819
820 /* Generate a symmetric difference of the old and new memory maps.
821 * Kill ranges in the old map, and instantiate ranges in the new map.
822 */
823 iold = inew = 0;
824 while (iold < old_view->nr || inew < new_view->nr) {
825 if (iold < old_view->nr) {
826 frold = &old_view->ranges[iold];
827 } else {
828 frold = NULL;
829 }
830 if (inew < new_view->nr) {
831 frnew = &new_view->ranges[inew];
832 } else {
833 frnew = NULL;
834 }
835
836 if (frold
837 && (!frnew
838 || int128_lt(frold->addr.start, frnew->addr.start)
839 || (int128_eq(frold->addr.start, frnew->addr.start)
840 && !flatrange_equal(frold, frnew)))) {
841 /* In old but not in new, or in both but attributes changed. */
842
843 if (!adding) {
844 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
845 }
846
847 ++iold;
848 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
849 /* In both and unchanged (except logging may have changed) */
850
851 if (adding) {
852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
853 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
854 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
855 frold->dirty_log_mask,
856 frnew->dirty_log_mask);
857 }
858 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
859 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
860 frold->dirty_log_mask,
861 frnew->dirty_log_mask);
862 }
863 }
864
865 ++iold;
866 ++inew;
867 } else {
868 /* In new */
869
870 if (adding) {
871 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
872 }
873
874 ++inew;
875 }
876 }
877 }
878
879
880 static void address_space_update_topology(AddressSpace *as)
881 {
882 FlatView *old_view = address_space_get_flatview(as);
883 FlatView *new_view = generate_memory_topology(as->root);
884
885 address_space_update_topology_pass(as, old_view, new_view, false);
886 address_space_update_topology_pass(as, old_view, new_view, true);
887
888 /* Writes are protected by the BQL. */
889 atomic_rcu_set(&as->current_map, new_view);
890 call_rcu(old_view, flatview_unref, rcu);
891
892 /* Note that all the old MemoryRegions are still alive up to this
893 * point. This relieves most MemoryListeners from the need to
894 * ref/unref the MemoryRegions they get---unless they use them
895 * outside the iothread mutex, in which case precise reference
896 * counting is necessary.
897 */
898 flatview_unref(old_view);
899
900 address_space_update_ioeventfds(as);
901 }
902
903 void memory_region_transaction_begin(void)
904 {
905 qemu_flush_coalesced_mmio_buffer();
906 ++memory_region_transaction_depth;
907 }
908
909 static void memory_region_clear_pending(void)
910 {
911 memory_region_update_pending = false;
912 ioeventfd_update_pending = false;
913 }
914
915 void memory_region_transaction_commit(void)
916 {
917 AddressSpace *as;
918
919 assert(memory_region_transaction_depth);
920 --memory_region_transaction_depth;
921 if (!memory_region_transaction_depth) {
922 if (memory_region_update_pending) {
923 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
924
925 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
926 address_space_update_topology(as);
927 }
928
929 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
930 } else if (ioeventfd_update_pending) {
931 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
932 address_space_update_ioeventfds(as);
933 }
934 }
935 memory_region_clear_pending();
936 }
937 }
938
939 static void memory_region_destructor_none(MemoryRegion *mr)
940 {
941 }
942
943 static void memory_region_destructor_ram(MemoryRegion *mr)
944 {
945 qemu_ram_free(mr->ram_block);
946 }
947
948 static bool memory_region_need_escape(char c)
949 {
950 return c == '/' || c == '[' || c == '\\' || c == ']';
951 }
952
953 static char *memory_region_escape_name(const char *name)
954 {
955 const char *p;
956 char *escaped, *q;
957 uint8_t c;
958 size_t bytes = 0;
959
960 for (p = name; *p; p++) {
961 bytes += memory_region_need_escape(*p) ? 4 : 1;
962 }
963 if (bytes == p - name) {
964 return g_memdup(name, bytes + 1);
965 }
966
967 escaped = g_malloc(bytes + 1);
968 for (p = name, q = escaped; *p; p++) {
969 c = *p;
970 if (unlikely(memory_region_need_escape(c))) {
971 *q++ = '\\';
972 *q++ = 'x';
973 *q++ = "0123456789abcdef"[c >> 4];
974 c = "0123456789abcdef"[c & 15];
975 }
976 *q++ = c;
977 }
978 *q = 0;
979 return escaped;
980 }
981
982 void memory_region_init(MemoryRegion *mr,
983 Object *owner,
984 const char *name,
985 uint64_t size)
986 {
987 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
988 mr->size = int128_make64(size);
989 if (size == UINT64_MAX) {
990 mr->size = int128_2_64();
991 }
992 mr->name = g_strdup(name);
993 mr->owner = owner;
994 mr->ram_block = NULL;
995
996 if (name) {
997 char *escaped_name = memory_region_escape_name(name);
998 char *name_array = g_strdup_printf("%s[*]", escaped_name);
999
1000 if (!owner) {
1001 owner = container_get(qdev_get_machine(), "/unattached");
1002 }
1003
1004 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1005 object_unref(OBJECT(mr));
1006 g_free(name_array);
1007 g_free(escaped_name);
1008 }
1009 }
1010
1011 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1012 void *opaque, Error **errp)
1013 {
1014 MemoryRegion *mr = MEMORY_REGION(obj);
1015 uint64_t value = mr->addr;
1016
1017 visit_type_uint64(v, name, &value, errp);
1018 }
1019
1020 static void memory_region_get_container(Object *obj, Visitor *v,
1021 const char *name, void *opaque,
1022 Error **errp)
1023 {
1024 MemoryRegion *mr = MEMORY_REGION(obj);
1025 gchar *path = (gchar *)"";
1026
1027 if (mr->container) {
1028 path = object_get_canonical_path(OBJECT(mr->container));
1029 }
1030 visit_type_str(v, name, &path, errp);
1031 if (mr->container) {
1032 g_free(path);
1033 }
1034 }
1035
1036 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1037 const char *part)
1038 {
1039 MemoryRegion *mr = MEMORY_REGION(obj);
1040
1041 return OBJECT(mr->container);
1042 }
1043
1044 static void memory_region_get_priority(Object *obj, Visitor *v,
1045 const char *name, void *opaque,
1046 Error **errp)
1047 {
1048 MemoryRegion *mr = MEMORY_REGION(obj);
1049 int32_t value = mr->priority;
1050
1051 visit_type_int32(v, name, &value, errp);
1052 }
1053
1054 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1055 void *opaque, Error **errp)
1056 {
1057 MemoryRegion *mr = MEMORY_REGION(obj);
1058 uint64_t value = memory_region_size(mr);
1059
1060 visit_type_uint64(v, name, &value, errp);
1061 }
1062
1063 static void memory_region_initfn(Object *obj)
1064 {
1065 MemoryRegion *mr = MEMORY_REGION(obj);
1066 ObjectProperty *op;
1067
1068 mr->ops = &unassigned_mem_ops;
1069 mr->enabled = true;
1070 mr->romd_mode = true;
1071 mr->global_locking = true;
1072 mr->destructor = memory_region_destructor_none;
1073 QTAILQ_INIT(&mr->subregions);
1074 QTAILQ_INIT(&mr->coalesced);
1075
1076 op = object_property_add(OBJECT(mr), "container",
1077 "link<" TYPE_MEMORY_REGION ">",
1078 memory_region_get_container,
1079 NULL, /* memory_region_set_container */
1080 NULL, NULL, &error_abort);
1081 op->resolve = memory_region_resolve_container;
1082
1083 object_property_add(OBJECT(mr), "addr", "uint64",
1084 memory_region_get_addr,
1085 NULL, /* memory_region_set_addr */
1086 NULL, NULL, &error_abort);
1087 object_property_add(OBJECT(mr), "priority", "uint32",
1088 memory_region_get_priority,
1089 NULL, /* memory_region_set_priority */
1090 NULL, NULL, &error_abort);
1091 object_property_add(OBJECT(mr), "size", "uint64",
1092 memory_region_get_size,
1093 NULL, /* memory_region_set_size, */
1094 NULL, NULL, &error_abort);
1095 }
1096
1097 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1098 unsigned size)
1099 {
1100 #ifdef DEBUG_UNASSIGNED
1101 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1102 #endif
1103 if (current_cpu != NULL) {
1104 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1105 }
1106 return 0;
1107 }
1108
1109 static void unassigned_mem_write(void *opaque, hwaddr addr,
1110 uint64_t val, unsigned size)
1111 {
1112 #ifdef DEBUG_UNASSIGNED
1113 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1114 #endif
1115 if (current_cpu != NULL) {
1116 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1117 }
1118 }
1119
1120 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1121 unsigned size, bool is_write)
1122 {
1123 return false;
1124 }
1125
1126 const MemoryRegionOps unassigned_mem_ops = {
1127 .valid.accepts = unassigned_mem_accepts,
1128 .endianness = DEVICE_NATIVE_ENDIAN,
1129 };
1130
1131 static uint64_t memory_region_ram_device_read(void *opaque,
1132 hwaddr addr, unsigned size)
1133 {
1134 MemoryRegion *mr = opaque;
1135 uint64_t data = (uint64_t)~0;
1136
1137 switch (size) {
1138 case 1:
1139 data = *(uint8_t *)(mr->ram_block->host + addr);
1140 break;
1141 case 2:
1142 data = *(uint16_t *)(mr->ram_block->host + addr);
1143 break;
1144 case 4:
1145 data = *(uint32_t *)(mr->ram_block->host + addr);
1146 break;
1147 case 8:
1148 data = *(uint64_t *)(mr->ram_block->host + addr);
1149 break;
1150 }
1151
1152 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1153
1154 return data;
1155 }
1156
1157 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1158 uint64_t data, unsigned size)
1159 {
1160 MemoryRegion *mr = opaque;
1161
1162 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1163
1164 switch (size) {
1165 case 1:
1166 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1167 break;
1168 case 2:
1169 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1170 break;
1171 case 4:
1172 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1173 break;
1174 case 8:
1175 *(uint64_t *)(mr->ram_block->host + addr) = data;
1176 break;
1177 }
1178 }
1179
1180 static const MemoryRegionOps ram_device_mem_ops = {
1181 .read = memory_region_ram_device_read,
1182 .write = memory_region_ram_device_write,
1183 .endianness = DEVICE_NATIVE_ENDIAN,
1184 .valid = {
1185 .min_access_size = 1,
1186 .max_access_size = 8,
1187 .unaligned = true,
1188 },
1189 .impl = {
1190 .min_access_size = 1,
1191 .max_access_size = 8,
1192 .unaligned = true,
1193 },
1194 };
1195
1196 bool memory_region_access_valid(MemoryRegion *mr,
1197 hwaddr addr,
1198 unsigned size,
1199 bool is_write)
1200 {
1201 int access_size_min, access_size_max;
1202 int access_size, i;
1203
1204 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1205 return false;
1206 }
1207
1208 if (!mr->ops->valid.accepts) {
1209 return true;
1210 }
1211
1212 access_size_min = mr->ops->valid.min_access_size;
1213 if (!mr->ops->valid.min_access_size) {
1214 access_size_min = 1;
1215 }
1216
1217 access_size_max = mr->ops->valid.max_access_size;
1218 if (!mr->ops->valid.max_access_size) {
1219 access_size_max = 4;
1220 }
1221
1222 access_size = MAX(MIN(size, access_size_max), access_size_min);
1223 for (i = 0; i < size; i += access_size) {
1224 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1225 is_write)) {
1226 return false;
1227 }
1228 }
1229
1230 return true;
1231 }
1232
1233 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1234 hwaddr addr,
1235 uint64_t *pval,
1236 unsigned size,
1237 MemTxAttrs attrs)
1238 {
1239 *pval = 0;
1240
1241 if (mr->ops->read) {
1242 return access_with_adjusted_size(addr, pval, size,
1243 mr->ops->impl.min_access_size,
1244 mr->ops->impl.max_access_size,
1245 memory_region_read_accessor,
1246 mr, attrs);
1247 } else if (mr->ops->read_with_attrs) {
1248 return access_with_adjusted_size(addr, pval, size,
1249 mr->ops->impl.min_access_size,
1250 mr->ops->impl.max_access_size,
1251 memory_region_read_with_attrs_accessor,
1252 mr, attrs);
1253 } else {
1254 return access_with_adjusted_size(addr, pval, size, 1, 4,
1255 memory_region_oldmmio_read_accessor,
1256 mr, attrs);
1257 }
1258 }
1259
1260 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1261 hwaddr addr,
1262 uint64_t *pval,
1263 unsigned size,
1264 MemTxAttrs attrs)
1265 {
1266 MemTxResult r;
1267
1268 if (!memory_region_access_valid(mr, addr, size, false)) {
1269 *pval = unassigned_mem_read(mr, addr, size);
1270 return MEMTX_DECODE_ERROR;
1271 }
1272
1273 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1274 adjust_endianness(mr, pval, size);
1275 return r;
1276 }
1277
1278 /* Return true if an eventfd was signalled */
1279 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1280 hwaddr addr,
1281 uint64_t data,
1282 unsigned size,
1283 MemTxAttrs attrs)
1284 {
1285 MemoryRegionIoeventfd ioeventfd = {
1286 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1287 .data = data,
1288 };
1289 unsigned i;
1290
1291 for (i = 0; i < mr->ioeventfd_nb; i++) {
1292 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1293 ioeventfd.e = mr->ioeventfds[i].e;
1294
1295 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1296 event_notifier_set(ioeventfd.e);
1297 return true;
1298 }
1299 }
1300
1301 return false;
1302 }
1303
1304 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1305 hwaddr addr,
1306 uint64_t data,
1307 unsigned size,
1308 MemTxAttrs attrs)
1309 {
1310 if (!memory_region_access_valid(mr, addr, size, true)) {
1311 unassigned_mem_write(mr, addr, data, size);
1312 return MEMTX_DECODE_ERROR;
1313 }
1314
1315 adjust_endianness(mr, &data, size);
1316
1317 if ((!kvm_eventfds_enabled()) &&
1318 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1319 return MEMTX_OK;
1320 }
1321
1322 if (mr->ops->write) {
1323 return access_with_adjusted_size(addr, &data, size,
1324 mr->ops->impl.min_access_size,
1325 mr->ops->impl.max_access_size,
1326 memory_region_write_accessor, mr,
1327 attrs);
1328 } else if (mr->ops->write_with_attrs) {
1329 return
1330 access_with_adjusted_size(addr, &data, size,
1331 mr->ops->impl.min_access_size,
1332 mr->ops->impl.max_access_size,
1333 memory_region_write_with_attrs_accessor,
1334 mr, attrs);
1335 } else {
1336 return access_with_adjusted_size(addr, &data, size, 1, 4,
1337 memory_region_oldmmio_write_accessor,
1338 mr, attrs);
1339 }
1340 }
1341
1342 void memory_region_init_io(MemoryRegion *mr,
1343 Object *owner,
1344 const MemoryRegionOps *ops,
1345 void *opaque,
1346 const char *name,
1347 uint64_t size)
1348 {
1349 memory_region_init(mr, owner, name, size);
1350 mr->ops = ops ? ops : &unassigned_mem_ops;
1351 mr->opaque = opaque;
1352 mr->terminates = true;
1353 }
1354
1355 void memory_region_init_ram(MemoryRegion *mr,
1356 Object *owner,
1357 const char *name,
1358 uint64_t size,
1359 Error **errp)
1360 {
1361 memory_region_init(mr, owner, name, size);
1362 mr->ram = true;
1363 mr->terminates = true;
1364 mr->destructor = memory_region_destructor_ram;
1365 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1366 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1367 }
1368
1369 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1370 Object *owner,
1371 const char *name,
1372 uint64_t size,
1373 uint64_t max_size,
1374 void (*resized)(const char*,
1375 uint64_t length,
1376 void *host),
1377 Error **errp)
1378 {
1379 memory_region_init(mr, owner, name, size);
1380 mr->ram = true;
1381 mr->terminates = true;
1382 mr->destructor = memory_region_destructor_ram;
1383 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1384 mr, errp);
1385 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1386 }
1387
1388 #ifdef __linux__
1389 void memory_region_init_ram_from_file(MemoryRegion *mr,
1390 struct Object *owner,
1391 const char *name,
1392 uint64_t size,
1393 bool share,
1394 const char *path,
1395 Error **errp)
1396 {
1397 memory_region_init(mr, owner, name, size);
1398 mr->ram = true;
1399 mr->terminates = true;
1400 mr->destructor = memory_region_destructor_ram;
1401 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1402 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1403 }
1404 #endif
1405
1406 void memory_region_init_ram_ptr(MemoryRegion *mr,
1407 Object *owner,
1408 const char *name,
1409 uint64_t size,
1410 void *ptr)
1411 {
1412 memory_region_init(mr, owner, name, size);
1413 mr->ram = true;
1414 mr->terminates = true;
1415 mr->destructor = memory_region_destructor_ram;
1416 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1417
1418 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1419 assert(ptr != NULL);
1420 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1421 }
1422
1423 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1424 Object *owner,
1425 const char *name,
1426 uint64_t size,
1427 void *ptr)
1428 {
1429 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1430 mr->ram_device = true;
1431 mr->ops = &ram_device_mem_ops;
1432 mr->opaque = mr;
1433 }
1434
1435 void memory_region_init_alias(MemoryRegion *mr,
1436 Object *owner,
1437 const char *name,
1438 MemoryRegion *orig,
1439 hwaddr offset,
1440 uint64_t size)
1441 {
1442 memory_region_init(mr, owner, name, size);
1443 mr->alias = orig;
1444 mr->alias_offset = offset;
1445 }
1446
1447 void memory_region_init_rom(MemoryRegion *mr,
1448 struct Object *owner,
1449 const char *name,
1450 uint64_t size,
1451 Error **errp)
1452 {
1453 memory_region_init(mr, owner, name, size);
1454 mr->ram = true;
1455 mr->readonly = true;
1456 mr->terminates = true;
1457 mr->destructor = memory_region_destructor_ram;
1458 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1459 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1460 }
1461
1462 void memory_region_init_rom_device(MemoryRegion *mr,
1463 Object *owner,
1464 const MemoryRegionOps *ops,
1465 void *opaque,
1466 const char *name,
1467 uint64_t size,
1468 Error **errp)
1469 {
1470 assert(ops);
1471 memory_region_init(mr, owner, name, size);
1472 mr->ops = ops;
1473 mr->opaque = opaque;
1474 mr->terminates = true;
1475 mr->rom_device = true;
1476 mr->destructor = memory_region_destructor_ram;
1477 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1478 }
1479
1480 void memory_region_init_iommu(MemoryRegion *mr,
1481 Object *owner,
1482 const MemoryRegionIOMMUOps *ops,
1483 const char *name,
1484 uint64_t size)
1485 {
1486 memory_region_init(mr, owner, name, size);
1487 mr->iommu_ops = ops,
1488 mr->terminates = true; /* then re-forwards */
1489 QLIST_INIT(&mr->iommu_notify);
1490 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1491 }
1492
1493 static void memory_region_finalize(Object *obj)
1494 {
1495 MemoryRegion *mr = MEMORY_REGION(obj);
1496
1497 assert(!mr->container);
1498
1499 /* We know the region is not visible in any address space (it
1500 * does not have a container and cannot be a root either because
1501 * it has no references, so we can blindly clear mr->enabled.
1502 * memory_region_set_enabled instead could trigger a transaction
1503 * and cause an infinite loop.
1504 */
1505 mr->enabled = false;
1506 memory_region_transaction_begin();
1507 while (!QTAILQ_EMPTY(&mr->subregions)) {
1508 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1509 memory_region_del_subregion(mr, subregion);
1510 }
1511 memory_region_transaction_commit();
1512
1513 mr->destructor(mr);
1514 memory_region_clear_coalescing(mr);
1515 g_free((char *)mr->name);
1516 g_free(mr->ioeventfds);
1517 }
1518
1519 Object *memory_region_owner(MemoryRegion *mr)
1520 {
1521 Object *obj = OBJECT(mr);
1522 return obj->parent;
1523 }
1524
1525 void memory_region_ref(MemoryRegion *mr)
1526 {
1527 /* MMIO callbacks most likely will access data that belongs
1528 * to the owner, hence the need to ref/unref the owner whenever
1529 * the memory region is in use.
1530 *
1531 * The memory region is a child of its owner. As long as the
1532 * owner doesn't call unparent itself on the memory region,
1533 * ref-ing the owner will also keep the memory region alive.
1534 * Memory regions without an owner are supposed to never go away;
1535 * we do not ref/unref them because it slows down DMA sensibly.
1536 */
1537 if (mr && mr->owner) {
1538 object_ref(mr->owner);
1539 }
1540 }
1541
1542 void memory_region_unref(MemoryRegion *mr)
1543 {
1544 if (mr && mr->owner) {
1545 object_unref(mr->owner);
1546 }
1547 }
1548
1549 uint64_t memory_region_size(MemoryRegion *mr)
1550 {
1551 if (int128_eq(mr->size, int128_2_64())) {
1552 return UINT64_MAX;
1553 }
1554 return int128_get64(mr->size);
1555 }
1556
1557 const char *memory_region_name(const MemoryRegion *mr)
1558 {
1559 if (!mr->name) {
1560 ((MemoryRegion *)mr)->name =
1561 object_get_canonical_path_component(OBJECT(mr));
1562 }
1563 return mr->name;
1564 }
1565
1566 bool memory_region_is_ram_device(MemoryRegion *mr)
1567 {
1568 return mr->ram_device;
1569 }
1570
1571 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1572 {
1573 uint8_t mask = mr->dirty_log_mask;
1574 if (global_dirty_log && mr->ram_block) {
1575 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1576 }
1577 return mask;
1578 }
1579
1580 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1581 {
1582 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1583 }
1584
1585 static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1586 {
1587 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1588 IOMMUNotifier *iommu_notifier;
1589
1590 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1591 flags |= iommu_notifier->notifier_flags;
1592 }
1593
1594 if (flags != mr->iommu_notify_flags &&
1595 mr->iommu_ops->notify_flag_changed) {
1596 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1597 flags);
1598 }
1599
1600 mr->iommu_notify_flags = flags;
1601 }
1602
1603 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1604 IOMMUNotifier *n)
1605 {
1606 if (mr->alias) {
1607 memory_region_register_iommu_notifier(mr->alias, n);
1608 return;
1609 }
1610
1611 /* We need to register for at least one bitfield */
1612 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1613 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1614 memory_region_update_iommu_notify_flags(mr);
1615 }
1616
1617 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1618 {
1619 assert(memory_region_is_iommu(mr));
1620 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1621 return mr->iommu_ops->get_min_page_size(mr);
1622 }
1623 return TARGET_PAGE_SIZE;
1624 }
1625
1626 void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1627 bool is_write)
1628 {
1629 hwaddr addr, granularity;
1630 IOMMUTLBEntry iotlb;
1631
1632 granularity = memory_region_iommu_get_min_page_size(mr);
1633
1634 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1635 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1636 if (iotlb.perm != IOMMU_NONE) {
1637 n->notify(n, &iotlb);
1638 }
1639
1640 /* if (2^64 - MR size) < granularity, it's possible to get an
1641 * infinite loop here. This should catch such a wraparound */
1642 if ((addr + granularity) < addr) {
1643 break;
1644 }
1645 }
1646 }
1647
1648 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1649 IOMMUNotifier *n)
1650 {
1651 if (mr->alias) {
1652 memory_region_unregister_iommu_notifier(mr->alias, n);
1653 return;
1654 }
1655 QLIST_REMOVE(n, node);
1656 memory_region_update_iommu_notify_flags(mr);
1657 }
1658
1659 void memory_region_notify_iommu(MemoryRegion *mr,
1660 IOMMUTLBEntry entry)
1661 {
1662 IOMMUNotifier *iommu_notifier;
1663 IOMMUNotifierFlag request_flags;
1664
1665 assert(memory_region_is_iommu(mr));
1666
1667 if (entry.perm & IOMMU_RW) {
1668 request_flags = IOMMU_NOTIFIER_MAP;
1669 } else {
1670 request_flags = IOMMU_NOTIFIER_UNMAP;
1671 }
1672
1673 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1674 if (iommu_notifier->notifier_flags & request_flags) {
1675 iommu_notifier->notify(iommu_notifier, &entry);
1676 }
1677 }
1678 }
1679
1680 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1681 {
1682 uint8_t mask = 1 << client;
1683 uint8_t old_logging;
1684
1685 assert(client == DIRTY_MEMORY_VGA);
1686 old_logging = mr->vga_logging_count;
1687 mr->vga_logging_count += log ? 1 : -1;
1688 if (!!old_logging == !!mr->vga_logging_count) {
1689 return;
1690 }
1691
1692 memory_region_transaction_begin();
1693 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1694 memory_region_update_pending |= mr->enabled;
1695 memory_region_transaction_commit();
1696 }
1697
1698 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1699 hwaddr size, unsigned client)
1700 {
1701 assert(mr->ram_block);
1702 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1703 size, client);
1704 }
1705
1706 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1707 hwaddr size)
1708 {
1709 assert(mr->ram_block);
1710 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1711 size,
1712 memory_region_get_dirty_log_mask(mr));
1713 }
1714
1715 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1716 hwaddr size, unsigned client)
1717 {
1718 assert(mr->ram_block);
1719 return cpu_physical_memory_test_and_clear_dirty(
1720 memory_region_get_ram_addr(mr) + addr, size, client);
1721 }
1722
1723
1724 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1725 {
1726 MemoryListener *listener;
1727 AddressSpace *as;
1728 FlatView *view;
1729 FlatRange *fr;
1730
1731 /* If the same address space has multiple log_sync listeners, we
1732 * visit that address space's FlatView multiple times. But because
1733 * log_sync listeners are rare, it's still cheaper than walking each
1734 * address space once.
1735 */
1736 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1737 if (!listener->log_sync) {
1738 continue;
1739 }
1740 as = listener->address_space;
1741 view = address_space_get_flatview(as);
1742 FOR_EACH_FLAT_RANGE(fr, view) {
1743 if (fr->mr == mr) {
1744 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1745 listener->log_sync(listener, &mrs);
1746 }
1747 }
1748 flatview_unref(view);
1749 }
1750 }
1751
1752 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1753 {
1754 if (mr->readonly != readonly) {
1755 memory_region_transaction_begin();
1756 mr->readonly = readonly;
1757 memory_region_update_pending |= mr->enabled;
1758 memory_region_transaction_commit();
1759 }
1760 }
1761
1762 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1763 {
1764 if (mr->romd_mode != romd_mode) {
1765 memory_region_transaction_begin();
1766 mr->romd_mode = romd_mode;
1767 memory_region_update_pending |= mr->enabled;
1768 memory_region_transaction_commit();
1769 }
1770 }
1771
1772 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1773 hwaddr size, unsigned client)
1774 {
1775 assert(mr->ram_block);
1776 cpu_physical_memory_test_and_clear_dirty(
1777 memory_region_get_ram_addr(mr) + addr, size, client);
1778 }
1779
1780 int memory_region_get_fd(MemoryRegion *mr)
1781 {
1782 int fd;
1783
1784 rcu_read_lock();
1785 while (mr->alias) {
1786 mr = mr->alias;
1787 }
1788 fd = mr->ram_block->fd;
1789 rcu_read_unlock();
1790
1791 return fd;
1792 }
1793
1794 void memory_region_set_fd(MemoryRegion *mr, int fd)
1795 {
1796 rcu_read_lock();
1797 while (mr->alias) {
1798 mr = mr->alias;
1799 }
1800 mr->ram_block->fd = fd;
1801 rcu_read_unlock();
1802 }
1803
1804 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1805 {
1806 void *ptr;
1807 uint64_t offset = 0;
1808
1809 rcu_read_lock();
1810 while (mr->alias) {
1811 offset += mr->alias_offset;
1812 mr = mr->alias;
1813 }
1814 assert(mr->ram_block);
1815 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1816 rcu_read_unlock();
1817
1818 return ptr;
1819 }
1820
1821 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1822 {
1823 RAMBlock *block;
1824
1825 block = qemu_ram_block_from_host(ptr, false, offset);
1826 if (!block) {
1827 return NULL;
1828 }
1829
1830 return block->mr;
1831 }
1832
1833 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1834 {
1835 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1836 }
1837
1838 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1839 {
1840 assert(mr->ram_block);
1841
1842 qemu_ram_resize(mr->ram_block, newsize, errp);
1843 }
1844
1845 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1846 {
1847 FlatView *view;
1848 FlatRange *fr;
1849 CoalescedMemoryRange *cmr;
1850 AddrRange tmp;
1851 MemoryRegionSection section;
1852
1853 view = address_space_get_flatview(as);
1854 FOR_EACH_FLAT_RANGE(fr, view) {
1855 if (fr->mr == mr) {
1856 section = (MemoryRegionSection) {
1857 .address_space = as,
1858 .offset_within_address_space = int128_get64(fr->addr.start),
1859 .size = fr->addr.size,
1860 };
1861
1862 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1863 int128_get64(fr->addr.start),
1864 int128_get64(fr->addr.size));
1865 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1866 tmp = addrrange_shift(cmr->addr,
1867 int128_sub(fr->addr.start,
1868 int128_make64(fr->offset_in_region)));
1869 if (!addrrange_intersects(tmp, fr->addr)) {
1870 continue;
1871 }
1872 tmp = addrrange_intersection(tmp, fr->addr);
1873 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1874 int128_get64(tmp.start),
1875 int128_get64(tmp.size));
1876 }
1877 }
1878 }
1879 flatview_unref(view);
1880 }
1881
1882 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1883 {
1884 AddressSpace *as;
1885
1886 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1887 memory_region_update_coalesced_range_as(mr, as);
1888 }
1889 }
1890
1891 void memory_region_set_coalescing(MemoryRegion *mr)
1892 {
1893 memory_region_clear_coalescing(mr);
1894 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1895 }
1896
1897 void memory_region_add_coalescing(MemoryRegion *mr,
1898 hwaddr offset,
1899 uint64_t size)
1900 {
1901 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1902
1903 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1904 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1905 memory_region_update_coalesced_range(mr);
1906 memory_region_set_flush_coalesced(mr);
1907 }
1908
1909 void memory_region_clear_coalescing(MemoryRegion *mr)
1910 {
1911 CoalescedMemoryRange *cmr;
1912 bool updated = false;
1913
1914 qemu_flush_coalesced_mmio_buffer();
1915 mr->flush_coalesced_mmio = false;
1916
1917 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1918 cmr = QTAILQ_FIRST(&mr->coalesced);
1919 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1920 g_free(cmr);
1921 updated = true;
1922 }
1923
1924 if (updated) {
1925 memory_region_update_coalesced_range(mr);
1926 }
1927 }
1928
1929 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1930 {
1931 mr->flush_coalesced_mmio = true;
1932 }
1933
1934 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1935 {
1936 qemu_flush_coalesced_mmio_buffer();
1937 if (QTAILQ_EMPTY(&mr->coalesced)) {
1938 mr->flush_coalesced_mmio = false;
1939 }
1940 }
1941
1942 void memory_region_set_global_locking(MemoryRegion *mr)
1943 {
1944 mr->global_locking = true;
1945 }
1946
1947 void memory_region_clear_global_locking(MemoryRegion *mr)
1948 {
1949 mr->global_locking = false;
1950 }
1951
1952 static bool userspace_eventfd_warning;
1953
1954 void memory_region_add_eventfd(MemoryRegion *mr,
1955 hwaddr addr,
1956 unsigned size,
1957 bool match_data,
1958 uint64_t data,
1959 EventNotifier *e)
1960 {
1961 MemoryRegionIoeventfd mrfd = {
1962 .addr.start = int128_make64(addr),
1963 .addr.size = int128_make64(size),
1964 .match_data = match_data,
1965 .data = data,
1966 .e = e,
1967 };
1968 unsigned i;
1969
1970 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1971 userspace_eventfd_warning))) {
1972 userspace_eventfd_warning = true;
1973 error_report("Using eventfd without MMIO binding in KVM. "
1974 "Suboptimal performance expected");
1975 }
1976
1977 if (size) {
1978 adjust_endianness(mr, &mrfd.data, size);
1979 }
1980 memory_region_transaction_begin();
1981 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1982 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1983 break;
1984 }
1985 }
1986 ++mr->ioeventfd_nb;
1987 mr->ioeventfds = g_realloc(mr->ioeventfds,
1988 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1989 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1990 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1991 mr->ioeventfds[i] = mrfd;
1992 ioeventfd_update_pending |= mr->enabled;
1993 memory_region_transaction_commit();
1994 }
1995
1996 void memory_region_del_eventfd(MemoryRegion *mr,
1997 hwaddr addr,
1998 unsigned size,
1999 bool match_data,
2000 uint64_t data,
2001 EventNotifier *e)
2002 {
2003 MemoryRegionIoeventfd mrfd = {
2004 .addr.start = int128_make64(addr),
2005 .addr.size = int128_make64(size),
2006 .match_data = match_data,
2007 .data = data,
2008 .e = e,
2009 };
2010 unsigned i;
2011
2012 if (size) {
2013 adjust_endianness(mr, &mrfd.data, size);
2014 }
2015 memory_region_transaction_begin();
2016 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2017 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2018 break;
2019 }
2020 }
2021 assert(i != mr->ioeventfd_nb);
2022 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2023 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2024 --mr->ioeventfd_nb;
2025 mr->ioeventfds = g_realloc(mr->ioeventfds,
2026 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2027 ioeventfd_update_pending |= mr->enabled;
2028 memory_region_transaction_commit();
2029 }
2030
2031 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2032 {
2033 MemoryRegion *mr = subregion->container;
2034 MemoryRegion *other;
2035
2036 memory_region_transaction_begin();
2037
2038 memory_region_ref(subregion);
2039 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2040 if (subregion->priority >= other->priority) {
2041 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2042 goto done;
2043 }
2044 }
2045 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2046 done:
2047 memory_region_update_pending |= mr->enabled && subregion->enabled;
2048 memory_region_transaction_commit();
2049 }
2050
2051 static void memory_region_add_subregion_common(MemoryRegion *mr,
2052 hwaddr offset,
2053 MemoryRegion *subregion)
2054 {
2055 assert(!subregion->container);
2056 subregion->container = mr;
2057 subregion->addr = offset;
2058 memory_region_update_container_subregions(subregion);
2059 }
2060
2061 void memory_region_add_subregion(MemoryRegion *mr,
2062 hwaddr offset,
2063 MemoryRegion *subregion)
2064 {
2065 subregion->priority = 0;
2066 memory_region_add_subregion_common(mr, offset, subregion);
2067 }
2068
2069 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2070 hwaddr offset,
2071 MemoryRegion *subregion,
2072 int priority)
2073 {
2074 subregion->priority = priority;
2075 memory_region_add_subregion_common(mr, offset, subregion);
2076 }
2077
2078 void memory_region_del_subregion(MemoryRegion *mr,
2079 MemoryRegion *subregion)
2080 {
2081 memory_region_transaction_begin();
2082 assert(subregion->container == mr);
2083 subregion->container = NULL;
2084 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2085 memory_region_unref(subregion);
2086 memory_region_update_pending |= mr->enabled && subregion->enabled;
2087 memory_region_transaction_commit();
2088 }
2089
2090 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2091 {
2092 if (enabled == mr->enabled) {
2093 return;
2094 }
2095 memory_region_transaction_begin();
2096 mr->enabled = enabled;
2097 memory_region_update_pending = true;
2098 memory_region_transaction_commit();
2099 }
2100
2101 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2102 {
2103 Int128 s = int128_make64(size);
2104
2105 if (size == UINT64_MAX) {
2106 s = int128_2_64();
2107 }
2108 if (int128_eq(s, mr->size)) {
2109 return;
2110 }
2111 memory_region_transaction_begin();
2112 mr->size = s;
2113 memory_region_update_pending = true;
2114 memory_region_transaction_commit();
2115 }
2116
2117 static void memory_region_readd_subregion(MemoryRegion *mr)
2118 {
2119 MemoryRegion *container = mr->container;
2120
2121 if (container) {
2122 memory_region_transaction_begin();
2123 memory_region_ref(mr);
2124 memory_region_del_subregion(container, mr);
2125 mr->container = container;
2126 memory_region_update_container_subregions(mr);
2127 memory_region_unref(mr);
2128 memory_region_transaction_commit();
2129 }
2130 }
2131
2132 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2133 {
2134 if (addr != mr->addr) {
2135 mr->addr = addr;
2136 memory_region_readd_subregion(mr);
2137 }
2138 }
2139
2140 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2141 {
2142 assert(mr->alias);
2143
2144 if (offset == mr->alias_offset) {
2145 return;
2146 }
2147
2148 memory_region_transaction_begin();
2149 mr->alias_offset = offset;
2150 memory_region_update_pending |= mr->enabled;
2151 memory_region_transaction_commit();
2152 }
2153
2154 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2155 {
2156 return mr->align;
2157 }
2158
2159 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2160 {
2161 const AddrRange *addr = addr_;
2162 const FlatRange *fr = fr_;
2163
2164 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2165 return -1;
2166 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2167 return 1;
2168 }
2169 return 0;
2170 }
2171
2172 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2173 {
2174 return bsearch(&addr, view->ranges, view->nr,
2175 sizeof(FlatRange), cmp_flatrange_addr);
2176 }
2177
2178 bool memory_region_is_mapped(MemoryRegion *mr)
2179 {
2180 return mr->container ? true : false;
2181 }
2182
2183 /* Same as memory_region_find, but it does not add a reference to the
2184 * returned region. It must be called from an RCU critical section.
2185 */
2186 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2187 hwaddr addr, uint64_t size)
2188 {
2189 MemoryRegionSection ret = { .mr = NULL };
2190 MemoryRegion *root;
2191 AddressSpace *as;
2192 AddrRange range;
2193 FlatView *view;
2194 FlatRange *fr;
2195
2196 addr += mr->addr;
2197 for (root = mr; root->container; ) {
2198 root = root->container;
2199 addr += root->addr;
2200 }
2201
2202 as = memory_region_to_address_space(root);
2203 if (!as) {
2204 return ret;
2205 }
2206 range = addrrange_make(int128_make64(addr), int128_make64(size));
2207
2208 view = atomic_rcu_read(&as->current_map);
2209 fr = flatview_lookup(view, range);
2210 if (!fr) {
2211 return ret;
2212 }
2213
2214 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2215 --fr;
2216 }
2217
2218 ret.mr = fr->mr;
2219 ret.address_space = as;
2220 range = addrrange_intersection(range, fr->addr);
2221 ret.offset_within_region = fr->offset_in_region;
2222 ret.offset_within_region += int128_get64(int128_sub(range.start,
2223 fr->addr.start));
2224 ret.size = range.size;
2225 ret.offset_within_address_space = int128_get64(range.start);
2226 ret.readonly = fr->readonly;
2227 return ret;
2228 }
2229
2230 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2231 hwaddr addr, uint64_t size)
2232 {
2233 MemoryRegionSection ret;
2234 rcu_read_lock();
2235 ret = memory_region_find_rcu(mr, addr, size);
2236 if (ret.mr) {
2237 memory_region_ref(ret.mr);
2238 }
2239 rcu_read_unlock();
2240 return ret;
2241 }
2242
2243 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2244 {
2245 MemoryRegion *mr;
2246
2247 rcu_read_lock();
2248 mr = memory_region_find_rcu(container, addr, 1).mr;
2249 rcu_read_unlock();
2250 return mr && mr != container;
2251 }
2252
2253 void memory_global_dirty_log_sync(void)
2254 {
2255 MemoryListener *listener;
2256 AddressSpace *as;
2257 FlatView *view;
2258 FlatRange *fr;
2259
2260 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2261 if (!listener->log_sync) {
2262 continue;
2263 }
2264 as = listener->address_space;
2265 view = address_space_get_flatview(as);
2266 FOR_EACH_FLAT_RANGE(fr, view) {
2267 if (fr->dirty_log_mask) {
2268 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2269 listener->log_sync(listener, &mrs);
2270 }
2271 }
2272 flatview_unref(view);
2273 }
2274 }
2275
2276 void memory_global_dirty_log_start(void)
2277 {
2278 global_dirty_log = true;
2279
2280 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2281
2282 /* Refresh DIRTY_LOG_MIGRATION bit. */
2283 memory_region_transaction_begin();
2284 memory_region_update_pending = true;
2285 memory_region_transaction_commit();
2286 }
2287
2288 void memory_global_dirty_log_stop(void)
2289 {
2290 global_dirty_log = false;
2291
2292 /* Refresh DIRTY_LOG_MIGRATION bit. */
2293 memory_region_transaction_begin();
2294 memory_region_update_pending = true;
2295 memory_region_transaction_commit();
2296
2297 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2298 }
2299
2300 static void listener_add_address_space(MemoryListener *listener,
2301 AddressSpace *as)
2302 {
2303 FlatView *view;
2304 FlatRange *fr;
2305
2306 if (listener->begin) {
2307 listener->begin(listener);
2308 }
2309 if (global_dirty_log) {
2310 if (listener->log_global_start) {
2311 listener->log_global_start(listener);
2312 }
2313 }
2314
2315 view = address_space_get_flatview(as);
2316 FOR_EACH_FLAT_RANGE(fr, view) {
2317 MemoryRegionSection section = {
2318 .mr = fr->mr,
2319 .address_space = as,
2320 .offset_within_region = fr->offset_in_region,
2321 .size = fr->addr.size,
2322 .offset_within_address_space = int128_get64(fr->addr.start),
2323 .readonly = fr->readonly,
2324 };
2325 if (fr->dirty_log_mask && listener->log_start) {
2326 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2327 }
2328 if (listener->region_add) {
2329 listener->region_add(listener, &section);
2330 }
2331 }
2332 if (listener->commit) {
2333 listener->commit(listener);
2334 }
2335 flatview_unref(view);
2336 }
2337
2338 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2339 {
2340 MemoryListener *other = NULL;
2341
2342 listener->address_space = as;
2343 if (QTAILQ_EMPTY(&memory_listeners)
2344 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2345 memory_listeners)->priority) {
2346 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2347 } else {
2348 QTAILQ_FOREACH(other, &memory_listeners, link) {
2349 if (listener->priority < other->priority) {
2350 break;
2351 }
2352 }
2353 QTAILQ_INSERT_BEFORE(other, listener, link);
2354 }
2355
2356 if (QTAILQ_EMPTY(&as->listeners)
2357 || listener->priority >= QTAILQ_LAST(&as->listeners,
2358 memory_listeners)->priority) {
2359 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2360 } else {
2361 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2362 if (listener->priority < other->priority) {
2363 break;
2364 }
2365 }
2366 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2367 }
2368
2369 listener_add_address_space(listener, as);
2370 }
2371
2372 void memory_listener_unregister(MemoryListener *listener)
2373 {
2374 QTAILQ_REMOVE(&memory_listeners, listener, link);
2375 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2376 }
2377
2378 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2379 {
2380 memory_region_ref(root);
2381 memory_region_transaction_begin();
2382 as->ref_count = 1;
2383 as->root = root;
2384 as->malloced = false;
2385 as->current_map = g_new(FlatView, 1);
2386 flatview_init(as->current_map);
2387 as->ioeventfd_nb = 0;
2388 as->ioeventfds = NULL;
2389 QTAILQ_INIT(&as->listeners);
2390 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2391 as->name = g_strdup(name ? name : "anonymous");
2392 address_space_init_dispatch(as);
2393 memory_region_update_pending |= root->enabled;
2394 memory_region_transaction_commit();
2395 }
2396
2397 static void do_address_space_destroy(AddressSpace *as)
2398 {
2399 bool do_free = as->malloced;
2400
2401 address_space_destroy_dispatch(as);
2402 assert(QTAILQ_EMPTY(&as->listeners));
2403
2404 flatview_unref(as->current_map);
2405 g_free(as->name);
2406 g_free(as->ioeventfds);
2407 memory_region_unref(as->root);
2408 if (do_free) {
2409 g_free(as);
2410 }
2411 }
2412
2413 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2414 {
2415 AddressSpace *as;
2416
2417 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2418 if (root == as->root && as->malloced) {
2419 as->ref_count++;
2420 return as;
2421 }
2422 }
2423
2424 as = g_malloc0(sizeof *as);
2425 address_space_init(as, root, name);
2426 as->malloced = true;
2427 return as;
2428 }
2429
2430 void address_space_destroy(AddressSpace *as)
2431 {
2432 MemoryRegion *root = as->root;
2433
2434 as->ref_count--;
2435 if (as->ref_count) {
2436 return;
2437 }
2438 /* Flush out anything from MemoryListeners listening in on this */
2439 memory_region_transaction_begin();
2440 as->root = NULL;
2441 memory_region_transaction_commit();
2442 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2443 address_space_unregister(as);
2444
2445 /* At this point, as->dispatch and as->current_map are dummy
2446 * entries that the guest should never use. Wait for the old
2447 * values to expire before freeing the data.
2448 */
2449 as->root = root;
2450 call_rcu(as, do_address_space_destroy, rcu);
2451 }
2452
2453 typedef struct MemoryRegionList MemoryRegionList;
2454
2455 struct MemoryRegionList {
2456 const MemoryRegion *mr;
2457 QTAILQ_ENTRY(MemoryRegionList) queue;
2458 };
2459
2460 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2461
2462 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2463 const MemoryRegion *mr, unsigned int level,
2464 hwaddr base,
2465 MemoryRegionListHead *alias_print_queue)
2466 {
2467 MemoryRegionList *new_ml, *ml, *next_ml;
2468 MemoryRegionListHead submr_print_queue;
2469 const MemoryRegion *submr;
2470 unsigned int i;
2471
2472 if (!mr) {
2473 return;
2474 }
2475
2476 for (i = 0; i < level; i++) {
2477 mon_printf(f, " ");
2478 }
2479
2480 if (mr->alias) {
2481 MemoryRegionList *ml;
2482 bool found = false;
2483
2484 /* check if the alias is already in the queue */
2485 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2486 if (ml->mr == mr->alias) {
2487 found = true;
2488 }
2489 }
2490
2491 if (!found) {
2492 ml = g_new(MemoryRegionList, 1);
2493 ml->mr = mr->alias;
2494 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2495 }
2496 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2497 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2498 "-" TARGET_FMT_plx "%s\n",
2499 base + mr->addr,
2500 base + mr->addr
2501 + (int128_nz(mr->size) ?
2502 (hwaddr)int128_get64(int128_sub(mr->size,
2503 int128_one())) : 0),
2504 mr->priority,
2505 mr->romd_mode ? 'R' : '-',
2506 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2507 : '-',
2508 memory_region_name(mr),
2509 memory_region_name(mr->alias),
2510 mr->alias_offset,
2511 mr->alias_offset
2512 + (int128_nz(mr->size) ?
2513 (hwaddr)int128_get64(int128_sub(mr->size,
2514 int128_one())) : 0),
2515 mr->enabled ? "" : " [disabled]");
2516 } else {
2517 mon_printf(f,
2518 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2519 base + mr->addr,
2520 base + mr->addr
2521 + (int128_nz(mr->size) ?
2522 (hwaddr)int128_get64(int128_sub(mr->size,
2523 int128_one())) : 0),
2524 mr->priority,
2525 mr->romd_mode ? 'R' : '-',
2526 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2527 : '-',
2528 memory_region_name(mr),
2529 mr->enabled ? "" : " [disabled]");
2530 }
2531
2532 QTAILQ_INIT(&submr_print_queue);
2533
2534 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2535 new_ml = g_new(MemoryRegionList, 1);
2536 new_ml->mr = submr;
2537 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2538 if (new_ml->mr->addr < ml->mr->addr ||
2539 (new_ml->mr->addr == ml->mr->addr &&
2540 new_ml->mr->priority > ml->mr->priority)) {
2541 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2542 new_ml = NULL;
2543 break;
2544 }
2545 }
2546 if (new_ml) {
2547 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2548 }
2549 }
2550
2551 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2552 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2553 alias_print_queue);
2554 }
2555
2556 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2557 g_free(ml);
2558 }
2559 }
2560
2561 void mtree_info(fprintf_function mon_printf, void *f)
2562 {
2563 MemoryRegionListHead ml_head;
2564 MemoryRegionList *ml, *ml2;
2565 AddressSpace *as;
2566
2567 QTAILQ_INIT(&ml_head);
2568
2569 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2570 mon_printf(f, "address-space: %s\n", as->name);
2571 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2572 mon_printf(f, "\n");
2573 }
2574
2575 /* print aliased regions */
2576 QTAILQ_FOREACH(ml, &ml_head, queue) {
2577 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2578 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2579 mon_printf(f, "\n");
2580 }
2581
2582 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2583 g_free(ml);
2584 }
2585 }
2586
2587 static const TypeInfo memory_region_info = {
2588 .parent = TYPE_OBJECT,
2589 .name = TYPE_MEMORY_REGION,
2590 .instance_size = sizeof(MemoryRegion),
2591 .instance_init = memory_region_initfn,
2592 .instance_finalize = memory_region_finalize,
2593 };
2594
2595 static void memory_register_types(void)
2596 {
2597 type_register_static(&memory_region_info);
2598 }
2599
2600 type_init(memory_register_types)
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