hw/misc/pc-testdev.c

   1 /*
   2  * QEMU x86 ISA testdev
   3  *
   4  * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 /*
  26  * This device is used to test KVM features specific to the x86 port, such
  27  * as emulation, power management, interrupt routing, among others. It's meant
  28  * to be used like:
  29  *
  30  * qemu-system-x86_64 -device pc-testdev -serial stdio \
  31  * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
  32  * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
  33  *
  34  * Where msr.flat is one of the KVM unittests, present on a separate repo,
  35  * https://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
  36 */
  37
  38 #include "qemu/osdep.h"
  39 #include "qemu/module.h"
  40 #include "hw/irq.h"
  41 #include "hw/isa/isa.h"
  42
  43 #define IOMEM_LEN    0x10000
  44
  45 typedef struct PCTestdev {
  46     ISADevice parent_obj;
  47
  48     MemoryRegion ioport;
  49     MemoryRegion ioport_byte;
  50     MemoryRegion flush;
  51     MemoryRegion irq;
  52     MemoryRegion iomem;
  53     uint32_t ioport_data;
  54     char iomem_buf[IOMEM_LEN];
  55 } PCTestdev;
  56
  57 #define TYPE_TESTDEV "pc-testdev"
  58 #define TESTDEV(obj) \
  59      OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
  60
  61 static uint64_t test_irq_line_read(void *opaque, hwaddr addr, unsigned size)
  62 {
  63     return 0;
  64 }
  65
  66 static void test_irq_line_write(void *opaque, hwaddr addr, uint64_t data,
  67                           unsigned len)
  68 {
  69     PCTestdev *dev = opaque;
  70     ISADevice *isa = ISA_DEVICE(dev);
  71
  72     qemu_set_irq(isa_get_irq(isa, addr), !!data);
  73 }
  74
  75 static const MemoryRegionOps test_irq_ops = {
  76     .read = test_irq_line_read,
  77     .write = test_irq_line_write,
  78     .valid.min_access_size = 1,
  79     .valid.max_access_size = 1,
  80     .endianness = DEVICE_LITTLE_ENDIAN,
  81 };
  82
  83 static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
  84                               unsigned len)
  85 {
  86     PCTestdev *dev = opaque;
  87     int bits = len * 8;
  88     int start_bit = (addr & 3) * 8;
  89     uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
  90     dev->ioport_data &= ~mask;
  91     dev->ioport_data |= data << start_bit;
  92 }
  93
  94 static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
  95 {
  96     PCTestdev *dev = opaque;
  97     int bits = len * 8;
  98     int start_bit = (addr & 3) * 8;
  99     uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
 100     return (dev->ioport_data & mask) >> start_bit;
 101 }
 102
 103 static const MemoryRegionOps test_ioport_ops = {
 104     .read = test_ioport_read,
 105     .write = test_ioport_write,
 106     .endianness = DEVICE_LITTLE_ENDIAN,
 107 };
 108
 109 static const MemoryRegionOps test_ioport_byte_ops = {
 110     .read = test_ioport_read,
 111     .write = test_ioport_write,
 112     .valid.min_access_size = 1,
 113     .valid.max_access_size = 4,
 114     .impl.min_access_size = 1,
 115     .impl.max_access_size = 1,
 116     .endianness = DEVICE_LITTLE_ENDIAN,
 117 };
 118
 119 static uint64_t test_flush_page_read(void *opaque, hwaddr addr, unsigned size)
 120 {
 121     return 0;
 122 }
 123
 124 static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data,
 125                             unsigned len)
 126 {
 127     hwaddr page = 4096;
 128     void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
 129
 130     /* We might not be able to get the full page, only mprotect what we actually
 131        have mapped */
 132 #if defined(CONFIG_POSIX)
 133     mprotect(a, page, PROT_NONE);
 134     mprotect(a, page, PROT_READ|PROT_WRITE);
 135 #endif
 136     cpu_physical_memory_unmap(a, page, 0, 0);
 137 }
 138
 139 static const MemoryRegionOps test_flush_ops = {
 140     .read = test_flush_page_read,
 141     .write = test_flush_page_write,
 142     .valid.min_access_size = 4,
 143     .valid.max_access_size = 4,
 144     .endianness = DEVICE_LITTLE_ENDIAN,
 145 };
 146
 147 static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
 148 {
 149     PCTestdev *dev = opaque;
 150     uint64_t ret = 0;
 151     memcpy(&ret, &dev->iomem_buf[addr], len);
 152
 153     return ret;
 154 }
 155
 156 static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
 157                              unsigned len)
 158 {
 159     PCTestdev *dev = opaque;
 160     memcpy(&dev->iomem_buf[addr], &val, len);
 161     dev->iomem_buf[addr] = val;
 162 }
 163
 164 static const MemoryRegionOps test_iomem_ops = {
 165     .read = test_iomem_read,
 166     .write = test_iomem_write,
 167     .endianness = DEVICE_LITTLE_ENDIAN,
 168 };
 169
 170 static void testdev_realizefn(DeviceState *d, Error **errp)
 171 {
 172     ISADevice *isa = ISA_DEVICE(d);
 173     PCTestdev *dev = TESTDEV(d);
 174     MemoryRegion *mem = isa_address_space(isa);
 175     MemoryRegion *io = isa_address_space_io(isa);
 176
 177     memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
 178                           "pc-testdev-ioport", 4);
 179     memory_region_init_io(&dev->ioport_byte, OBJECT(dev),
 180                           &test_ioport_byte_ops, dev,
 181                           "pc-testdev-ioport-byte", 4);
 182     memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
 183                           "pc-testdev-flush-page", 4);
 184     memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
 185                           "pc-testdev-irq-line", 24);
 186     memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev,
 187                           "pc-testdev-iomem", IOMEM_LEN);
 188
 189     memory_region_add_subregion(io,  0xe0,       &dev->ioport);
 190     memory_region_add_subregion(io,  0xe4,       &dev->flush);
 191     memory_region_add_subregion(io,  0xe8,       &dev->ioport_byte);
 192     memory_region_add_subregion(io,  0x2000,     &dev->irq);
 193     memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
 194 }
 195
 196 static void testdev_class_init(ObjectClass *klass, void *data)
 197 {
 198     DeviceClass *dc = DEVICE_CLASS(klass);
 199
 200     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 201     dc->realize = testdev_realizefn;
 202 }
 203
 204 static const TypeInfo testdev_info = {
 205     .name           = TYPE_TESTDEV,
 206     .parent         = TYPE_ISA_DEVICE,
 207     .instance_size  = sizeof(PCTestdev),
 208     .class_init     = testdev_class_init,
 209 };
 210
 211 static void testdev_register_types(void)
 212 {
 213     type_register_static(&testdev_info);
 214 }
 215
 216 type_init(testdev_register_types)