2 * QEMU 16550A UART emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 /* see docs/specs/pci-serial.txt */
28 #include "hw/char/serial.h"
29 #include "hw/pci/pci.h"
30 #include "qapi/qmp/qerror.h"
32 #define PCI_SERIAL_MAX_PORTS 4
34 typedef struct PCISerialState
{
40 typedef struct PCIMultiSerialState
{
44 char *name
[PCI_SERIAL_MAX_PORTS
];
45 SerialState state
[PCI_SERIAL_MAX_PORTS
];
46 uint32_t level
[PCI_SERIAL_MAX_PORTS
];
49 } PCIMultiSerialState
;
51 static void serial_pci_realize(PCIDevice
*dev
, Error
**errp
)
53 PCISerialState
*pci
= DO_UPCAST(PCISerialState
, dev
, dev
);
54 SerialState
*s
= &pci
->state
;
58 serial_realize_core(s
, &err
);
60 error_propagate(errp
, err
);
64 pci
->dev
.config
[PCI_CLASS_PROG
] = pci
->prog_if
;
65 pci
->dev
.config
[PCI_INTERRUPT_PIN
] = 0x01;
66 s
->irq
= pci_allocate_irq(&pci
->dev
);
68 memory_region_init_io(&s
->io
, OBJECT(pci
), &serial_io_ops
, s
, "serial", 8);
69 pci_register_bar(&pci
->dev
, 0, PCI_BASE_ADDRESS_SPACE_IO
, &s
->io
);
72 static void multi_serial_irq_mux(void *opaque
, int n
, int level
)
74 PCIMultiSerialState
*pci
= opaque
;
77 pci
->level
[n
] = level
;
78 for (i
= 0; i
< pci
->ports
; i
++) {
83 pci_set_irq(&pci
->dev
, pending
);
86 static void multi_serial_pci_realize(PCIDevice
*dev
, Error
**errp
)
88 PCIDeviceClass
*pc
= PCI_DEVICE_GET_CLASS(dev
);
89 PCIMultiSerialState
*pci
= DO_UPCAST(PCIMultiSerialState
, dev
, dev
);
94 switch (pc
->device_id
) {
102 assert(pci
->ports
> 0);
103 assert(pci
->ports
<= PCI_SERIAL_MAX_PORTS
);
105 pci
->dev
.config
[PCI_CLASS_PROG
] = pci
->prog_if
;
106 pci
->dev
.config
[PCI_INTERRUPT_PIN
] = 0x01;
107 memory_region_init(&pci
->iobar
, OBJECT(pci
), "multiserial", 8 * pci
->ports
);
108 pci_register_bar(&pci
->dev
, 0, PCI_BASE_ADDRESS_SPACE_IO
, &pci
->iobar
);
109 pci
->irqs
= qemu_allocate_irqs(multi_serial_irq_mux
, pci
,
112 for (i
= 0; i
< pci
->ports
; i
++) {
114 s
->baudbase
= 115200;
115 serial_realize_core(s
, &err
);
117 error_propagate(errp
, err
);
120 s
->irq
= pci
->irqs
[i
];
121 pci
->name
[i
] = g_strdup_printf("uart #%d", i
+1);
122 memory_region_init_io(&s
->io
, OBJECT(pci
), &serial_io_ops
, s
,
124 memory_region_add_subregion(&pci
->iobar
, 8 * i
, &s
->io
);
128 static void serial_pci_exit(PCIDevice
*dev
)
130 PCISerialState
*pci
= DO_UPCAST(PCISerialState
, dev
, dev
);
131 SerialState
*s
= &pci
->state
;
134 qemu_free_irq(s
->irq
);
137 static void multi_serial_pci_exit(PCIDevice
*dev
)
139 PCIMultiSerialState
*pci
= DO_UPCAST(PCIMultiSerialState
, dev
, dev
);
143 for (i
= 0; i
< pci
->ports
; i
++) {
146 memory_region_del_subregion(&pci
->iobar
, &s
->io
);
147 g_free(pci
->name
[i
]);
149 qemu_free_irqs(pci
->irqs
, pci
->ports
);
152 static const VMStateDescription vmstate_pci_serial
= {
153 .name
= "pci-serial",
155 .minimum_version_id
= 1,
156 .fields
= (VMStateField
[]) {
157 VMSTATE_PCI_DEVICE(dev
, PCISerialState
),
158 VMSTATE_STRUCT(state
, PCISerialState
, 0, vmstate_serial
, SerialState
),
159 VMSTATE_END_OF_LIST()
163 static const VMStateDescription vmstate_pci_multi_serial
= {
164 .name
= "pci-serial-multi",
166 .minimum_version_id
= 1,
167 .fields
= (VMStateField
[]) {
168 VMSTATE_PCI_DEVICE(dev
, PCIMultiSerialState
),
169 VMSTATE_STRUCT_ARRAY(state
, PCIMultiSerialState
, PCI_SERIAL_MAX_PORTS
,
170 0, vmstate_serial
, SerialState
),
171 VMSTATE_UINT32_ARRAY(level
, PCIMultiSerialState
, PCI_SERIAL_MAX_PORTS
),
172 VMSTATE_END_OF_LIST()
176 static Property serial_pci_properties
[] = {
177 DEFINE_PROP_CHR("chardev", PCISerialState
, state
.chr
),
178 DEFINE_PROP_UINT8("prog_if", PCISerialState
, prog_if
, 0x02),
179 DEFINE_PROP_END_OF_LIST(),
182 static Property multi_2x_serial_pci_properties
[] = {
183 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState
, state
[0].chr
),
184 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState
, state
[1].chr
),
185 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState
, prog_if
, 0x02),
186 DEFINE_PROP_END_OF_LIST(),
189 static Property multi_4x_serial_pci_properties
[] = {
190 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState
, state
[0].chr
),
191 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState
, state
[1].chr
),
192 DEFINE_PROP_CHR("chardev3", PCIMultiSerialState
, state
[2].chr
),
193 DEFINE_PROP_CHR("chardev4", PCIMultiSerialState
, state
[3].chr
),
194 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState
, prog_if
, 0x02),
195 DEFINE_PROP_END_OF_LIST(),
198 static void serial_pci_class_initfn(ObjectClass
*klass
, void *data
)
200 DeviceClass
*dc
= DEVICE_CLASS(klass
);
201 PCIDeviceClass
*pc
= PCI_DEVICE_CLASS(klass
);
202 pc
->realize
= serial_pci_realize
;
203 pc
->exit
= serial_pci_exit
;
204 pc
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
205 pc
->device_id
= PCI_DEVICE_ID_REDHAT_SERIAL
;
207 pc
->class_id
= PCI_CLASS_COMMUNICATION_SERIAL
;
208 dc
->vmsd
= &vmstate_pci_serial
;
209 dc
->props
= serial_pci_properties
;
210 set_bit(DEVICE_CATEGORY_INPUT
, dc
->categories
);
213 static void multi_2x_serial_pci_class_initfn(ObjectClass
*klass
, void *data
)
215 DeviceClass
*dc
= DEVICE_CLASS(klass
);
216 PCIDeviceClass
*pc
= PCI_DEVICE_CLASS(klass
);
217 pc
->realize
= multi_serial_pci_realize
;
218 pc
->exit
= multi_serial_pci_exit
;
219 pc
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
220 pc
->device_id
= PCI_DEVICE_ID_REDHAT_SERIAL2
;
222 pc
->class_id
= PCI_CLASS_COMMUNICATION_SERIAL
;
223 dc
->vmsd
= &vmstate_pci_multi_serial
;
224 dc
->props
= multi_2x_serial_pci_properties
;
225 set_bit(DEVICE_CATEGORY_INPUT
, dc
->categories
);
228 static void multi_4x_serial_pci_class_initfn(ObjectClass
*klass
, void *data
)
230 DeviceClass
*dc
= DEVICE_CLASS(klass
);
231 PCIDeviceClass
*pc
= PCI_DEVICE_CLASS(klass
);
232 pc
->realize
= multi_serial_pci_realize
;
233 pc
->exit
= multi_serial_pci_exit
;
234 pc
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
235 pc
->device_id
= PCI_DEVICE_ID_REDHAT_SERIAL4
;
237 pc
->class_id
= PCI_CLASS_COMMUNICATION_SERIAL
;
238 dc
->vmsd
= &vmstate_pci_multi_serial
;
239 dc
->props
= multi_4x_serial_pci_properties
;
240 set_bit(DEVICE_CATEGORY_INPUT
, dc
->categories
);
243 static const TypeInfo serial_pci_info
= {
244 .name
= "pci-serial",
245 .parent
= TYPE_PCI_DEVICE
,
246 .instance_size
= sizeof(PCISerialState
),
247 .class_init
= serial_pci_class_initfn
,
250 static const TypeInfo multi_2x_serial_pci_info
= {
251 .name
= "pci-serial-2x",
252 .parent
= TYPE_PCI_DEVICE
,
253 .instance_size
= sizeof(PCIMultiSerialState
),
254 .class_init
= multi_2x_serial_pci_class_initfn
,
257 static const TypeInfo multi_4x_serial_pci_info
= {
258 .name
= "pci-serial-4x",
259 .parent
= TYPE_PCI_DEVICE
,
260 .instance_size
= sizeof(PCIMultiSerialState
),
261 .class_init
= multi_4x_serial_pci_class_initfn
,
264 static void serial_pci_register_types(void)
266 type_register_static(&serial_pci_info
);
267 type_register_static(&multi_2x_serial_pci_info
);
268 type_register_static(&multi_4x_serial_pci_info
);
271 type_init(serial_pci_register_types
)