hw/ppc/spapr_caps.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition capabilities handling
   3  *
   4  * Copyright (c) 2017 David Gibson, Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qemu/error-report.h"
  27 #include "qapi/error.h"
  28 #include "qapi/visitor.h"
  29 #include "sysemu/hw_accel.h"
  30 #include "exec/ram_addr.h"
  31 #include "target/ppc/cpu.h"
  32 #include "target/ppc/mmu-hash64.h"
  33 #include "cpu-models.h"
  34 #include "kvm_ppc.h"
  35 #include "migration/vmstate.h"
  36 #include "sysemu/tcg.h"
  37
  38 #include "hw/ppc/spapr.h"
  39
  40 typedef struct SpaprCapPossible {
  41     int num;            /* size of vals array below */
  42     const char *help;   /* help text for vals */
  43     /*
  44      * Note:
  45      * - because of the way compatibility is determined vals MUST be ordered
  46      *   such that later options are a superset of all preceding options.
  47      * - the order of vals must be preserved, that is their index is important,
  48      *   however vals may be added to the end of the list so long as the above
  49      *   point is observed
  50      */
  51     const char *vals[];
  52 } SpaprCapPossible;
  53
  54 typedef struct SpaprCapabilityInfo {
  55     const char *name;
  56     const char *description;
  57     int index;
  58
  59     /* Getter and Setter Function Pointers */
  60     ObjectPropertyAccessor *get;
  61     ObjectPropertyAccessor *set;
  62     const char *type;
  63     /* Possible values if this is a custom string type */
  64     SpaprCapPossible *possible;
  65     /* Make sure the virtual hardware can support this capability */
  66     void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp);
  67     void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu,
  68                       uint8_t val, Error **errp);
  69     bool (*migrate_needed)(void *opaque);
  70 } SpaprCapabilityInfo;
  71
  72 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name,
  73                                void *opaque, Error **errp)
  74 {
  75     SpaprCapabilityInfo *cap = opaque;
  76     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
  77     bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON;
  78
  79     visit_type_bool(v, name, &value, errp);
  80 }
  81
  82 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name,
  83                                void *opaque, Error **errp)
  84 {
  85     SpaprCapabilityInfo *cap = opaque;
  86     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
  87     bool value;
  88
  89     if (!visit_type_bool(v, name, &value, errp)) {
  90         return;
  91     }
  92
  93     spapr->cmd_line_caps[cap->index] = true;
  94     spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF;
  95 }
  96
  97
  98 static void  spapr_cap_get_string(Object *obj, Visitor *v, const char *name,
  99                                   void *opaque, Error **errp)
 100 {
 101     SpaprCapabilityInfo *cap = opaque;
 102     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 103     char *val = NULL;
 104     uint8_t value = spapr_get_cap(spapr, cap->index);
 105
 106     if (value >= cap->possible->num) {
 107         error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name);
 108         return;
 109     }
 110
 111     val = g_strdup(cap->possible->vals[value]);
 112
 113     visit_type_str(v, name, &val, errp);
 114     g_free(val);
 115 }
 116
 117 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name,
 118                                  void *opaque, Error **errp)
 119 {
 120     SpaprCapabilityInfo *cap = opaque;
 121     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 122     uint8_t i;
 123     char *val;
 124
 125     if (!visit_type_str(v, name, &val, errp)) {
 126         return;
 127     }
 128
 129     if (!strcmp(val, "?")) {
 130         error_setg(errp, "%s", cap->possible->help);
 131         goto out;
 132     }
 133     for (i = 0; i < cap->possible->num; i++) {
 134         if (!strcasecmp(val, cap->possible->vals[i])) {
 135             spapr->cmd_line_caps[cap->index] = true;
 136             spapr->eff.caps[cap->index] = i;
 137             goto out;
 138         }
 139     }
 140
 141     error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val,
 142                cap->name);
 143 out:
 144     g_free(val);
 145 }
 146
 147 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name,
 148                                    void *opaque, Error **errp)
 149 {
 150     SpaprCapabilityInfo *cap = opaque;
 151     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 152     uint8_t val = spapr_get_cap(spapr, cap->index);
 153     uint64_t pagesize = (1ULL << val);
 154
 155     visit_type_size(v, name, &pagesize, errp);
 156 }
 157
 158 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name,
 159                                    void *opaque, Error **errp)
 160 {
 161     SpaprCapabilityInfo *cap = opaque;
 162     SpaprMachineState *spapr = SPAPR_MACHINE(obj);
 163     uint64_t pagesize;
 164     uint8_t val;
 165
 166     if (!visit_type_size(v, name, &pagesize, errp)) {
 167         return;
 168     }
 169
 170     if (!is_power_of_2(pagesize)) {
 171         error_setg(errp, "cap-%s must be a power of 2", cap->name);
 172         return;
 173     }
 174
 175     val = ctz64(pagesize);
 176     spapr->cmd_line_caps[cap->index] = true;
 177     spapr->eff.caps[cap->index] = val;
 178 }
 179
 180 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
 181 {
 182     ERRP_GUARD();
 183     if (!val) {
 184         /* TODO: We don't support disabling htm yet */
 185         return;
 186     }
 187     if (tcg_enabled()) {
 188         error_setg(errp, "No Transactional Memory support in TCG");
 189         error_append_hint(errp, "Try appending -machine cap-htm=off\n");
 190     } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
 191         error_setg(errp,
 192                    "KVM implementation does not support Transactional Memory");
 193         error_append_hint(errp, "Try appending -machine cap-htm=off\n");
 194     }
 195 }
 196
 197 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
 198 {
 199     ERRP_GUARD();
 200     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 201     CPUPPCState *env = &cpu->env;
 202
 203     if (!val) {
 204         /* TODO: We don't support disabling vsx yet */
 205         return;
 206     }
 207     /* Allowable CPUs in spapr_cpu_core.c should already have gotten
 208      * rid of anything that doesn't do VMX */
 209     g_assert(env->insns_flags & PPC_ALTIVEC);
 210     if (!(env->insns_flags2 & PPC2_VSX)) {
 211         error_setg(errp, "VSX support not available");
 212         error_append_hint(errp, "Try appending -machine cap-vsx=off\n");
 213     }
 214 }
 215
 216 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
 217 {
 218     ERRP_GUARD();
 219     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 220     CPUPPCState *env = &cpu->env;
 221
 222     if (!val) {
 223         /* TODO: We don't support disabling dfp yet */
 224         return;
 225     }
 226     if (!(env->insns_flags2 & PPC2_DFP)) {
 227         error_setg(errp, "DFP support not available");
 228         error_append_hint(errp, "Try appending -machine cap-dfp=off\n");
 229     }
 230 }
 231
 232 SpaprCapPossible cap_cfpc_possible = {
 233     .num = 3,
 234     .vals = {"broken", "workaround", "fixed"},
 235     .help = "broken - no protection, workaround - workaround available,"
 236             " fixed - fixed in hardware",
 237 };
 238
 239 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val,
 240                                  Error **errp)
 241 {
 242     ERRP_GUARD();
 243     uint8_t kvm_val =  kvmppc_get_cap_safe_cache();
 244
 245     if (tcg_enabled() && val) {
 246         /* TCG only supports broken, allow other values and print a warning */
 247         warn_report("TCG doesn't support requested feature, cap-cfpc=%s",
 248                     cap_cfpc_possible.vals[val]);
 249     } else if (kvm_enabled() && (val > kvm_val)) {
 250         error_setg(errp,
 251                    "Requested safe cache capability level not supported by KVM");
 252         error_append_hint(errp, "Try appending -machine cap-cfpc=%s\n",
 253                           cap_cfpc_possible.vals[kvm_val]);
 254     }
 255 }
 256
 257 SpaprCapPossible cap_sbbc_possible = {
 258     .num = 3,
 259     .vals = {"broken", "workaround", "fixed"},
 260     .help = "broken - no protection, workaround - workaround available,"
 261             " fixed - fixed in hardware",
 262 };
 263
 264 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val,
 265                                         Error **errp)
 266 {
 267     ERRP_GUARD();
 268     uint8_t kvm_val =  kvmppc_get_cap_safe_bounds_check();
 269
 270     if (tcg_enabled() && val) {
 271         /* TCG only supports broken, allow other values and print a warning */
 272         warn_report("TCG doesn't support requested feature, cap-sbbc=%s",
 273                     cap_sbbc_possible.vals[val]);
 274     } else if (kvm_enabled() && (val > kvm_val)) {
 275         error_setg(errp,
 276 "Requested safe bounds check capability level not supported by KVM");
 277         error_append_hint(errp, "Try appending -machine cap-sbbc=%s\n",
 278                           cap_sbbc_possible.vals[kvm_val]);
 279     }
 280 }
 281
 282 SpaprCapPossible cap_ibs_possible = {
 283     .num = 5,
 284     /* Note workaround only maintained for compatibility */
 285     .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
 286     .help = "broken - no protection, workaround - count cache flush"
 287             ", fixed-ibs - indirect branch serialisation,"
 288             " fixed-ccd - cache count disabled,"
 289             " fixed-na - fixed in hardware (no longer applicable)",
 290 };
 291
 292 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
 293                                            uint8_t val, Error **errp)
 294 {
 295     ERRP_GUARD();
 296     uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
 297
 298     if (tcg_enabled() && val) {
 299         /* TCG only supports broken, allow other values and print a warning */
 300         warn_report("TCG doesn't support requested feature, cap-ibs=%s",
 301                     cap_ibs_possible.vals[val]);
 302     } else if (kvm_enabled() && (val > kvm_val)) {
 303         error_setg(errp,
 304 "Requested safe indirect branch capability level not supported by KVM");
 305         error_append_hint(errp, "Try appending -machine cap-ibs=%s\n",
 306                           cap_ibs_possible.vals[kvm_val]);
 307     }
 308 }
 309
 310 #define VALUE_DESC_TRISTATE     " (broken, workaround, fixed)"
 311
 312 bool spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
 313                           Error **errp)
 314 {
 315     hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]);
 316
 317     if (!kvmppc_hpt_needs_host_contiguous_pages()) {
 318         return true;
 319     }
 320
 321     if (maxpagesize > pagesize) {
 322         error_setg(errp,
 323                    "Can't support %"HWADDR_PRIu" kiB guest pages with %"
 324                    HWADDR_PRIu" kiB host pages with this KVM implementation",
 325                    maxpagesize >> 10, pagesize >> 10);
 326         return false;
 327     }
 328
 329     return true;
 330 }
 331
 332 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr,
 333                                       uint8_t val, Error **errp)
 334 {
 335     if (val < 12) {
 336         error_setg(errp, "Require at least 4kiB hpt-max-page-size");
 337         return;
 338     } else if (val < 16) {
 339         warn_report("Many guests require at least 64kiB hpt-max-page-size");
 340     }
 341
 342     spapr_check_pagesize(spapr, qemu_minrampagesize(), errp);
 343 }
 344
 345 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque)
 346 {
 347     return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration;
 348 }
 349
 350 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
 351                               uint32_t pshift)
 352 {
 353     unsigned maxshift = *((unsigned *)opaque);
 354
 355     assert(pshift >= seg_pshift);
 356
 357     /* Don't allow the guest to use pages bigger than the configured
 358      * maximum size */
 359     if (pshift > maxshift) {
 360         return false;
 361     }
 362
 363     /* For whatever reason, KVM doesn't allow multiple pagesizes
 364      * within a segment, *except* for the case of 16M pages in a 4k or
 365      * 64k segment.  Always exclude other cases, so that TCG and KVM
 366      * guests see a consistent environment */
 367     if ((pshift != seg_pshift) && (pshift != 24)) {
 368         return false;
 369     }
 370
 371     return true;
 372 }
 373
 374 static void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu,
 375                                  bool (*cb)(void *, uint32_t, uint32_t),
 376                                  void *opaque)
 377 {
 378     PPCHash64Options *opts = cpu->hash64_opts;
 379     int i;
 380     int n = 0;
 381     bool ci_largepage = false;
 382
 383     assert(opts);
 384
 385     n = 0;
 386     for (i = 0; i < ARRAY_SIZE(opts->sps); i++) {
 387         PPCHash64SegmentPageSizes *sps = &opts->sps[i];
 388         int j;
 389         int m = 0;
 390
 391         assert(n <= i);
 392
 393         if (!sps->page_shift) {
 394             break;
 395         }
 396
 397         for (j = 0; j < ARRAY_SIZE(sps->enc); j++) {
 398             PPCHash64PageSize *ps = &sps->enc[j];
 399
 400             assert(m <= j);
 401             if (!ps->page_shift) {
 402                 break;
 403             }
 404
 405             if (cb(opaque, sps->page_shift, ps->page_shift)) {
 406                 if (ps->page_shift >= 16) {
 407                     ci_largepage = true;
 408                 }
 409                 sps->enc[m++] = *ps;
 410             }
 411         }
 412
 413         /* Clear rest of the row */
 414         for (j = m; j < ARRAY_SIZE(sps->enc); j++) {
 415             memset(&sps->enc[j], 0, sizeof(sps->enc[j]));
 416         }
 417
 418         if (m) {
 419             n++;
 420         }
 421     }
 422
 423     /* Clear the rest of the table */
 424     for (i = n; i < ARRAY_SIZE(opts->sps); i++) {
 425         memset(&opts->sps[i], 0, sizeof(opts->sps[i]));
 426     }
 427
 428     if (!ci_largepage) {
 429         opts->flags &= ~PPC_HASH64_CI_LARGEPAGE;
 430     }
 431 }
 432
 433 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr,
 434                                           PowerPCCPU *cpu,
 435                                           uint8_t val, Error **errp)
 436 {
 437     unsigned maxshift = val;
 438
 439     ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
 440 }
 441
 442 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr,
 443                                     uint8_t val, Error **errp)
 444 {
 445     ERRP_GUARD();
 446     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 447
 448     if (!val) {
 449         /* capability disabled by default */
 450         return;
 451     }
 452
 453     if (tcg_enabled()) {
 454         error_setg(errp, "No Nested KVM-HV support in TCG");
 455         error_append_hint(errp, "Try appending -machine cap-nested-hv=off\n");
 456     } else if (kvm_enabled()) {
 457         if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
 458                               spapr->max_compat_pvr)) {
 459             error_setg(errp, "Nested KVM-HV only supported on POWER9");
 460             error_append_hint(errp,
 461                               "Try appending -machine max-cpu-compat=power9\n");
 462             return;
 463         }
 464
 465         if (!kvmppc_has_cap_nested_kvm_hv()) {
 466             error_setg(errp,
 467                        "KVM implementation does not support Nested KVM-HV");
 468             error_append_hint(errp,
 469                               "Try appending -machine cap-nested-hv=off\n");
 470         } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
 471                 error_setg(errp, "Error enabling cap-nested-hv with KVM");
 472                 error_append_hint(errp,
 473                                   "Try appending -machine cap-nested-hv=off\n");
 474         }
 475     }
 476 }
 477
 478 static void cap_large_decr_apply(SpaprMachineState *spapr,
 479                                  uint8_t val, Error **errp)
 480 {
 481     ERRP_GUARD();
 482     PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 483     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
 484
 485     if (!val) {
 486         return; /* Disabled by default */
 487     }
 488
 489     if (tcg_enabled()) {
 490         if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
 491                               spapr->max_compat_pvr)) {
 492             error_setg(errp, "Large decrementer only supported on POWER9");
 493             error_append_hint(errp, "Try -cpu POWER9\n");
 494             return;
 495         }
 496     } else if (kvm_enabled()) {
 497         int kvm_nr_bits = kvmppc_get_cap_large_decr();
 498
 499         if (!kvm_nr_bits) {
 500             error_setg(errp, "No large decrementer support");
 501             error_append_hint(errp,
 502                               "Try appending -machine cap-large-decr=off\n");
 503         } else if (pcc->lrg_decr_bits != kvm_nr_bits) {
 504             error_setg(errp,
 505                        "KVM large decrementer size (%d) differs to model (%d)",
 506                        kvm_nr_bits, pcc->lrg_decr_bits);
 507             error_append_hint(errp,
 508                               "Try appending -machine cap-large-decr=off\n");
 509         }
 510     }
 511 }
 512
 513 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr,
 514                                      PowerPCCPU *cpu,
 515                                      uint8_t val, Error **errp)
 516 {
 517     ERRP_GUARD();
 518     CPUPPCState *env = &cpu->env;
 519     target_ulong lpcr = env->spr[SPR_LPCR];
 520
 521     if (kvm_enabled()) {
 522         if (kvmppc_enable_cap_large_decr(cpu, val)) {
 523             error_setg(errp, "No large decrementer support");
 524             error_append_hint(errp,
 525                               "Try appending -machine cap-large-decr=off\n");
 526         }
 527     }
 528
 529     if (val) {
 530         lpcr |= LPCR_LD;
 531     } else {
 532         lpcr &= ~LPCR_LD;
 533     }
 534     ppc_store_lpcr(cpu, lpcr);
 535 }
 536
 537 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
 538                                  Error **errp)
 539 {
 540     ERRP_GUARD();
 541     uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
 542
 543     if (tcg_enabled() && val) {
 544         /* TCG doesn't implement anything here, but allow with a warning */
 545         warn_report("TCG doesn't support requested feature, cap-ccf-assist=on");
 546     } else if (kvm_enabled() && (val > kvm_val)) {
 547         uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch();
 548
 549         if (kvm_ibs == SPAPR_CAP_FIXED_CCD) {
 550             /*
 551              * If we don't have CCF assist on the host, the assist
 552              * instruction is a harmless no-op.  It won't correctly
 553              * implement the cache count flush *but* if we have
 554              * count-cache-disabled in the host, that flush is
 555              * unnnecessary.  So, specifically allow this case.  This
 556              * allows us to have better performance on POWER9 DD2.3,
 557              * while still working on POWER9 DD2.2 and POWER8 host
 558              * cpus.
 559              */
 560             return;
 561         }
 562         error_setg(errp,
 563                    "Requested count cache flush assist capability level not supported by KVM");
 564         error_append_hint(errp, "Try appending -machine cap-ccf-assist=off\n");
 565     }
 566 }
 567
 568 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val,
 569                                 Error **errp)
 570 {
 571     ERRP_GUARD();
 572     if (!val) {
 573         return; /* Disabled by default */
 574     }
 575
 576     if (kvm_enabled()) {
 577         if (!kvmppc_get_fwnmi()) {
 578             error_setg(errp,
 579 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM.");
 580             error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n");
 581         }
 582     }
 583 }
 584
 585 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
 586     [SPAPR_CAP_HTM] = {
 587         .name = "htm",
 588         .description = "Allow Hardware Transactional Memory (HTM)",
 589         .index = SPAPR_CAP_HTM,
 590         .get = spapr_cap_get_bool,
 591         .set = spapr_cap_set_bool,
 592         .type = "bool",
 593         .apply = cap_htm_apply,
 594     },
 595     [SPAPR_CAP_VSX] = {
 596         .name = "vsx",
 597         .description = "Allow Vector Scalar Extensions (VSX)",
 598         .index = SPAPR_CAP_VSX,
 599         .get = spapr_cap_get_bool,
 600         .set = spapr_cap_set_bool,
 601         .type = "bool",
 602         .apply = cap_vsx_apply,
 603     },
 604     [SPAPR_CAP_DFP] = {
 605         .name = "dfp",
 606         .description = "Allow Decimal Floating Point (DFP)",
 607         .index = SPAPR_CAP_DFP,
 608         .get = spapr_cap_get_bool,
 609         .set = spapr_cap_set_bool,
 610         .type = "bool",
 611         .apply = cap_dfp_apply,
 612     },
 613     [SPAPR_CAP_CFPC] = {
 614         .name = "cfpc",
 615         .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE,
 616         .index = SPAPR_CAP_CFPC,
 617         .get = spapr_cap_get_string,
 618         .set = spapr_cap_set_string,
 619         .type = "string",
 620         .possible = &cap_cfpc_possible,
 621         .apply = cap_safe_cache_apply,
 622     },
 623     [SPAPR_CAP_SBBC] = {
 624         .name = "sbbc",
 625         .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE,
 626         .index = SPAPR_CAP_SBBC,
 627         .get = spapr_cap_get_string,
 628         .set = spapr_cap_set_string,
 629         .type = "string",
 630         .possible = &cap_sbbc_possible,
 631         .apply = cap_safe_bounds_check_apply,
 632     },
 633     [SPAPR_CAP_IBS] = {
 634         .name = "ibs",
 635         .description =
 636             "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
 637             "fixed-ccd, fixed-na)",
 638         .index = SPAPR_CAP_IBS,
 639         .get = spapr_cap_get_string,
 640         .set = spapr_cap_set_string,
 641         .type = "string",
 642         .possible = &cap_ibs_possible,
 643         .apply = cap_safe_indirect_branch_apply,
 644     },
 645     [SPAPR_CAP_HPT_MAXPAGESIZE] = {
 646         .name = "hpt-max-page-size",
 647         .description = "Maximum page size for Hash Page Table guests",
 648         .index = SPAPR_CAP_HPT_MAXPAGESIZE,
 649         .get = spapr_cap_get_pagesize,
 650         .set = spapr_cap_set_pagesize,
 651         .type = "int",
 652         .apply = cap_hpt_maxpagesize_apply,
 653         .cpu_apply = cap_hpt_maxpagesize_cpu_apply,
 654         .migrate_needed = cap_hpt_maxpagesize_migrate_needed,
 655     },
 656     [SPAPR_CAP_NESTED_KVM_HV] = {
 657         .name = "nested-hv",
 658         .description = "Allow Nested KVM-HV",
 659         .index = SPAPR_CAP_NESTED_KVM_HV,
 660         .get = spapr_cap_get_bool,
 661         .set = spapr_cap_set_bool,
 662         .type = "bool",
 663         .apply = cap_nested_kvm_hv_apply,
 664     },
 665     [SPAPR_CAP_LARGE_DECREMENTER] = {
 666         .name = "large-decr",
 667         .description = "Allow Large Decrementer",
 668         .index = SPAPR_CAP_LARGE_DECREMENTER,
 669         .get = spapr_cap_get_bool,
 670         .set = spapr_cap_set_bool,
 671         .type = "bool",
 672         .apply = cap_large_decr_apply,
 673         .cpu_apply = cap_large_decr_cpu_apply,
 674     },
 675     [SPAPR_CAP_CCF_ASSIST] = {
 676         .name = "ccf-assist",
 677         .description = "Count Cache Flush Assist via HW Instruction",
 678         .index = SPAPR_CAP_CCF_ASSIST,
 679         .get = spapr_cap_get_bool,
 680         .set = spapr_cap_set_bool,
 681         .type = "bool",
 682         .apply = cap_ccf_assist_apply,
 683     },
 684     [SPAPR_CAP_FWNMI] = {
 685         .name = "fwnmi",
 686         .description = "Implements PAPR FWNMI option",
 687         .index = SPAPR_CAP_FWNMI,
 688         .get = spapr_cap_get_bool,
 689         .set = spapr_cap_set_bool,
 690         .type = "bool",
 691         .apply = cap_fwnmi_apply,
 692     },
 693 };
 694
 695 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr,
 696                                                const char *cputype)
 697 {
 698     SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
 699     SpaprCapabilities caps;
 700
 701     caps = smc->default_caps;
 702
 703     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00,
 704                                0, spapr->max_compat_pvr)) {
 705         caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF;
 706     }
 707
 708     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
 709                                0, spapr->max_compat_pvr)) {
 710         caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
 711         caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
 712     }
 713
 714     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
 715                                0, spapr->max_compat_pvr)) {
 716         caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
 717     }
 718
 719     if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
 720                                0, spapr->max_compat_pvr)) {
 721         caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
 722         caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
 723         caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
 724     }
 725
 726     /* This is for pseries-2.12 and older */
 727     if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) {
 728         uint8_t mps;
 729
 730         if (kvmppc_hpt_needs_host_contiguous_pages()) {
 731             mps = ctz64(qemu_minrampagesize());
 732         } else {
 733             mps = 34; /* allow everything up to 16GiB, i.e. everything */
 734         }
 735
 736         caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps;
 737     }
 738
 739     return caps;
 740 }
 741
 742 int spapr_caps_pre_load(void *opaque)
 743 {
 744     SpaprMachineState *spapr = opaque;
 745
 746     /* Set to default so we can tell if this came in with the migration */
 747     spapr->mig = spapr->def;
 748     return 0;
 749 }
 750
 751 int spapr_caps_pre_save(void *opaque)
 752 {
 753     SpaprMachineState *spapr = opaque;
 754
 755     spapr->mig = spapr->eff;
 756     return 0;
 757 }
 758
 759 /* This has to be called from the top-level spapr post_load, not the
 760  * caps specific one.  Otherwise it wouldn't be called when the source
 761  * caps are all defaults, which could still conflict with overridden
 762  * caps on the destination */
 763 int spapr_caps_post_migration(SpaprMachineState *spapr)
 764 {
 765     int i;
 766     bool ok = true;
 767     SpaprCapabilities dstcaps = spapr->eff;
 768     SpaprCapabilities srccaps;
 769
 770     srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
 771     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 772         /* If not default value then assume came in with the migration */
 773         if (spapr->mig.caps[i] != spapr->def.caps[i]) {
 774             srccaps.caps[i] = spapr->mig.caps[i];
 775         }
 776     }
 777
 778     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 779         SpaprCapabilityInfo *info = &capability_table[i];
 780
 781         if (srccaps.caps[i] > dstcaps.caps[i]) {
 782             error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
 783                          info->name, srccaps.caps[i], dstcaps.caps[i]);
 784             ok = false;
 785         }
 786
 787         if (srccaps.caps[i] < dstcaps.caps[i]) {
 788             warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
 789                          info->name, srccaps.caps[i], dstcaps.caps[i]);
 790         }
 791     }
 792
 793     return ok ? 0 : -EINVAL;
 794 }
 795
 796 /* Used to generate the migration field and needed function for a spapr cap */
 797 #define SPAPR_CAP_MIG_STATE(sname, cap)                 \
 798 static bool spapr_cap_##sname##_needed(void *opaque)    \
 799 {                                                       \
 800     SpaprMachineState *spapr = opaque;                  \
 801     bool (*needed)(void *opaque) =                      \
 802         capability_table[cap].migrate_needed;           \
 803                                                         \
 804     return needed ? needed(opaque) : true &&            \
 805            spapr->cmd_line_caps[cap] &&                 \
 806            (spapr->eff.caps[cap] !=                     \
 807             spapr->def.caps[cap]);                      \
 808 }                                                       \
 809                                                         \
 810 const VMStateDescription vmstate_spapr_cap_##sname = {  \
 811     .name = "spapr/cap/" #sname,                        \
 812     .version_id = 1,                                    \
 813     .minimum_version_id = 1,                            \
 814     .needed = spapr_cap_##sname##_needed,               \
 815     .fields = (VMStateField[]) {                        \
 816         VMSTATE_UINT8(mig.caps[cap],                    \
 817                       SpaprMachineState),               \
 818         VMSTATE_END_OF_LIST()                           \
 819     },                                                  \
 820 }
 821
 822 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM);
 823 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX);
 824 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP);
 825 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC);
 826 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
 827 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
 828 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE);
 829 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV);
 830 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER);
 831 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST);
 832 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI);
 833
 834 void spapr_caps_init(SpaprMachineState *spapr)
 835 {
 836     SpaprCapabilities default_caps;
 837     int i;
 838
 839     /* Compute the actual set of caps we should run with */
 840     default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
 841
 842     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 843         /* Store the defaults */
 844         spapr->def.caps[i] = default_caps.caps[i];
 845         /* If not set on the command line then apply the default value */
 846         if (!spapr->cmd_line_caps[i]) {
 847             spapr->eff.caps[i] = default_caps.caps[i];
 848         }
 849     }
 850 }
 851
 852 void spapr_caps_apply(SpaprMachineState *spapr)
 853 {
 854     int i;
 855
 856     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 857         SpaprCapabilityInfo *info = &capability_table[i];
 858
 859         /*
 860          * If the apply function can't set the desired level and thinks it's
 861          * fatal, it should cause that.
 862          */
 863         info->apply(spapr, spapr->eff.caps[i], &error_fatal);
 864     }
 865 }
 866
 867 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu)
 868 {
 869     int i;
 870
 871     for (i = 0; i < SPAPR_CAP_NUM; i++) {
 872         SpaprCapabilityInfo *info = &capability_table[i];
 873
 874         /*
 875          * If the apply function can't set the desired level and thinks it's
 876          * fatal, it should cause that.
 877          */
 878         if (info->cpu_apply) {
 879             info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal);
 880         }
 881     }
 882 }
 883
 884 void spapr_caps_add_properties(SpaprMachineClass *smc)
 885 {
 886     ObjectClass *klass = OBJECT_CLASS(smc);
 887     int i;
 888
 889     for (i = 0; i < ARRAY_SIZE(capability_table); i++) {
 890         SpaprCapabilityInfo *cap = &capability_table[i];
 891         char *name = g_strdup_printf("cap-%s", cap->name);
 892         char *desc;
 893
 894         object_class_property_add(klass, name, cap->type,
 895                                   cap->get, cap->set,
 896                                   NULL, cap);
 897
 898         desc = g_strdup_printf("%s", cap->description);
 899         object_class_property_set_description(klass, name, desc);
 900         g_free(name);
 901         g_free(desc);
 902     }
 903 }