4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
25 #include "hw/qdev-core.h"
26 #include "disas/bfd.h"
27 #include "exec/hwaddr.h"
28 #include "exec/memattrs.h"
29 #include "qemu/queue.h"
30 #include "qemu/thread.h"
31 #include "qemu/typedefs.h"
33 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
38 * Type wide enough to contain any #target_ulong virtual address.
40 typedef uint64_t vaddr
;
41 #define VADDR_PRId PRId64
42 #define VADDR_PRIu PRIu64
43 #define VADDR_PRIo PRIo64
44 #define VADDR_PRIx PRIx64
45 #define VADDR_PRIX PRIX64
46 #define VADDR_MAX UINT64_MAX
50 * @section_id: QEMU-cpu
52 * @short_description: Base class for all CPUs
55 #define TYPE_CPU "cpu"
57 /* Since this macro is used a lot in hot code paths and in conjunction with
58 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
61 #define CPU(obj) ((CPUState *)(obj))
63 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
64 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
66 typedef struct CPUState CPUState
;
68 typedef void (*CPUUnassignedAccess
)(CPUState
*cpu
, hwaddr addr
,
69 bool is_write
, bool is_exec
, int opaque
,
72 struct TranslationBlock
;
76 * @class_by_name: Callback to map -cpu command line model name to an
77 * instantiatable CPU type.
78 * @parse_features: Callback to parse command line arguments.
79 * @reset: Callback to reset the #CPUState to its initial state.
80 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
81 * @has_work: Callback for checking if there is work to do.
82 * @do_interrupt: Callback for interrupt handling.
83 * @do_unassigned_access: Callback for unassigned access handling.
84 * @do_unaligned_access: Callback for unaligned access handling, if
85 * the target defines #ALIGNED_ONLY.
86 * @virtio_is_big_endian: Callback to return %true if a CPU which supports
87 * runtime configurable endianness is currently big-endian. Non-configurable
88 * CPUs can use the default implementation of this method. This method should
89 * not be used by any callers other than the pre-1.0 virtio devices.
90 * @memory_rw_debug: Callback for GDB memory access.
91 * @dump_state: Callback for dumping state.
92 * @dump_statistics: Callback for dumping statistics.
93 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
94 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
95 * @get_memory_mapping: Callback for obtaining the memory mappings.
96 * @set_pc: Callback for setting the Program Counter register.
97 * @synchronize_from_tb: Callback for synchronizing state from a TCG
99 * @handle_mmu_fault: Callback for handling an MMU fault.
100 * @get_phys_page_debug: Callback for obtaining a physical address.
101 * @gdb_read_register: Callback for letting GDB read a register.
102 * @gdb_write_register: Callback for letting GDB write a register.
103 * @debug_excp_handler: Callback for handling debug exceptions.
104 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
105 * 64-bit VM coredump.
106 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
107 * note to a 32-bit VM coredump.
108 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
109 * 32-bit VM coredump.
110 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
111 * note to a 32-bit VM coredump.
112 * @vmsd: State description for migration.
113 * @gdb_num_core_regs: Number of core registers accessible to GDB.
114 * @gdb_core_xml_file: File name for core registers GDB XML description.
115 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
116 * before the insn which triggers a watchpoint rather than after it.
117 * @cpu_exec_enter: Callback for cpu_exec preparation.
118 * @cpu_exec_exit: Callback for cpu_exec cleanup.
119 * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
120 * @disas_set_info: Setup architecture specific components of disassembly info
122 * Represents a CPU family or model.
124 typedef struct CPUClass
{
126 DeviceClass parent_class
;
129 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
130 void (*parse_features
)(CPUState
*cpu
, char *str
, Error
**errp
);
132 void (*reset
)(CPUState
*cpu
);
133 int reset_dump_flags
;
134 bool (*has_work
)(CPUState
*cpu
);
135 void (*do_interrupt
)(CPUState
*cpu
);
136 CPUUnassignedAccess do_unassigned_access
;
137 void (*do_unaligned_access
)(CPUState
*cpu
, vaddr addr
,
138 int is_write
, int is_user
, uintptr_t retaddr
);
139 bool (*virtio_is_big_endian
)(CPUState
*cpu
);
140 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
141 uint8_t *buf
, int len
, bool is_write
);
142 void (*dump_state
)(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
144 void (*dump_statistics
)(CPUState
*cpu
, FILE *f
,
145 fprintf_function cpu_fprintf
, int flags
);
146 int64_t (*get_arch_id
)(CPUState
*cpu
);
147 bool (*get_paging_enabled
)(const CPUState
*cpu
);
148 void (*get_memory_mapping
)(CPUState
*cpu
, MemoryMappingList
*list
,
150 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
151 void (*synchronize_from_tb
)(CPUState
*cpu
, struct TranslationBlock
*tb
);
152 int (*handle_mmu_fault
)(CPUState
*cpu
, vaddr address
, int rw
,
154 hwaddr (*get_phys_page_debug
)(CPUState
*cpu
, vaddr addr
);
155 int (*gdb_read_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
156 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
157 void (*debug_excp_handler
)(CPUState
*cpu
);
159 int (*write_elf64_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
160 int cpuid
, void *opaque
);
161 int (*write_elf64_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
163 int (*write_elf32_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
164 int cpuid
, void *opaque
);
165 int (*write_elf32_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
168 const struct VMStateDescription
*vmsd
;
169 int gdb_num_core_regs
;
170 const char *gdb_core_xml_file
;
171 bool gdb_stop_before_watchpoint
;
173 void (*cpu_exec_enter
)(CPUState
*cpu
);
174 void (*cpu_exec_exit
)(CPUState
*cpu
);
175 bool (*cpu_exec_interrupt
)(CPUState
*cpu
, int interrupt_request
);
177 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
180 #ifdef HOST_WORDS_BIGENDIAN
181 typedef struct icount_decr_u16
{
186 typedef struct icount_decr_u16
{
192 typedef struct CPUBreakpoint
{
194 int flags
; /* BP_* */
195 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
198 typedef struct CPUWatchpoint
{
203 int flags
; /* BP_* */
204 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
210 #define TB_JMP_CACHE_BITS 12
211 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
215 * @cpu_index: CPU index (informative).
216 * @nr_cores: Number of cores within this CPU package.
217 * @nr_threads: Number of threads within this CPU.
218 * @numa_node: NUMA node this CPU is belonging to.
219 * @host_tid: Host thread ID.
220 * @running: #true if CPU is currently running (usermode).
221 * @created: Indicates whether the CPU thread has been successfully created.
222 * @interrupt_request: Indicates a pending interrupt request.
223 * @halted: Nonzero if the CPU is in suspended state.
224 * @stop: Indicates a pending stop request.
225 * @stopped: Indicates the CPU has been artificially stopped.
226 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
227 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
228 * CPU and return to its top level loop.
229 * @singlestep_enabled: Flags for single-stepping.
230 * @icount_extra: Instructions until next timer event.
231 * @icount_decr: Number of cycles left, with interrupt flag in high bit.
232 * This allows a single read-compare-cbranch-write sequence to test
233 * for both decrementer underflow and exceptions.
234 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
235 * requires that IO only be performed on the last instruction of a TB
236 * so that interrupts take effect immediately.
237 * @env_ptr: Pointer to subclass-specific CPUArchState field.
238 * @current_tb: Currently executing TB.
239 * @gdb_regs: Additional GDB registers.
240 * @gdb_num_regs: Number of total registers accessible to GDB.
241 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
242 * @next_cpu: Next CPU sharing TB cache.
243 * @opaque: User data.
244 * @mem_io_pc: Host Program Counter at which the memory was accessed.
245 * @mem_io_vaddr: Target virtual address at which the memory was accessed.
246 * @kvm_fd: vCPU file descriptor for KVM.
247 * @work_mutex: Lock to prevent multiple access to queued_work_*.
248 * @queued_work_first: First asynchronous work pending.
250 * State of one CPU core or thread.
254 DeviceState parent_obj
;
261 struct QemuThread
*thread
;
268 struct QemuCond
*halt_cond
;
275 uint32_t interrupt_request
;
276 int singlestep_enabled
;
277 int64_t icount_extra
;
280 QemuMutex work_mutex
;
281 struct qemu_work_item
*queued_work_first
, *queued_work_last
;
284 struct AddressSpaceDispatch
*memory_dispatch
;
285 MemoryListener
*tcg_as_listener
;
287 void *env_ptr
; /* CPUArchState */
288 struct TranslationBlock
*current_tb
;
289 struct TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
290 struct GDBRegisterState
*gdb_regs
;
293 QTAILQ_ENTRY(CPUState
) node
;
295 /* ice debug support */
296 QTAILQ_HEAD(breakpoints_head
, CPUBreakpoint
) breakpoints
;
298 QTAILQ_HEAD(watchpoints_head
, CPUWatchpoint
) watchpoints
;
299 CPUWatchpoint
*watchpoint_hit
;
303 /* In order to avoid passing too many arguments to the MMIO helpers,
304 * we store some rarely used information in the CPU context.
311 struct KVMState
*kvm_state
;
312 struct kvm_run
*kvm_run
;
314 /* TODO Move common fields from CPUArchState here. */
315 int cpu_index
; /* used by alpha TCG */
316 uint32_t halted
; /* used by alpha, cris, ppc TCG */
322 int32_t exception_index
; /* used by m68k TCG */
324 /* Note that this is accessed at the start of every TB via a negative
325 offset from AREG0. Leave this field at the end so as to make the
326 (absolute value) offset as small as possible. This reduces code
327 size, especially for hosts without large memory offsets. */
328 uint32_t tcg_exit_req
;
331 QTAILQ_HEAD(CPUTailQ
, CPUState
);
332 extern struct CPUTailQ cpus
;
333 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
334 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
335 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
336 QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
337 #define CPU_FOREACH_REVERSE(cpu) \
338 QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
339 #define first_cpu QTAILQ_FIRST(&cpus)
341 extern __thread CPUState
*current_cpu
;
344 * cpu_paging_enabled:
345 * @cpu: The CPU whose state is to be inspected.
347 * Returns: %true if paging is enabled, %false otherwise.
349 bool cpu_paging_enabled(const CPUState
*cpu
);
352 * cpu_get_memory_mapping:
353 * @cpu: The CPU whose memory mappings are to be obtained.
354 * @list: Where to write the memory mappings to.
355 * @errp: Pointer for reporting an #Error.
357 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
361 * cpu_write_elf64_note:
362 * @f: pointer to a function that writes memory to a file
363 * @cpu: The CPU whose memory is to be dumped
364 * @cpuid: ID number of the CPU
365 * @opaque: pointer to the CPUState struct
367 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
368 int cpuid
, void *opaque
);
371 * cpu_write_elf64_qemunote:
372 * @f: pointer to a function that writes memory to a file
373 * @cpu: The CPU whose memory is to be dumped
374 * @cpuid: ID number of the CPU
375 * @opaque: pointer to the CPUState struct
377 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
381 * cpu_write_elf32_note:
382 * @f: pointer to a function that writes memory to a file
383 * @cpu: The CPU whose memory is to be dumped
384 * @cpuid: ID number of the CPU
385 * @opaque: pointer to the CPUState struct
387 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
388 int cpuid
, void *opaque
);
391 * cpu_write_elf32_qemunote:
392 * @f: pointer to a function that writes memory to a file
393 * @cpu: The CPU whose memory is to be dumped
394 * @cpuid: ID number of the CPU
395 * @opaque: pointer to the CPUState struct
397 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
403 * @CPU_DUMP_FPU: dump FPU register state, not just integer
404 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
407 CPU_DUMP_CODE
= 0x00010000,
408 CPU_DUMP_FPU
= 0x00020000,
409 CPU_DUMP_CCOP
= 0x00040000,
414 * @cpu: The CPU whose state is to be dumped.
415 * @f: File to dump to.
416 * @cpu_fprintf: Function to dump with.
417 * @flags: Flags what to dump.
421 void cpu_dump_state(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
425 * cpu_dump_statistics:
426 * @cpu: The CPU whose state is to be dumped.
427 * @f: File to dump to.
428 * @cpu_fprintf: Function to dump with.
429 * @flags: Flags what to dump.
431 * Dumps CPU statistics.
433 void cpu_dump_statistics(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
436 #ifndef CONFIG_USER_ONLY
438 * cpu_get_phys_page_debug:
439 * @cpu: The CPU to obtain the physical page address for.
440 * @addr: The virtual address.
442 * Obtains the physical page corresponding to a virtual one.
443 * Use it only for debugging because no protection checks are done.
445 * Returns: Corresponding physical page address or -1 if no page found.
447 static inline hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
)
449 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
451 return cc
->get_phys_page_debug(cpu
, addr
);
457 * @cpu: The CPU whose state is to be reset.
459 void cpu_reset(CPUState
*cpu
);
463 * @typename: The CPU base type.
464 * @cpu_model: The model string without any parameters.
466 * Looks up a CPU #ObjectClass matching name @cpu_model.
468 * Returns: A #CPUClass or %NULL if not matching class is found.
470 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
474 * @typename: The CPU base type.
475 * @cpu_model: The model string including optional parameters.
477 * Instantiates a CPU, processes optional parameters and realizes the CPU.
479 * Returns: A #CPUState or %NULL if an error occurred.
481 CPUState
*cpu_generic_init(const char *typename
, const char *cpu_model
);
485 * @cpu: The vCPU to check.
487 * Checks whether the CPU has work to do.
489 * Returns: %true if the CPU has work, %false otherwise.
491 static inline bool cpu_has_work(CPUState
*cpu
)
493 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
495 g_assert(cc
->has_work
);
496 return cc
->has_work(cpu
);
501 * @cpu: The vCPU to check against.
503 * Checks whether the caller is executing on the vCPU thread.
505 * Returns: %true if called from @cpu's thread, %false otherwise.
507 bool qemu_cpu_is_self(CPUState
*cpu
);
511 * @cpu: The vCPU to kick.
513 * Kicks @cpu's thread.
515 void qemu_cpu_kick(CPUState
*cpu
);
519 * @cpu: The CPU to check.
521 * Checks whether the CPU is stopped.
523 * Returns: %true if run state is not running or if artificially stopped;
526 bool cpu_is_stopped(CPUState
*cpu
);
530 * @cpu: The vCPU to run on.
531 * @func: The function to be executed.
532 * @data: Data to pass to the function.
534 * Schedules the function @func for execution on the vCPU @cpu.
536 void run_on_cpu(CPUState
*cpu
, void (*func
)(void *data
), void *data
);
540 * @cpu: The vCPU to run on.
541 * @func: The function to be executed.
542 * @data: Data to pass to the function.
544 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
546 void async_run_on_cpu(CPUState
*cpu
, void (*func
)(void *data
), void *data
);
550 * @index: The CPUState@cpu_index value of the CPU to obtain.
552 * Gets a CPU matching @index.
554 * Returns: The CPU or %NULL if there is no matching CPU.
556 CPUState
*qemu_get_cpu(int index
);
560 * @id: Guest-exposed CPU ID to lookup.
562 * Search for CPU with specified ID.
564 * Returns: %true - CPU is found, %false - CPU isn't found.
566 bool cpu_exists(int64_t id
);
568 #ifndef CONFIG_USER_ONLY
570 typedef void (*CPUInterruptHandler
)(CPUState
*, int);
572 extern CPUInterruptHandler cpu_interrupt_handler
;
576 * @cpu: The CPU to set an interrupt on.
577 * @mask: The interupts to set.
579 * Invokes the interrupt handler.
581 static inline void cpu_interrupt(CPUState
*cpu
, int mask
)
583 cpu_interrupt_handler(cpu
, mask
);
586 #else /* USER_ONLY */
588 void cpu_interrupt(CPUState
*cpu
, int mask
);
590 #endif /* USER_ONLY */
592 #ifdef CONFIG_SOFTMMU
593 static inline void cpu_unassigned_access(CPUState
*cpu
, hwaddr addr
,
594 bool is_write
, bool is_exec
,
595 int opaque
, unsigned size
)
597 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
599 if (cc
->do_unassigned_access
) {
600 cc
->do_unassigned_access(cpu
, addr
, is_write
, is_exec
, opaque
, size
);
604 static inline void cpu_unaligned_access(CPUState
*cpu
, vaddr addr
,
605 int is_write
, int is_user
,
608 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
610 cc
->do_unaligned_access(cpu
, addr
, is_write
, is_user
, retaddr
);
616 * @cpu: The CPU to set the program counter for.
617 * @addr: Program counter value.
619 * Sets the program counter for a CPU.
621 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
623 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
625 cc
->set_pc(cpu
, addr
);
629 * cpu_reset_interrupt:
630 * @cpu: The CPU to clear the interrupt on.
631 * @mask: The interrupt mask to clear.
633 * Resets interrupts on the vCPU @cpu.
635 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
639 * @cpu: The CPU to exit.
641 * Requests the CPU @cpu to exit execution.
643 void cpu_exit(CPUState
*cpu
);
647 * @cpu: The CPU to resume.
649 * Resumes CPU, i.e. puts CPU into runnable state.
651 void cpu_resume(CPUState
*cpu
);
655 * @cpu: The vCPU to initialize.
657 * Initializes a vCPU.
659 void qemu_init_vcpu(CPUState
*cpu
);
661 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
662 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
663 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
667 * @cpu: CPU to the flags for.
668 * @enabled: Flags to enable.
670 * Enables or disables single-stepping for @cpu.
672 void cpu_single_step(CPUState
*cpu
, int enabled
);
674 /* Breakpoint/watchpoint flags */
675 #define BP_MEM_READ 0x01
676 #define BP_MEM_WRITE 0x02
677 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
678 #define BP_STOP_BEFORE_ACCESS 0x04
679 /* 0x08 currently unused */
682 #define BP_WATCHPOINT_HIT_READ 0x40
683 #define BP_WATCHPOINT_HIT_WRITE 0x80
684 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
686 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
687 CPUBreakpoint
**breakpoint
);
688 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
689 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
690 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
692 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
693 int flags
, CPUWatchpoint
**watchpoint
);
694 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
695 vaddr len
, int flags
);
696 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
697 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
699 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
701 void cpu_exec_exit(CPUState
*cpu
);
703 #ifdef CONFIG_SOFTMMU
704 extern const struct VMStateDescription vmstate_cpu_common
;
706 #define vmstate_cpu_common vmstate_dummy
709 #define VMSTATE_CPU() { \
710 .name = "parent_obj", \
711 .size = sizeof(CPUState), \
712 .vmsd = &vmstate_cpu_common, \
713 .flags = VMS_STRUCT, \