target/s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qemu/main-loop.h"
  23 #include "cpu.h"
  24 #include "exec/memory.h"
  25 #include "qemu/host-utils.h"
  26 #include "exec/helper-proto.h"
  27 #include "sysemu/kvm.h"
  28 #include "qemu/timer.h"
  29 #include "qemu/main-loop.h"
  30 #include "exec/address-spaces.h"
  31 #ifdef CONFIG_KVM
  32 #include <linux/kvm.h>
  33 #endif
  34 #include "exec/exec-all.h"
  35 #include "exec/cpu_ldst.h"
  36
  37 #if !defined(CONFIG_USER_ONLY)
  38 #include "hw/watchdog/wdt_diag288.h"
  39 #include "sysemu/cpus.h"
  40 #include "sysemu/sysemu.h"
  41 #include "hw/s390x/ebcdic.h"
  42 #include "hw/s390x/ipl.h"
  43 #endif
  44
  45 /* #define DEBUG_HELPER */
  46 #ifdef DEBUG_HELPER
  47 #define HELPER_LOG(x...) qemu_log(x)
  48 #else
  49 #define HELPER_LOG(x...)
  50 #endif
  51
  52 /* Raise an exception dynamically from a helper function.  */
  53 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  54                                      uintptr_t retaddr)
  55 {
  56     CPUState *cs = CPU(s390_env_get_cpu(env));
  57
  58     cs->exception_index = EXCP_PGM;
  59     env->int_pgm_code = excp;
  60     env->int_pgm_ilen = ILEN_AUTO;
  61
  62     /* Use the (ultimate) callers address to find the insn that trapped.  */
  63     cpu_restore_state(cs, retaddr);
  64
  65     cpu_loop_exit(cs);
  66 }
  67
  68 /* Raise an exception statically from a TB.  */
  69 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  70 {
  71     CPUState *cs = CPU(s390_env_get_cpu(env));
  72
  73     HELPER_LOG("%s: exception %d\n", __func__, excp);
  74     cs->exception_index = excp;
  75     cpu_loop_exit(cs);
  76 }
  77
  78 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  79 {
  80     S390CPU *cpu = s390_env_get_cpu(env);
  81
  82     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  83                   env->psw.addr);
  84
  85     if (kvm_enabled()) {
  86 #ifdef CONFIG_KVM
  87         struct kvm_s390_irq irq = {
  88             .type = KVM_S390_PROGRAM_INT,
  89             .u.pgm.code = code,
  90         };
  91
  92         kvm_s390_vcpu_interrupt(cpu, &irq);
  93 #endif
  94     } else {
  95         CPUState *cs = CPU(cpu);
  96
  97         env->int_pgm_code = code;
  98         env->int_pgm_ilen = ilen;
  99         cs->exception_index = EXCP_PGM;
 100         cpu_loop_exit(cs);
 101     }
 102 }
 103
 104 #ifndef CONFIG_USER_ONLY
 105
 106 /* SCLP service call */
 107 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 108 {
 109     qemu_mutex_lock_iothread();
 110     int r = sclp_service_call(env, r1, r2);
 111     if (r < 0) {
 112         program_interrupt(env, -r, 4);
 113         r = 0;
 114     }
 115     qemu_mutex_unlock_iothread();
 116     return r;
 117 }
 118
 119 #ifndef CONFIG_USER_ONLY
 120 static int modified_clear_reset(S390CPU *cpu)
 121 {
 122     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 123     CPUState *t;
 124
 125     pause_all_vcpus();
 126     cpu_synchronize_all_states();
 127     CPU_FOREACH(t) {
 128         run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
 129     }
 130     s390_cmma_reset();
 131     subsystem_reset();
 132     s390_crypto_reset();
 133     scc->load_normal(CPU(cpu));
 134     cpu_synchronize_all_post_reset();
 135     resume_all_vcpus();
 136     return 0;
 137 }
 138
 139 static int load_normal_reset(S390CPU *cpu)
 140 {
 141     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 142     CPUState *t;
 143
 144     pause_all_vcpus();
 145     cpu_synchronize_all_states();
 146     CPU_FOREACH(t) {
 147         run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL);
 148     }
 149     s390_cmma_reset();
 150     subsystem_reset();
 151     scc->initial_cpu_reset(CPU(cpu));
 152     scc->load_normal(CPU(cpu));
 153     cpu_synchronize_all_post_reset();
 154     resume_all_vcpus();
 155     return 0;
 156 }
 157
 158 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 159 {
 160     uint64_t func = env->regs[r1];
 161     uint64_t timeout = env->regs[r1 + 1];
 162     uint64_t action = env->regs[r3];
 163     Object *obj;
 164     DIAG288State *diag288;
 165     DIAG288Class *diag288_class;
 166
 167     if (r1 % 2 || action != 0) {
 168         return -1;
 169     }
 170
 171     /* Timeout must be more than 15 seconds except for timer deletion */
 172     if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 173         return -1;
 174     }
 175
 176     obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 177     if (!obj) {
 178         return -1;
 179     }
 180
 181     diag288 = DIAG288(obj);
 182     diag288_class = DIAG288_GET_CLASS(diag288);
 183     return diag288_class->handle_timer(diag288, func, timeout);
 184 }
 185
 186 #define DIAG_308_RC_OK              0x0001
 187 #define DIAG_308_RC_NO_CONF         0x0102
 188 #define DIAG_308_RC_INVALID         0x0402
 189
 190 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 191 {
 192     uint64_t addr =  env->regs[r1];
 193     uint64_t subcode = env->regs[r3];
 194     IplParameterBlock *iplb;
 195
 196     if (env->psw.mask & PSW_MASK_PSTATE) {
 197         program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO);
 198         return;
 199     }
 200
 201     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 202         program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO);
 203         return;
 204     }
 205
 206     switch (subcode) {
 207     case 0:
 208         modified_clear_reset(s390_env_get_cpu(env));
 209         if (tcg_enabled()) {
 210             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 211         }
 212         break;
 213     case 1:
 214         load_normal_reset(s390_env_get_cpu(env));
 215         if (tcg_enabled()) {
 216             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 217         }
 218         break;
 219     case 3:
 220         s390_reipl_request();
 221         if (tcg_enabled()) {
 222             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 223         }
 224         break;
 225     case 5:
 226         if ((r1 & 1) || (addr & 0x0fffULL)) {
 227             program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO);
 228             return;
 229         }
 230         if (!address_space_access_valid(&address_space_memory, addr,
 231                                         sizeof(IplParameterBlock), false)) {
 232             program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO);
 233             return;
 234         }
 235         iplb = g_malloc0(sizeof(IplParameterBlock));
 236         cpu_physical_memory_read(addr, iplb, sizeof(iplb->len));
 237         if (!iplb_valid_len(iplb)) {
 238             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 239             goto out;
 240         }
 241
 242         cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len));
 243
 244         if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) {
 245             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 246             goto out;
 247         }
 248
 249         s390_ipl_update_diag308(iplb);
 250         env->regs[r1 + 1] = DIAG_308_RC_OK;
 251 out:
 252         g_free(iplb);
 253         return;
 254     case 6:
 255         if ((r1 & 1) || (addr & 0x0fffULL)) {
 256             program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO);
 257             return;
 258         }
 259         if (!address_space_access_valid(&address_space_memory, addr,
 260                                         sizeof(IplParameterBlock), true)) {
 261             program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO);
 262             return;
 263         }
 264         iplb = s390_ipl_get_iplb();
 265         if (iplb) {
 266             cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len));
 267             env->regs[r1 + 1] = DIAG_308_RC_OK;
 268         } else {
 269             env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 270         }
 271         return;
 272     default:
 273         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 274         break;
 275     }
 276 }
 277 #endif
 278
 279 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 280 {
 281     uint64_t r;
 282
 283     switch (num) {
 284     case 0x500:
 285         /* KVM hypercall */
 286         qemu_mutex_lock_iothread();
 287         r = s390_virtio_hypercall(env);
 288         qemu_mutex_unlock_iothread();
 289         break;
 290     case 0x44:
 291         /* yield */
 292         r = 0;
 293         break;
 294     case 0x308:
 295         /* ipl */
 296         handle_diag_308(env, r1, r3);
 297         r = 0;
 298         break;
 299     default:
 300         r = -1;
 301         break;
 302     }
 303
 304     if (r) {
 305         program_interrupt(env, PGM_OPERATION, ILEN_AUTO);
 306     }
 307 }
 308
 309 /* Set Prefix */
 310 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 311 {
 312     CPUState *cs = CPU(s390_env_get_cpu(env));
 313     uint32_t prefix = a1 & 0x7fffe000;
 314
 315     env->psa = prefix;
 316     HELPER_LOG("prefix: %#x\n", prefix);
 317     tlb_flush_page(cs, 0);
 318     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 319 }
 320
 321 /* Store Clock */
 322 uint64_t HELPER(stck)(CPUS390XState *env)
 323 {
 324     uint64_t time;
 325
 326     time = env->tod_offset +
 327         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 328
 329     return time;
 330 }
 331
 332 /* Set Clock Comparator */
 333 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 334 {
 335     if (time == -1ULL) {
 336         return;
 337     }
 338
 339     env->ckc = time;
 340
 341     /* difference between origins */
 342     time -= env->tod_offset;
 343
 344     /* nanoseconds */
 345     time = tod2time(time);
 346
 347     timer_mod(env->tod_timer, env->tod_basetime + time);
 348 }
 349
 350 /* Store Clock Comparator */
 351 uint64_t HELPER(stckc)(CPUS390XState *env)
 352 {
 353     return env->ckc;
 354 }
 355
 356 /* Set CPU Timer */
 357 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 358 {
 359     if (time == -1ULL) {
 360         return;
 361     }
 362
 363     /* nanoseconds */
 364     time = tod2time(time);
 365
 366     env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 367
 368     timer_mod(env->cpu_timer, env->cputm);
 369 }
 370
 371 /* Store CPU Timer */
 372 uint64_t HELPER(stpt)(CPUS390XState *env)
 373 {
 374     return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 375 }
 376
 377 /* Store System Information */
 378 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 379                       uint64_t r0, uint64_t r1)
 380 {
 381     S390CPU *cpu = s390_env_get_cpu(env);
 382     int cc = 0;
 383     int sel1, sel2;
 384
 385     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 386         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 387         /* valid function code, invalid reserved bits */
 388         program_interrupt(env, PGM_SPECIFICATION, 2);
 389     }
 390
 391     sel1 = r0 & STSI_R0_SEL1_MASK;
 392     sel2 = r1 & STSI_R1_SEL2_MASK;
 393
 394     /* XXX: spec exception if sysib is not 4k-aligned */
 395
 396     switch (r0 & STSI_LEVEL_MASK) {
 397     case STSI_LEVEL_1:
 398         if ((sel1 == 1) && (sel2 == 1)) {
 399             /* Basic Machine Configuration */
 400             struct sysib_111 sysib;
 401             char type[5] = {};
 402
 403             memset(&sysib, 0, sizeof(sysib));
 404             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 405             /* same as machine type number in STORE CPU ID, but in EBCDIC */
 406             snprintf(type, ARRAY_SIZE(type), "%X", cpu->model->def->type);
 407             ebcdic_put(sysib.type, type, 4);
 408             /* model number (not stored in STORE CPU ID for z/Architecure) */
 409             ebcdic_put(sysib.model, "QEMU            ", 16);
 410             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 411             ebcdic_put(sysib.plant, "QEMU", 4);
 412             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 413         } else if ((sel1 == 2) && (sel2 == 1)) {
 414             /* Basic Machine CPU */
 415             struct sysib_121 sysib;
 416
 417             memset(&sysib, 0, sizeof(sysib));
 418             /* XXX make different for different CPUs? */
 419             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 420             ebcdic_put(sysib.plant, "QEMU", 4);
 421             stw_p(&sysib.cpu_addr, env->cpu_num);
 422             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 423         } else if ((sel1 == 2) && (sel2 == 2)) {
 424             /* Basic Machine CPUs */
 425             struct sysib_122 sysib;
 426
 427             memset(&sysib, 0, sizeof(sysib));
 428             stl_p(&sysib.capability, 0x443afc29);
 429             /* XXX change when SMP comes */
 430             stw_p(&sysib.total_cpus, 1);
 431             stw_p(&sysib.active_cpus, 1);
 432             stw_p(&sysib.standby_cpus, 0);
 433             stw_p(&sysib.reserved_cpus, 0);
 434             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 435         } else {
 436             cc = 3;
 437         }
 438         break;
 439     case STSI_LEVEL_2:
 440         {
 441             if ((sel1 == 2) && (sel2 == 1)) {
 442                 /* LPAR CPU */
 443                 struct sysib_221 sysib;
 444
 445                 memset(&sysib, 0, sizeof(sysib));
 446                 /* XXX make different for different CPUs? */
 447                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 448                 ebcdic_put(sysib.plant, "QEMU", 4);
 449                 stw_p(&sysib.cpu_addr, env->cpu_num);
 450                 stw_p(&sysib.cpu_id, 0);
 451                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 452             } else if ((sel1 == 2) && (sel2 == 2)) {
 453                 /* LPAR CPUs */
 454                 struct sysib_222 sysib;
 455
 456                 memset(&sysib, 0, sizeof(sysib));
 457                 stw_p(&sysib.lpar_num, 0);
 458                 sysib.lcpuc = 0;
 459                 /* XXX change when SMP comes */
 460                 stw_p(&sysib.total_cpus, 1);
 461                 stw_p(&sysib.conf_cpus, 1);
 462                 stw_p(&sysib.standby_cpus, 0);
 463                 stw_p(&sysib.reserved_cpus, 0);
 464                 ebcdic_put(sysib.name, "QEMU    ", 8);
 465                 stl_p(&sysib.caf, 1000);
 466                 stw_p(&sysib.dedicated_cpus, 0);
 467                 stw_p(&sysib.shared_cpus, 0);
 468                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 469             } else {
 470                 cc = 3;
 471             }
 472             break;
 473         }
 474     case STSI_LEVEL_3:
 475         {
 476             if ((sel1 == 2) && (sel2 == 2)) {
 477                 /* VM CPUs */
 478                 struct sysib_322 sysib;
 479
 480                 memset(&sysib, 0, sizeof(sysib));
 481                 sysib.count = 1;
 482                 /* XXX change when SMP comes */
 483                 stw_p(&sysib.vm[0].total_cpus, 1);
 484                 stw_p(&sysib.vm[0].conf_cpus, 1);
 485                 stw_p(&sysib.vm[0].standby_cpus, 0);
 486                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 487                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 488                 stl_p(&sysib.vm[0].caf, 1000);
 489                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 490                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 491             } else {
 492                 cc = 3;
 493             }
 494             break;
 495         }
 496     case STSI_LEVEL_CURRENT:
 497         env->regs[0] = STSI_LEVEL_3;
 498         break;
 499     default:
 500         cc = 3;
 501         break;
 502     }
 503
 504     return cc;
 505 }
 506
 507 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 508                       uint64_t cpu_addr)
 509 {
 510     int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 511
 512     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 513                __func__, order_code, r1, cpu_addr);
 514
 515     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 516        as parameter (input). Status (output) is always R1. */
 517
 518     switch (order_code & SIGP_ORDER_MASK) {
 519     case SIGP_SET_ARCH:
 520         /* switch arch */
 521         break;
 522     case SIGP_SENSE:
 523         /* enumerate CPU status */
 524         if (cpu_addr) {
 525             /* XXX implement when SMP comes */
 526             return 3;
 527         }
 528         env->regs[r1] &= 0xffffffff00000000ULL;
 529         cc = 1;
 530         break;
 531 #if !defined(CONFIG_USER_ONLY)
 532     case SIGP_RESTART:
 533         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 534         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 535         break;
 536     case SIGP_STOP:
 537         qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
 538         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 539         break;
 540 #endif
 541     default:
 542         /* unknown sigp */
 543         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 544         cc = SIGP_CC_NOT_OPERATIONAL;
 545     }
 546
 547     return cc;
 548 }
 549 #endif
 550
 551 #ifndef CONFIG_USER_ONLY
 552 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 553 {
 554     S390CPU *cpu = s390_env_get_cpu(env);
 555     qemu_mutex_lock_iothread();
 556     ioinst_handle_xsch(cpu, r1);
 557     qemu_mutex_unlock_iothread();
 558 }
 559
 560 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 561 {
 562     S390CPU *cpu = s390_env_get_cpu(env);
 563     qemu_mutex_lock_iothread();
 564     ioinst_handle_csch(cpu, r1);
 565     qemu_mutex_unlock_iothread();
 566 }
 567
 568 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 569 {
 570     S390CPU *cpu = s390_env_get_cpu(env);
 571     qemu_mutex_lock_iothread();
 572     ioinst_handle_hsch(cpu, r1);
 573     qemu_mutex_unlock_iothread();
 574 }
 575
 576 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 577 {
 578     S390CPU *cpu = s390_env_get_cpu(env);
 579     qemu_mutex_lock_iothread();
 580     ioinst_handle_msch(cpu, r1, inst >> 16);
 581     qemu_mutex_unlock_iothread();
 582 }
 583
 584 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 585 {
 586     S390CPU *cpu = s390_env_get_cpu(env);
 587     qemu_mutex_lock_iothread();
 588     ioinst_handle_rchp(cpu, r1);
 589     qemu_mutex_unlock_iothread();
 590 }
 591
 592 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 593 {
 594     S390CPU *cpu = s390_env_get_cpu(env);
 595     qemu_mutex_lock_iothread();
 596     ioinst_handle_rsch(cpu, r1);
 597     qemu_mutex_unlock_iothread();
 598 }
 599
 600 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 601 {
 602     S390CPU *cpu = s390_env_get_cpu(env);
 603     qemu_mutex_lock_iothread();
 604     ioinst_handle_ssch(cpu, r1, inst >> 16);
 605     qemu_mutex_unlock_iothread();
 606 }
 607
 608 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 609 {
 610     S390CPU *cpu = s390_env_get_cpu(env);
 611     qemu_mutex_lock_iothread();
 612     ioinst_handle_stsch(cpu, r1, inst >> 16);
 613     qemu_mutex_unlock_iothread();
 614 }
 615
 616 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 617 {
 618     S390CPU *cpu = s390_env_get_cpu(env);
 619     qemu_mutex_lock_iothread();
 620     ioinst_handle_tsch(cpu, r1, inst >> 16);
 621     qemu_mutex_unlock_iothread();
 622 }
 623
 624 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 625 {
 626     S390CPU *cpu = s390_env_get_cpu(env);
 627     qemu_mutex_lock_iothread();
 628     ioinst_handle_chsc(cpu, inst >> 16);
 629     qemu_mutex_unlock_iothread();
 630 }
 631 #endif
 632
 633 #ifndef CONFIG_USER_ONLY
 634 void HELPER(per_check_exception)(CPUS390XState *env)
 635 {
 636     CPUState *cs = CPU(s390_env_get_cpu(env));
 637
 638     if (env->per_perc_atmid) {
 639         env->int_pgm_code = PGM_PER;
 640         env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 641
 642         cs->exception_index = EXCP_PGM;
 643         cpu_loop_exit(cs);
 644     }
 645 }
 646
 647 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 648 {
 649     if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 650         if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 651             || get_per_in_range(env, to)) {
 652             env->per_address = from;
 653             env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 654         }
 655     }
 656 }
 657
 658 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 659 {
 660     if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 661         env->per_address = addr;
 662         env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 663
 664         /* If the instruction has to be nullified, trigger the
 665            exception immediately. */
 666         if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 667             CPUState *cs = CPU(s390_env_get_cpu(env));
 668
 669             env->per_perc_atmid |= PER_CODE_EVENT_NULLIFICATION;
 670             env->int_pgm_code = PGM_PER;
 671             env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 672
 673             cs->exception_index = EXCP_PGM;
 674             cpu_loop_exit(cs);
 675         }
 676     }
 677 }
 678 #endif
 679
 680 /* The maximum bit defined at the moment is 129.  */
 681 #define MAX_STFL_WORDS  3
 682
 683 /* Canonicalize the current cpu's features into the 64-bit words required
 684    by STFLE.  Return the index-1 of the max word that is non-zero.  */
 685 static unsigned do_stfle(CPUS390XState *env, uint64_t words[MAX_STFL_WORDS])
 686 {
 687     S390CPU *cpu = s390_env_get_cpu(env);
 688     const unsigned long *features = cpu->model->features;
 689     unsigned max_bit = 0;
 690     S390Feat feat;
 691
 692     memset(words, 0, sizeof(uint64_t) * MAX_STFL_WORDS);
 693
 694     if (test_bit(S390_FEAT_ZARCH, features)) {
 695         /* z/Architecture is always active if around */
 696         words[0] = 1ull << (63 - 2);
 697     }
 698
 699     for (feat = find_first_bit(features, S390_FEAT_MAX);
 700          feat < S390_FEAT_MAX;
 701          feat = find_next_bit(features, S390_FEAT_MAX, feat + 1)) {
 702         const S390FeatDef *def = s390_feat_def(feat);
 703         if (def->type == S390_FEAT_TYPE_STFL) {
 704             unsigned bit = def->bit;
 705             if (bit > max_bit) {
 706                 max_bit = bit;
 707             }
 708             assert(bit / 64 < MAX_STFL_WORDS);
 709             words[bit / 64] |= 1ULL << (63 - bit % 64);
 710         }
 711     }
 712
 713     return max_bit / 64;
 714 }
 715
 716 void HELPER(stfl)(CPUS390XState *env)
 717 {
 718     uint64_t words[MAX_STFL_WORDS];
 719
 720     do_stfle(env, words);
 721     cpu_stl_data(env, 200, words[0] >> 32);
 722 }
 723
 724 uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr)
 725 {
 726     uint64_t words[MAX_STFL_WORDS];
 727     unsigned count_m1 = env->regs[0] & 0xff;
 728     unsigned max_m1 = do_stfle(env, words);
 729     unsigned i;
 730
 731     for (i = 0; i <= count_m1; ++i) {
 732         cpu_stq_data(env, addr + 8 * i, words[i]);
 733     }
 734
 735     env->regs[0] = deposit64(env->regs[0], 0, 8, max_m1);
 736     return (count_m1 >= max_m1 ? 0 : 3);
 737 }