target-alpha/cpu.c

   1 /*
   2  * QEMU Alpha CPU
   3  *
   4  * Copyright (c) 2007 Jocelyn Mayer
   5  * Copyright (c) 2012 SUSE LINUX Products GmbH
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see
  19  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "cpu.h"
  24 #include "qemu-common.h"
  25 #include "migration/vmstate.h"
  26
  27
  28 static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
  29 {
  30     AlphaCPU *cpu = ALPHA_CPU(cs);
  31
  32     cpu->env.pc = value;
  33 }
  34
  35 static bool alpha_cpu_has_work(CPUState *cs)
  36 {
  37     /* Here we are checking to see if the CPU should wake up from HALT.
  38        We will have gotten into this state only for WTINT from PALmode.  */
  39     /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
  40        asleep even if (some) interrupts have been asserted.  For now,
  41        assume that if a CPU really wants to stay asleep, it will mask
  42        interrupts at the chipset level, which will prevent these bits
  43        from being set in the first place.  */
  44     return cs->interrupt_request & (CPU_INTERRUPT_HARD
  45                                     | CPU_INTERRUPT_TIMER
  46                                     | CPU_INTERRUPT_SMP
  47                                     | CPU_INTERRUPT_MCHK);
  48 }
  49
  50 static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
  51 {
  52     info->mach = bfd_mach_alpha_ev6;
  53     info->print_insn = print_insn_alpha;
  54 }
  55
  56 static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
  57 {
  58     CPUState *cs = CPU(dev);
  59     AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
  60
  61     qemu_init_vcpu(cs);
  62
  63     acc->parent_realize(dev, errp);
  64 }
  65
  66 /* Sort alphabetically by type name. */
  67 static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b)
  68 {
  69     ObjectClass *class_a = (ObjectClass *)a;
  70     ObjectClass *class_b = (ObjectClass *)b;
  71     const char *name_a, *name_b;
  72
  73     name_a = object_class_get_name(class_a);
  74     name_b = object_class_get_name(class_b);
  75     return strcmp(name_a, name_b);
  76 }
  77
  78 static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
  79 {
  80     ObjectClass *oc = data;
  81     CPUListState *s = user_data;
  82
  83     (*s->cpu_fprintf)(s->file, "  %s\n",
  84                       object_class_get_name(oc));
  85 }
  86
  87 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
  88 {
  89     CPUListState s = {
  90         .file = f,
  91         .cpu_fprintf = cpu_fprintf,
  92     };
  93     GSList *list;
  94
  95     list = object_class_get_list(TYPE_ALPHA_CPU, false);
  96     list = g_slist_sort(list, alpha_cpu_list_compare);
  97     (*cpu_fprintf)(f, "Available CPUs:\n");
  98     g_slist_foreach(list, alpha_cpu_list_entry, &s);
  99     g_slist_free(list);
 100 }
 101
 102 /* Models */
 103
 104 #define TYPE(model) model "-" TYPE_ALPHA_CPU
 105
 106 typedef struct AlphaCPUAlias {
 107     const char *alias;
 108     const char *typename;
 109 } AlphaCPUAlias;
 110
 111 static const AlphaCPUAlias alpha_cpu_aliases[] = {
 112     { "21064",   TYPE("ev4") },
 113     { "21164",   TYPE("ev5") },
 114     { "21164a",  TYPE("ev56") },
 115     { "21164pc", TYPE("pca56") },
 116     { "21264",   TYPE("ev6") },
 117     { "21264a",  TYPE("ev67") },
 118 };
 119
 120 static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
 121 {
 122     ObjectClass *oc = NULL;
 123     char *typename;
 124     int i;
 125
 126     if (cpu_model == NULL) {
 127         return NULL;
 128     }
 129
 130     oc = object_class_by_name(cpu_model);
 131     if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL &&
 132         !object_class_is_abstract(oc)) {
 133         return oc;
 134     }
 135
 136     for (i = 0; i < ARRAY_SIZE(alpha_cpu_aliases); i++) {
 137         if (strcmp(cpu_model, alpha_cpu_aliases[i].alias) == 0) {
 138             oc = object_class_by_name(alpha_cpu_aliases[i].typename);
 139             assert(oc != NULL && !object_class_is_abstract(oc));
 140             return oc;
 141         }
 142     }
 143
 144     typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model);
 145     oc = object_class_by_name(typename);
 146     g_free(typename);
 147     if (oc != NULL && object_class_is_abstract(oc)) {
 148         oc = NULL;
 149     }
 150     return oc;
 151 }
 152
 153 AlphaCPU *cpu_alpha_init(const char *cpu_model)
 154 {
 155     AlphaCPU *cpu;
 156     ObjectClass *cpu_class;
 157
 158     cpu_class = alpha_cpu_class_by_name(cpu_model);
 159     if (cpu_class == NULL) {
 160         /* Default to ev67; no reason not to emulate insns by default.  */
 161         cpu_class = object_class_by_name(TYPE("ev67"));
 162     }
 163     cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
 164
 165     object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 166
 167     return cpu;
 168 }
 169
 170 static void ev4_cpu_initfn(Object *obj)
 171 {
 172     AlphaCPU *cpu = ALPHA_CPU(obj);
 173     CPUAlphaState *env = &cpu->env;
 174
 175     env->implver = IMPLVER_2106x;
 176 }
 177
 178 static const TypeInfo ev4_cpu_type_info = {
 179     .name = TYPE("ev4"),
 180     .parent = TYPE_ALPHA_CPU,
 181     .instance_init = ev4_cpu_initfn,
 182 };
 183
 184 static void ev5_cpu_initfn(Object *obj)
 185 {
 186     AlphaCPU *cpu = ALPHA_CPU(obj);
 187     CPUAlphaState *env = &cpu->env;
 188
 189     env->implver = IMPLVER_21164;
 190 }
 191
 192 static const TypeInfo ev5_cpu_type_info = {
 193     .name = TYPE("ev5"),
 194     .parent = TYPE_ALPHA_CPU,
 195     .instance_init = ev5_cpu_initfn,
 196 };
 197
 198 static void ev56_cpu_initfn(Object *obj)
 199 {
 200     AlphaCPU *cpu = ALPHA_CPU(obj);
 201     CPUAlphaState *env = &cpu->env;
 202
 203     env->amask |= AMASK_BWX;
 204 }
 205
 206 static const TypeInfo ev56_cpu_type_info = {
 207     .name = TYPE("ev56"),
 208     .parent = TYPE("ev5"),
 209     .instance_init = ev56_cpu_initfn,
 210 };
 211
 212 static void pca56_cpu_initfn(Object *obj)
 213 {
 214     AlphaCPU *cpu = ALPHA_CPU(obj);
 215     CPUAlphaState *env = &cpu->env;
 216
 217     env->amask |= AMASK_MVI;
 218 }
 219
 220 static const TypeInfo pca56_cpu_type_info = {
 221     .name = TYPE("pca56"),
 222     .parent = TYPE("ev56"),
 223     .instance_init = pca56_cpu_initfn,
 224 };
 225
 226 static void ev6_cpu_initfn(Object *obj)
 227 {
 228     AlphaCPU *cpu = ALPHA_CPU(obj);
 229     CPUAlphaState *env = &cpu->env;
 230
 231     env->implver = IMPLVER_21264;
 232     env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
 233 }
 234
 235 static const TypeInfo ev6_cpu_type_info = {
 236     .name = TYPE("ev6"),
 237     .parent = TYPE_ALPHA_CPU,
 238     .instance_init = ev6_cpu_initfn,
 239 };
 240
 241 static void ev67_cpu_initfn(Object *obj)
 242 {
 243     AlphaCPU *cpu = ALPHA_CPU(obj);
 244     CPUAlphaState *env = &cpu->env;
 245
 246     env->amask |= AMASK_CIX | AMASK_PREFETCH;
 247 }
 248
 249 static const TypeInfo ev67_cpu_type_info = {
 250     .name = TYPE("ev67"),
 251     .parent = TYPE("ev6"),
 252     .instance_init = ev67_cpu_initfn,
 253 };
 254
 255 static const TypeInfo ev68_cpu_type_info = {
 256     .name = TYPE("ev68"),
 257     .parent = TYPE("ev67"),
 258 };
 259
 260 static void alpha_cpu_initfn(Object *obj)
 261 {
 262     CPUState *cs = CPU(obj);
 263     AlphaCPU *cpu = ALPHA_CPU(obj);
 264     CPUAlphaState *env = &cpu->env;
 265
 266     cs->env_ptr = env;
 267     cpu_exec_init(cs, &error_abort);
 268     tlb_flush(cs, 1);
 269
 270     alpha_translate_init();
 271
 272 #if defined(CONFIG_USER_ONLY)
 273     env->ps = PS_USER_MODE;
 274     cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD
 275                                | FPCR_UNFD | FPCR_INED | FPCR_DNOD
 276                                | FPCR_DYN_NORMAL));
 277 #endif
 278     env->lock_addr = -1;
 279     env->fen = 1;
 280 }
 281
 282 static void alpha_cpu_class_init(ObjectClass *oc, void *data)
 283 {
 284     DeviceClass *dc = DEVICE_CLASS(oc);
 285     CPUClass *cc = CPU_CLASS(oc);
 286     AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc);
 287
 288     acc->parent_realize = dc->realize;
 289     dc->realize = alpha_cpu_realizefn;
 290
 291     cc->class_by_name = alpha_cpu_class_by_name;
 292     cc->has_work = alpha_cpu_has_work;
 293     cc->do_interrupt = alpha_cpu_do_interrupt;
 294     cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt;
 295     cc->dump_state = alpha_cpu_dump_state;
 296     cc->set_pc = alpha_cpu_set_pc;
 297     cc->gdb_read_register = alpha_cpu_gdb_read_register;
 298     cc->gdb_write_register = alpha_cpu_gdb_write_register;
 299 #ifdef CONFIG_USER_ONLY
 300     cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
 301 #else
 302     cc->do_unassigned_access = alpha_cpu_unassigned_access;
 303     cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
 304     cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
 305     dc->vmsd = &vmstate_alpha_cpu;
 306 #endif
 307     cc->disas_set_info = alpha_cpu_disas_set_info;
 308
 309     cc->gdb_num_core_regs = 67;
 310
 311     /*
 312      * Reason: alpha_cpu_initfn() calls cpu_exec_init(), which saves
 313      * the object in cpus -> dangling pointer after final
 314      * object_unref().
 315      */
 316     dc->cannot_destroy_with_object_finalize_yet = true;
 317 }
 318
 319 static const TypeInfo alpha_cpu_type_info = {
 320     .name = TYPE_ALPHA_CPU,
 321     .parent = TYPE_CPU,
 322     .instance_size = sizeof(AlphaCPU),
 323     .instance_init = alpha_cpu_initfn,
 324     .abstract = true,
 325     .class_size = sizeof(AlphaCPUClass),
 326     .class_init = alpha_cpu_class_init,
 327 };
 328
 329 static void alpha_cpu_register_types(void)
 330 {
 331     type_register_static(&alpha_cpu_type_info);
 332     type_register_static(&ev4_cpu_type_info);
 333     type_register_static(&ev5_cpu_type_info);
 334     type_register_static(&ev56_cpu_type_info);
 335     type_register_static(&pca56_cpu_type_info);
 336     type_register_static(&ev6_cpu_type_info);
 337     type_register_static(&ev67_cpu_type_info);
 338     type_register_static(&ev68_cpu_type_info);
 339 }
 340
 341 type_init(alpha_cpu_register_types)