2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
32 #include "hpet_emul.h"
36 #include "multiboot.h"
37 #include "mc146818rtc.h"
47 #include "hw/block-common.h"
48 #include "ui/qemu-spice.h"
50 #include "exec-memory.h"
51 #include "arch_init.h"
54 /* debug PC/ISA interrupts */
58 #define DPRINTF(fmt, ...) \
59 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
61 #define DPRINTF(fmt, ...)
64 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
65 #define ACPI_DATA_SIZE 0x10000
66 #define BIOS_CFG_IOPORT 0x510
67 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
68 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
69 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
70 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
71 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
73 #define MSI_ADDR_BASE 0xfee00000
75 #define E820_NR_ENTRIES 16
81 } QEMU_PACKED
__attribute((__aligned__(4)));
85 struct e820_entry entry
[E820_NR_ENTRIES
];
86 } QEMU_PACKED
__attribute((__aligned__(4)));
88 static struct e820_table e820_table
;
89 struct hpet_fw_config hpet_cfg
= {.count
= UINT8_MAX
};
91 void gsi_handler(void *opaque
, int n
, int level
)
95 DPRINTF("pc: %s GSI %d\n", level
? "raising" : "lowering", n
);
96 if (n
< ISA_NUM_IRQS
) {
97 qemu_set_irq(s
->i8259_irq
[n
], level
);
99 qemu_set_irq(s
->ioapic_irq
[n
], level
);
102 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
106 /* MSDOS compatibility mode FPU exception support */
107 static qemu_irq ferr_irq
;
109 void pc_register_ferr_irq(qemu_irq irq
)
114 /* XXX: add IGNNE support */
115 void cpu_set_ferr(CPUX86State
*s
)
117 qemu_irq_raise(ferr_irq
);
120 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
122 qemu_irq_lower(ferr_irq
);
126 uint64_t cpu_get_tsc(CPUX86State
*env
)
128 return cpu_get_ticks();
133 static cpu_set_smm_t smm_set
;
134 static void *smm_arg
;
136 void cpu_smm_register(cpu_set_smm_t callback
, void *arg
)
138 assert(smm_set
== NULL
);
139 assert(smm_arg
== NULL
);
144 void cpu_smm_update(CPUX86State
*env
)
146 if (smm_set
&& smm_arg
&& env
== first_cpu
)
147 smm_set(!!(env
->hflags
& HF_SMM_MASK
), smm_arg
);
152 int cpu_get_pic_interrupt(CPUX86State
*env
)
156 intno
= apic_get_interrupt(env
->apic_state
);
160 /* read the irq from the PIC */
161 if (!apic_accept_pic_intr(env
->apic_state
)) {
165 intno
= pic_read_irq(isa_pic
);
169 static void pic_irq_request(void *opaque
, int irq
, int level
)
171 CPUX86State
*env
= first_cpu
;
173 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
174 if (env
->apic_state
) {
176 if (apic_accept_pic_intr(env
->apic_state
)) {
177 apic_deliver_pic_intr(env
->apic_state
, level
);
183 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
185 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
189 /* PC cmos mappings */
191 #define REG_EQUIPMENT_BYTE 0x14
193 static int cmos_get_fd_drive_type(FDriveType fd0
)
199 /* 1.44 Mb 3"5 drive */
203 /* 2.88 Mb 3"5 drive */
207 /* 1.2 Mb 5"5 drive */
210 case FDRIVE_DRV_NONE
:
218 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
219 int16_t cylinders
, int8_t heads
, int8_t sectors
)
221 rtc_set_memory(s
, type_ofs
, 47);
222 rtc_set_memory(s
, info_ofs
, cylinders
);
223 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
224 rtc_set_memory(s
, info_ofs
+ 2, heads
);
225 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
226 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
227 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
228 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
229 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
230 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
233 /* convert boot_device letter to something recognizable by the bios */
234 static int boot_device2nibble(char boot_device
)
236 switch(boot_device
) {
239 return 0x01; /* floppy boot */
241 return 0x02; /* hard drive boot */
243 return 0x03; /* CD-ROM boot */
245 return 0x04; /* Network boot */
250 static int set_boot_dev(ISADevice
*s
, const char *boot_device
, int fd_bootchk
)
252 #define PC_MAX_BOOT_DEVICES 3
253 int nbds
, bds
[3] = { 0, };
256 nbds
= strlen(boot_device
);
257 if (nbds
> PC_MAX_BOOT_DEVICES
) {
258 error_report("Too many boot devices for PC");
261 for (i
= 0; i
< nbds
; i
++) {
262 bds
[i
] = boot_device2nibble(boot_device
[i
]);
264 error_report("Invalid boot device for PC: '%c'",
269 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
270 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
274 static int pc_boot_set(void *opaque
, const char *boot_device
)
276 return set_boot_dev(opaque
, boot_device
, 0);
279 typedef struct pc_cmos_init_late_arg
{
280 ISADevice
*rtc_state
;
282 } pc_cmos_init_late_arg
;
284 static void pc_cmos_init_late(void *opaque
)
286 pc_cmos_init_late_arg
*arg
= opaque
;
287 ISADevice
*s
= arg
->rtc_state
;
289 int8_t heads
, sectors
;
294 if (ide_get_geometry(arg
->idebus
[0], 0,
295 &cylinders
, &heads
, §ors
) >= 0) {
296 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
299 if (ide_get_geometry(arg
->idebus
[0], 1,
300 &cylinders
, &heads
, §ors
) >= 0) {
301 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
304 rtc_set_memory(s
, 0x12, val
);
307 for (i
= 0; i
< 4; i
++) {
308 /* NOTE: ide_get_geometry() returns the physical
309 geometry. It is always such that: 1 <= sects <= 63, 1
310 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
311 geometry can be different if a translation is done. */
312 if (ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
313 &cylinders
, &heads
, §ors
) >= 0) {
314 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
315 assert((trans
& ~3) == 0);
316 val
|= trans
<< (i
* 2);
319 rtc_set_memory(s
, 0x39, val
);
321 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
324 void pc_cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
325 const char *boot_device
,
326 ISADevice
*floppy
, BusState
*idebus0
, BusState
*idebus1
,
330 FDriveType fd_type
[2] = { FDRIVE_DRV_NONE
, FDRIVE_DRV_NONE
};
331 static pc_cmos_init_late_arg arg
;
333 /* various important CMOS locations needed by PC/Bochs bios */
336 /* base memory (first MiB) */
337 val
= MIN(ram_size
/ 1024, 640);
338 rtc_set_memory(s
, 0x15, val
);
339 rtc_set_memory(s
, 0x16, val
>> 8);
340 /* extended memory (next 64MiB) */
341 if (ram_size
> 1024 * 1024) {
342 val
= (ram_size
- 1024 * 1024) / 1024;
348 rtc_set_memory(s
, 0x17, val
);
349 rtc_set_memory(s
, 0x18, val
>> 8);
350 rtc_set_memory(s
, 0x30, val
);
351 rtc_set_memory(s
, 0x31, val
>> 8);
352 /* memory between 16MiB and 4GiB */
353 if (ram_size
> 16 * 1024 * 1024) {
354 val
= (ram_size
- 16 * 1024 * 1024) / 65536;
360 rtc_set_memory(s
, 0x34, val
);
361 rtc_set_memory(s
, 0x35, val
>> 8);
362 /* memory above 4GiB */
363 val
= above_4g_mem_size
/ 65536;
364 rtc_set_memory(s
, 0x5b, val
);
365 rtc_set_memory(s
, 0x5c, val
>> 8);
366 rtc_set_memory(s
, 0x5d, val
>> 16);
368 /* set the number of CPU */
369 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
371 /* set boot devices, and disable floppy signature check if requested */
372 if (set_boot_dev(s
, boot_device
, fd_bootchk
)) {
378 for (i
= 0; i
< 2; i
++) {
379 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
382 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
383 cmos_get_fd_drive_type(fd_type
[1]);
384 rtc_set_memory(s
, 0x10, val
);
388 if (fd_type
[0] < FDRIVE_DRV_NONE
) {
391 if (fd_type
[1] < FDRIVE_DRV_NONE
) {
398 val
|= 0x01; /* 1 drive, ready for boot */
401 val
|= 0x41; /* 2 drives, ready for boot */
404 val
|= 0x02; /* FPU is there */
405 val
|= 0x04; /* PS/2 mouse installed */
406 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
410 arg
.idebus
[0] = idebus0
;
411 arg
.idebus
[1] = idebus1
;
412 qemu_register_reset(pc_cmos_init_late
, &arg
);
415 /* port 92 stuff: could be split off */
416 typedef struct Port92State
{
423 static void port92_write(void *opaque
, uint32_t addr
, uint32_t val
)
425 Port92State
*s
= opaque
;
427 DPRINTF("port92: write 0x%02x\n", val
);
429 qemu_set_irq(*s
->a20_out
, (val
>> 1) & 1);
431 qemu_system_reset_request();
435 static uint32_t port92_read(void *opaque
, uint32_t addr
)
437 Port92State
*s
= opaque
;
441 DPRINTF("port92: read 0x%02x\n", ret
);
445 static void port92_init(ISADevice
*dev
, qemu_irq
*a20_out
)
447 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
449 s
->a20_out
= a20_out
;
452 static const VMStateDescription vmstate_port92_isa
= {
455 .minimum_version_id
= 1,
456 .minimum_version_id_old
= 1,
457 .fields
= (VMStateField
[]) {
458 VMSTATE_UINT8(outport
, Port92State
),
459 VMSTATE_END_OF_LIST()
463 static void port92_reset(DeviceState
*d
)
465 Port92State
*s
= container_of(d
, Port92State
, dev
.qdev
);
470 static const MemoryRegionPortio port92_portio
[] = {
471 { 0, 1, 1, .read
= port92_read
, .write
= port92_write
},
472 PORTIO_END_OF_LIST(),
475 static const MemoryRegionOps port92_ops
= {
476 .old_portio
= port92_portio
479 static int port92_initfn(ISADevice
*dev
)
481 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
483 memory_region_init_io(&s
->io
, &port92_ops
, s
, "port92", 1);
484 isa_register_ioport(dev
, &s
->io
, 0x92);
490 static void port92_class_initfn(ObjectClass
*klass
, void *data
)
492 DeviceClass
*dc
= DEVICE_CLASS(klass
);
493 ISADeviceClass
*ic
= ISA_DEVICE_CLASS(klass
);
494 ic
->init
= port92_initfn
;
496 dc
->reset
= port92_reset
;
497 dc
->vmsd
= &vmstate_port92_isa
;
500 static TypeInfo port92_info
= {
502 .parent
= TYPE_ISA_DEVICE
,
503 .instance_size
= sizeof(Port92State
),
504 .class_init
= port92_class_initfn
,
507 static void port92_register_types(void)
509 type_register_static(&port92_info
);
512 type_init(port92_register_types
)
514 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
516 CPUX86State
*cpu
= opaque
;
518 /* XXX: send to all CPUs ? */
519 /* XXX: add logic to handle multiple A20 line sources */
520 cpu_x86_set_a20(cpu
, level
);
523 /***********************************************************/
524 /* Bochs BIOS debug ports */
526 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
528 static const char shutdown_str
[8] = "Shutdown";
529 static int shutdown_index
= 0;
533 /* same as Bochs power off */
534 if (val
== shutdown_str
[shutdown_index
]) {
536 if (shutdown_index
== 8) {
538 qemu_system_shutdown_request();
547 exit((val
<< 1) | 1);
551 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
553 int index
= le32_to_cpu(e820_table
.count
);
554 struct e820_entry
*entry
;
556 if (index
>= E820_NR_ENTRIES
)
558 entry
= &e820_table
.entry
[index
++];
560 entry
->address
= cpu_to_le64(address
);
561 entry
->length
= cpu_to_le64(length
);
562 entry
->type
= cpu_to_le32(type
);
564 e820_table
.count
= cpu_to_le32(index
);
568 static void *bochs_bios_init(void)
571 uint8_t *smbios_table
;
573 uint64_t *numa_fw_cfg
;
576 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
578 register_ioport_write(0x501, 1, 1, bochs_bios_write
, NULL
);
579 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
580 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
582 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
584 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
585 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
586 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
588 fw_cfg_add_i32(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, kvm_allows_irq0_override());
590 smbios_table
= smbios_get_table(&smbios_len
);
592 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
593 smbios_table
, smbios_len
);
594 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
, (uint8_t *)&e820_table
,
595 sizeof(struct e820_table
));
597 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, (uint8_t *)&hpet_cfg
,
598 sizeof(struct hpet_fw_config
));
599 /* allocate memory for the NUMA channel: one (64bit) word for the number
600 * of nodes, one word for each VCPU->node and one word for each node to
601 * hold the amount of memory.
603 numa_fw_cfg
= g_malloc0((1 + max_cpus
+ nb_numa_nodes
) * 8);
604 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
605 for (i
= 0; i
< max_cpus
; i
++) {
606 for (j
= 0; j
< nb_numa_nodes
; j
++) {
607 if (test_bit(i
, node_cpumask
[j
])) {
608 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
613 for (i
= 0; i
< nb_numa_nodes
; i
++) {
614 numa_fw_cfg
[max_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
616 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
617 (1 + max_cpus
+ nb_numa_nodes
) * 8);
622 static long get_file_size(FILE *f
)
626 /* XXX: on Unix systems, using fstat() probably makes more sense */
629 fseek(f
, 0, SEEK_END
);
631 fseek(f
, where
, SEEK_SET
);
636 static void load_linux(void *fw_cfg
,
637 const char *kernel_filename
,
638 const char *initrd_filename
,
639 const char *kernel_cmdline
,
640 target_phys_addr_t max_ram_size
)
643 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
645 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
646 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
650 /* Align to 16 bytes as a paranoia measure */
651 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
653 /* load the kernel header */
654 f
= fopen(kernel_filename
, "rb");
655 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
656 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
657 MIN(ARRAY_SIZE(header
), kernel_size
)) {
658 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
659 kernel_filename
, strerror(errno
));
663 /* kernel protocol version */
665 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
667 if (ldl_p(header
+0x202) == 0x53726448)
668 protocol
= lduw_p(header
+0x206);
670 /* This looks like a multiboot kernel. If it is, let's stop
671 treating it like a Linux kernel. */
672 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
673 kernel_cmdline
, kernel_size
, header
))
678 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
681 cmdline_addr
= 0x9a000 - cmdline_size
;
683 } else if (protocol
< 0x202) {
684 /* High but ancient kernel */
686 cmdline_addr
= 0x9a000 - cmdline_size
;
687 prot_addr
= 0x100000;
689 /* High and recent kernel */
691 cmdline_addr
= 0x20000;
692 prot_addr
= 0x100000;
697 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
698 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
699 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
705 /* highest address for loading the initrd */
706 if (protocol
>= 0x203)
707 initrd_max
= ldl_p(header
+0x22c);
709 initrd_max
= 0x37ffffff;
711 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
712 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
714 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
715 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
716 fw_cfg_add_bytes(fw_cfg
, FW_CFG_CMDLINE_DATA
,
717 (uint8_t*)strdup(kernel_cmdline
),
718 strlen(kernel_cmdline
)+1);
720 if (protocol
>= 0x202) {
721 stl_p(header
+0x228, cmdline_addr
);
723 stw_p(header
+0x20, 0xA33F);
724 stw_p(header
+0x22, cmdline_addr
-real_addr
);
727 /* handle vga= parameter */
728 vmode
= strstr(kernel_cmdline
, "vga=");
730 unsigned int video_mode
;
733 if (!strncmp(vmode
, "normal", 6)) {
735 } else if (!strncmp(vmode
, "ext", 3)) {
737 } else if (!strncmp(vmode
, "ask", 3)) {
740 video_mode
= strtol(vmode
, NULL
, 0);
742 stw_p(header
+0x1fa, video_mode
);
746 /* High nybble = B reserved for QEMU; low nybble is revision number.
747 If this code is substantially changed, you may want to consider
748 incrementing the revision. */
749 if (protocol
>= 0x200)
750 header
[0x210] = 0xB0;
753 if (protocol
>= 0x201) {
754 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
755 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
759 if (initrd_filename
) {
760 if (protocol
< 0x200) {
761 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
765 initrd_size
= get_image_size(initrd_filename
);
766 if (initrd_size
< 0) {
767 fprintf(stderr
, "qemu: error reading initrd %s\n",
772 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
774 initrd_data
= g_malloc(initrd_size
);
775 load_image(initrd_filename
, initrd_data
);
777 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
778 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
779 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
781 stl_p(header
+0x218, initrd_addr
);
782 stl_p(header
+0x21c, initrd_size
);
785 /* load kernel and setup */
786 setup_size
= header
[0x1f1];
789 setup_size
= (setup_size
+1)*512;
790 kernel_size
-= setup_size
;
792 setup
= g_malloc(setup_size
);
793 kernel
= g_malloc(kernel_size
);
794 fseek(f
, 0, SEEK_SET
);
795 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
796 fprintf(stderr
, "fread() failed\n");
799 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
800 fprintf(stderr
, "fread() failed\n");
804 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
806 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
807 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
808 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
810 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
811 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
812 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
814 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
815 option_rom
[nb_option_roms
].bootindex
= 0;
819 #define NE2000_NB_MAX 6
821 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
823 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
825 static const int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
826 static const int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
828 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
830 static int nb_ne2k
= 0;
832 if (nb_ne2k
== NE2000_NB_MAX
)
834 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
835 ne2000_irq
[nb_ne2k
], nd
);
839 DeviceState
*cpu_get_current_apic(void)
841 if (cpu_single_env
) {
842 return cpu_single_env
->apic_state
;
848 static DeviceState
*apic_init(void *env
, uint8_t apic_id
)
851 static int apic_mapped
;
853 if (kvm_irqchip_in_kernel()) {
854 dev
= qdev_create(NULL
, "kvm-apic");
855 } else if (xen_enabled()) {
856 dev
= qdev_create(NULL
, "xen-apic");
858 dev
= qdev_create(NULL
, "apic");
861 qdev_prop_set_uint8(dev
, "id", apic_id
);
862 qdev_prop_set_ptr(dev
, "cpu_env", env
);
863 qdev_init_nofail(dev
);
865 /* XXX: mapping more APICs at the same memory location */
866 if (apic_mapped
== 0) {
867 /* NOTE: the APIC is directly connected to the CPU - it is not
868 on the global memory bus. */
869 /* XXX: what if the base changes? */
870 sysbus_mmio_map(sysbus_from_qdev(dev
), 0, MSI_ADDR_BASE
);
877 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
879 CPUX86State
*s
= opaque
;
882 cpu_interrupt(s
, CPU_INTERRUPT_SMI
);
886 static X86CPU
*pc_new_cpu(const char *cpu_model
)
891 cpu
= cpu_x86_init(cpu_model
);
893 fprintf(stderr
, "Unable to find x86 CPU definition\n");
897 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
898 env
->apic_state
= apic_init(env
, env
->cpuid_apic_id
);
904 void pc_cpus_init(const char *cpu_model
)
909 if (cpu_model
== NULL
) {
911 cpu_model
= "qemu64";
913 cpu_model
= "qemu32";
917 for(i
= 0; i
< smp_cpus
; i
++) {
918 pc_new_cpu(cpu_model
);
922 void *pc_memory_init(MemoryRegion
*system_memory
,
923 const char *kernel_filename
,
924 const char *kernel_cmdline
,
925 const char *initrd_filename
,
926 ram_addr_t below_4g_mem_size
,
927 ram_addr_t above_4g_mem_size
,
928 MemoryRegion
*rom_memory
,
929 MemoryRegion
**ram_memory
)
932 MemoryRegion
*ram
, *option_rom_mr
;
933 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
936 linux_boot
= (kernel_filename
!= NULL
);
938 /* Allocate RAM. We allocate it as a single memory region and use
939 * aliases to address portions of it, mostly for backwards compatibility
940 * with older qemus that used qemu_ram_alloc().
942 ram
= g_malloc(sizeof(*ram
));
943 memory_region_init_ram(ram
, "pc.ram",
944 below_4g_mem_size
+ above_4g_mem_size
);
945 vmstate_register_ram_global(ram
);
947 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
948 memory_region_init_alias(ram_below_4g
, "ram-below-4g", ram
,
949 0, below_4g_mem_size
);
950 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
951 if (above_4g_mem_size
> 0) {
952 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
953 memory_region_init_alias(ram_above_4g
, "ram-above-4g", ram
,
954 below_4g_mem_size
, above_4g_mem_size
);
955 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
960 /* Initialize PC system firmware */
961 pc_system_firmware_init(rom_memory
);
963 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
964 memory_region_init_ram(option_rom_mr
, "pc.rom", PC_ROM_SIZE
);
965 vmstate_register_ram_global(option_rom_mr
);
966 memory_region_add_subregion_overlap(rom_memory
,
971 fw_cfg
= bochs_bios_init();
975 load_linux(fw_cfg
, kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
978 for (i
= 0; i
< nb_option_roms
; i
++) {
979 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
984 qemu_irq
*pc_allocate_cpu_irq(void)
986 return qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
989 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
991 DeviceState
*dev
= NULL
;
994 PCIDevice
*pcidev
= pci_vga_init(pci_bus
);
995 dev
= pcidev
? &pcidev
->qdev
: NULL
;
996 } else if (isa_bus
) {
997 ISADevice
*isadev
= isa_vga_init(isa_bus
);
998 dev
= isadev
? &isadev
->qdev
: NULL
;
1003 static void cpu_request_exit(void *opaque
, int irq
, int level
)
1005 CPUX86State
*env
= cpu_single_env
;
1012 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
1013 ISADevice
**rtc_state
,
1018 DriveInfo
*fd
[MAX_FD
];
1019 DeviceState
*hpet
= NULL
;
1020 int pit_isa_irq
= 0;
1021 qemu_irq pit_alt_irq
= NULL
;
1022 qemu_irq rtc_irq
= NULL
;
1024 ISADevice
*i8042
, *port92
, *vmmouse
, *pit
= NULL
;
1025 qemu_irq
*cpu_exit_irq
;
1027 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1029 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1032 * Check if an HPET shall be created.
1034 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1035 * when the HPET wants to take over. Thus we have to disable the latter.
1037 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1038 hpet
= sysbus_try_create_simple("hpet", HPET_BASE
, NULL
);
1041 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1042 sysbus_connect_irq(sysbus_from_qdev(hpet
), i
, gsi
[i
]);
1045 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1046 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1049 *rtc_state
= rtc_init(isa_bus
, 2000, rtc_irq
);
1051 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1053 if (!xen_enabled()) {
1054 if (kvm_irqchip_in_kernel()) {
1055 pit
= kvm_pit_init(isa_bus
, 0x40);
1057 pit
= pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1060 /* connect PIT to output control line of the HPET */
1061 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(&pit
->qdev
, 0));
1063 pcspk_init(isa_bus
, pit
);
1066 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1067 if (serial_hds
[i
]) {
1068 serial_isa_init(isa_bus
, i
, serial_hds
[i
]);
1072 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1073 if (parallel_hds
[i
]) {
1074 parallel_init(isa_bus
, i
, parallel_hds
[i
]);
1078 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1079 i8042
= isa_create_simple(isa_bus
, "i8042");
1080 i8042_setup_a20_line(i8042
, &a20_line
[0]);
1082 vmport_init(isa_bus
);
1083 vmmouse
= isa_try_create(isa_bus
, "vmmouse");
1088 qdev_prop_set_ptr(&vmmouse
->qdev
, "ps2_mouse", i8042
);
1089 qdev_init_nofail(&vmmouse
->qdev
);
1091 port92
= isa_create_simple(isa_bus
, "port92");
1092 port92_init(port92
, &a20_line
[1]);
1094 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
1095 DMA_init(0, cpu_exit_irq
);
1097 for(i
= 0; i
< MAX_FD
; i
++) {
1098 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1100 *floppy
= fdctrl_init_isa(isa_bus
, fd
);
1103 void pc_pci_device_init(PCIBus
*pci_bus
)
1108 max_bus
= drive_get_max_bus(IF_SCSI
);
1109 for (bus
= 0; bus
<= max_bus
; bus
++) {
1110 pci_create_simple(pci_bus
, -1, "lsi53c895a");