include/hw/virtio/virtio-gpu.h

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2.
  11  * See the COPYING file in the top-level directory.
  12  */
  13
  14 #ifndef HW_VIRTIO_GPU_H
  15 #define HW_VIRTIO_GPU_H
  16
  17 #include "qemu/queue.h"
  18 #include "ui/qemu-pixman.h"
  19 #include "ui/console.h"
  20 #include "hw/virtio/virtio.h"
  21 #include "qemu/log.h"
  22 #include "sysemu/vhost-user-backend.h"
  23
  24 #include "standard-headers/linux/virtio_gpu.h"
  25 #include "standard-headers/linux/virtio_ids.h"
  26 #include "qom/object.h"
  27
  28 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
  29 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass,
  30                     VIRTIO_GPU_BASE)
  31
  32 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
  33 OBJECT_DECLARE_TYPE(VirtIOGPU, VirtIOGPUClass, VIRTIO_GPU)
  34
  35 #define TYPE_VIRTIO_GPU_GL "virtio-gpu-gl-device"
  36 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL, VIRTIO_GPU_GL)
  37
  38 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
  39 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU)
  40
  41 #define TYPE_VIRTIO_GPU_RUTABAGA "virtio-gpu-rutabaga-device"
  42 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPURutabaga, VIRTIO_GPU_RUTABAGA)
  43
  44 struct virtio_gpu_simple_resource {
  45     uint32_t resource_id;
  46     uint32_t width;
  47     uint32_t height;
  48     uint32_t format;
  49     uint64_t *addrs;
  50     struct iovec *iov;
  51     unsigned int iov_cnt;
  52     uint32_t scanout_bitmask;
  53     pixman_image_t *image;
  54 #ifdef WIN32
  55     HANDLE handle;
  56 #endif
  57     uint64_t hostmem;
  58
  59     uint64_t blob_size;
  60     void *blob;
  61     int dmabuf_fd;
  62     uint8_t *remapped;
  63
  64     QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
  65 };
  66
  67 struct virtio_gpu_framebuffer {
  68     pixman_format_code_t format;
  69     uint32_t bytes_pp;
  70     uint32_t width, height;
  71     uint32_t stride;
  72     uint32_t offset;
  73 };
  74
  75 struct virtio_gpu_scanout {
  76     QemuConsole *con;
  77     DisplaySurface *ds;
  78     uint32_t width, height;
  79     int x, y;
  80     int invalidate;
  81     uint32_t resource_id;
  82     struct virtio_gpu_update_cursor cursor;
  83     QEMUCursor *current_cursor;
  84     struct virtio_gpu_framebuffer fb;
  85 };
  86
  87 struct virtio_gpu_requested_state {
  88     uint16_t width_mm, height_mm;
  89     uint32_t width, height;
  90     uint32_t refresh_rate;
  91     int x, y;
  92 };
  93
  94 enum virtio_gpu_base_conf_flags {
  95     VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
  96     VIRTIO_GPU_FLAG_STATS_ENABLED,
  97     VIRTIO_GPU_FLAG_EDID_ENABLED,
  98     VIRTIO_GPU_FLAG_DMABUF_ENABLED,
  99     VIRTIO_GPU_FLAG_BLOB_ENABLED,
 100     VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED,
 101     VIRTIO_GPU_FLAG_RUTABAGA_ENABLED,
 102 };
 103
 104 #define virtio_gpu_virgl_enabled(_cfg) \
 105     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
 106 #define virtio_gpu_stats_enabled(_cfg) \
 107     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
 108 #define virtio_gpu_edid_enabled(_cfg) \
 109     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
 110 #define virtio_gpu_dmabuf_enabled(_cfg) \
 111     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
 112 #define virtio_gpu_blob_enabled(_cfg) \
 113     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
 114 #define virtio_gpu_context_init_enabled(_cfg) \
 115     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED))
 116 #define virtio_gpu_rutabaga_enabled(_cfg) \
 117     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_RUTABAGA_ENABLED))
 118 #define virtio_gpu_hostmem_enabled(_cfg) \
 119     (_cfg.hostmem > 0)
 120
 121 struct virtio_gpu_base_conf {
 122     uint32_t max_outputs;
 123     uint32_t flags;
 124     uint32_t xres;
 125     uint32_t yres;
 126     uint64_t hostmem;
 127 };
 128
 129 struct virtio_gpu_ctrl_command {
 130     VirtQueueElement elem;
 131     VirtQueue *vq;
 132     struct virtio_gpu_ctrl_hdr cmd_hdr;
 133     uint32_t error;
 134     bool finished;
 135     QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
 136 };
 137
 138 struct VirtIOGPUBase {
 139     VirtIODevice parent_obj;
 140
 141     Error *migration_blocker;
 142
 143     struct virtio_gpu_base_conf conf;
 144     struct virtio_gpu_config virtio_config;
 145     const GraphicHwOps *hw_ops;
 146
 147     int renderer_blocked;
 148     int enable;
 149
 150     MemoryRegion hostmem;
 151
 152     struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
 153
 154     int enabled_output_bitmask;
 155     struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
 156 };
 157
 158 struct VirtIOGPUBaseClass {
 159     VirtioDeviceClass parent;
 160
 161     void (*gl_flushed)(VirtIOGPUBase *g);
 162 };
 163
 164 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf)                       \
 165     DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1),    \
 166     DEFINE_PROP_BIT("edid", _state, _conf.flags, \
 167                     VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
 168     DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1280), \
 169     DEFINE_PROP_UINT32("yres", _state, _conf.yres, 800)
 170
 171 typedef struct VGPUDMABuf {
 172     QemuDmaBuf buf;
 173     uint32_t scanout_id;
 174     QTAILQ_ENTRY(VGPUDMABuf) next;
 175 } VGPUDMABuf;
 176
 177 struct VirtIOGPU {
 178     VirtIOGPUBase parent_obj;
 179
 180     uint64_t conf_max_hostmem;
 181
 182     VirtQueue *ctrl_vq;
 183     VirtQueue *cursor_vq;
 184
 185     QEMUBH *ctrl_bh;
 186     QEMUBH *cursor_bh;
 187     QEMUBH *reset_bh;
 188     QemuCond reset_cond;
 189     bool reset_finished;
 190
 191     QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
 192     QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
 193     QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
 194
 195     uint64_t hostmem;
 196
 197     bool processing_cmdq;
 198     QEMUTimer *fence_poll;
 199     QEMUTimer *print_stats;
 200
 201     uint32_t inflight;
 202     struct {
 203         uint32_t max_inflight;
 204         uint32_t requests;
 205         uint32_t req_3d;
 206         uint32_t bytes_3d;
 207     } stats;
 208
 209     struct {
 210         QTAILQ_HEAD(, VGPUDMABuf) bufs;
 211         VGPUDMABuf *primary[VIRTIO_GPU_MAX_SCANOUTS];
 212     } dmabuf;
 213 };
 214
 215 struct VirtIOGPUClass {
 216     VirtIOGPUBaseClass parent;
 217
 218     void (*handle_ctrl)(VirtIODevice *vdev, VirtQueue *vq);
 219     void (*process_cmd)(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd);
 220     void (*update_cursor_data)(VirtIOGPU *g,
 221                                struct virtio_gpu_scanout *s,
 222                                uint32_t resource_id);
 223     void (*resource_destroy)(VirtIOGPU *g,
 224                              struct virtio_gpu_simple_resource *res,
 225                              Error **errp);
 226 };
 227
 228 struct VirtIOGPUGL {
 229     struct VirtIOGPU parent_obj;
 230
 231     bool renderer_inited;
 232     bool renderer_reset;
 233 };
 234
 235 struct VhostUserGPU {
 236     VirtIOGPUBase parent_obj;
 237
 238     VhostUserBackend *vhost;
 239     int vhost_gpu_fd; /* closed by the chardev */
 240     CharBackend vhost_chr;
 241     QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS];
 242     bool backend_blocked;
 243 };
 244
 245 #define MAX_SLOTS 4096
 246
 247 struct MemoryRegionInfo {
 248     int used;
 249     MemoryRegion mr;
 250     uint32_t resource_id;
 251 };
 252
 253 struct rutabaga;
 254
 255 struct VirtIOGPURutabaga {
 256     VirtIOGPU parent_obj;
 257     struct MemoryRegionInfo memory_regions[MAX_SLOTS];
 258     uint64_t capset_mask;
 259     char *wayland_socket_path;
 260     char *wsi;
 261     bool headless;
 262     uint32_t num_capsets;
 263     struct rutabaga *rutabaga;
 264 };
 265
 266 #define VIRTIO_GPU_FILL_CMD(out) do {                                   \
 267         size_t virtiogpufillcmd_s_ =                                    \
 268             iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
 269                        &out, sizeof(out));                              \
 270         if (virtiogpufillcmd_s_ != sizeof(out)) {                       \
 271             qemu_log_mask(LOG_GUEST_ERROR,                              \
 272                           "%s: command size incorrect %zu vs %zu\n",    \
 273                           __func__, virtiogpufillcmd_s_, sizeof(out));  \
 274             return;                                                     \
 275         }                                                               \
 276     } while (0)
 277
 278 /* virtio-gpu-base.c */
 279 bool virtio_gpu_base_device_realize(DeviceState *qdev,
 280                                     VirtIOHandleOutput ctrl_cb,
 281                                     VirtIOHandleOutput cursor_cb,
 282                                     Error **errp);
 283 void virtio_gpu_base_device_unrealize(DeviceState *qdev);
 284 void virtio_gpu_base_reset(VirtIOGPUBase *g);
 285 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
 286                         struct virtio_gpu_resp_display_info *dpy_info);
 287
 288 void virtio_gpu_base_generate_edid(VirtIOGPUBase *g, int scanout,
 289                                    struct virtio_gpu_resp_edid *edid);
 290 /* virtio-gpu.c */
 291 struct virtio_gpu_simple_resource *
 292 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
 293
 294 void virtio_gpu_ctrl_response(VirtIOGPU *g,
 295                               struct virtio_gpu_ctrl_command *cmd,
 296                               struct virtio_gpu_ctrl_hdr *resp,
 297                               size_t resp_len);
 298 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
 299                                      struct virtio_gpu_ctrl_command *cmd,
 300                                      enum virtio_gpu_ctrl_type type);
 301 void virtio_gpu_get_display_info(VirtIOGPU *g,
 302                                  struct virtio_gpu_ctrl_command *cmd);
 303 void virtio_gpu_get_edid(VirtIOGPU *g,
 304                          struct virtio_gpu_ctrl_command *cmd);
 305 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
 306                                   uint32_t nr_entries, uint32_t offset,
 307                                   struct virtio_gpu_ctrl_command *cmd,
 308                                   uint64_t **addr, struct iovec **iov,
 309                                   uint32_t *niov);
 310 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
 311                                     struct iovec *iov, uint32_t count);
 312 void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
 313                                 struct virtio_gpu_simple_resource *res);
 314 void virtio_gpu_process_cmdq(VirtIOGPU *g);
 315 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp);
 316 void virtio_gpu_reset(VirtIODevice *vdev);
 317 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd);
 318 void virtio_gpu_update_cursor_data(VirtIOGPU *g,
 319                                    struct virtio_gpu_scanout *s,
 320                                    uint32_t resource_id);
 321
 322 /* virtio-gpu-udmabuf.c */
 323 bool virtio_gpu_have_udmabuf(void);
 324 void virtio_gpu_init_udmabuf(struct virtio_gpu_simple_resource *res);
 325 void virtio_gpu_fini_udmabuf(struct virtio_gpu_simple_resource *res);
 326 int virtio_gpu_update_dmabuf(VirtIOGPU *g,
 327                              uint32_t scanout_id,
 328                              struct virtio_gpu_simple_resource *res,
 329                              struct virtio_gpu_framebuffer *fb,
 330                              struct virtio_gpu_rect *r);
 331
 332 /* virtio-gpu-3d.c */
 333 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 334                                   struct virtio_gpu_ctrl_command *cmd);
 335 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
 336 void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g);
 337 void virtio_gpu_virgl_reset(VirtIOGPU *g);
 338 int virtio_gpu_virgl_init(VirtIOGPU *g);
 339 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g);
 340
 341 #endif