4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qemu-version.h"
21 #include <sys/syscall.h>
22 #include <sys/resource.h>
24 #include "qapi/error.h"
26 #include "qemu/path.h"
27 #include "qemu/config-file.h"
28 #include "qemu/cutils.h"
29 #include "qemu/help_option.h"
31 #include "exec/exec-all.h"
33 #include "qemu/timer.h"
34 #include "qemu/envlist.h"
37 #include "trace/control.h"
38 #include "glib-compat.h"
43 static const char *filename
;
44 static const char *argv0
;
45 static int gdbstub_port
;
46 static envlist_t
*envlist
;
47 static const char *cpu_model
;
48 unsigned long mmap_min_addr
;
49 unsigned long guest_base
;
52 #define EXCP_DUMP(env, fmt, ...) \
54 CPUState *cs = ENV_GET_CPU(env); \
55 fprintf(stderr, fmt , ## __VA_ARGS__); \
56 cpu_dump_state(cs, stderr, fprintf, 0); \
57 if (qemu_log_separate()) { \
58 qemu_log(fmt, ## __VA_ARGS__); \
59 log_cpu_state(cs, 0); \
63 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
65 * When running 32-on-64 we should make sure we can fit all of the possible
66 * guest address space into a contiguous chunk of virtual host memory.
68 * This way we will never overlap with our own libraries or binaries or stack
69 * or anything else that QEMU maps.
71 # if defined(TARGET_MIPS) || defined(TARGET_NIOS2)
73 * MIPS only supports 31 bits of virtual address space for user space.
74 * Nios2 also only supports 31 bits.
76 unsigned long reserved_va
= 0x77000000;
78 unsigned long reserved_va
= 0xf7000000;
81 unsigned long reserved_va
;
84 static void usage(int exitcode
);
86 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
87 const char *qemu_uname_release
;
89 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
90 we allocate a bigger stack. Need a better solution, for example
91 by remapping the process stack directly at the right place */
92 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
94 void gemu_log(const char *fmt
, ...)
99 vfprintf(stderr
, fmt
, ap
);
103 #if defined(TARGET_I386)
104 int cpu_get_pic_interrupt(CPUX86State
*env
)
110 /***********************************************************/
111 /* Helper routines for implementing atomic operations. */
113 /* Make sure everything is in a consistent state for calling fork(). */
114 void fork_start(void)
117 qemu_mutex_lock(&tcg_ctx
.tb_ctx
.tb_lock
);
121 void fork_end(int child
)
123 mmap_fork_end(child
);
125 CPUState
*cpu
, *next_cpu
;
126 /* Child processes created by fork() only have a single thread.
127 Discard information about the parent threads. */
128 CPU_FOREACH_SAFE(cpu
, next_cpu
) {
129 if (cpu
!= thread_cpu
) {
130 QTAILQ_REMOVE(&cpus
, cpu
, node
);
133 qemu_mutex_init(&tcg_ctx
.tb_ctx
.tb_lock
);
134 qemu_init_cpu_list();
135 gdbserver_fork(thread_cpu
);
137 qemu_mutex_unlock(&tcg_ctx
.tb_ctx
.tb_lock
);
143 /***********************************************************/
144 /* CPUX86 core interface */
146 uint64_t cpu_get_tsc(CPUX86State
*env
)
148 return cpu_get_host_ticks();
151 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
156 e1
= (addr
<< 16) | (limit
& 0xffff);
157 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
164 static uint64_t *idt_table
;
166 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
167 uint64_t addr
, unsigned int sel
)
170 e1
= (addr
& 0xffff) | (sel
<< 16);
171 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
175 p
[2] = tswap32(addr
>> 32);
178 /* only dpl matters as we do only user space emulation */
179 static void set_idt(int n
, unsigned int dpl
)
181 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
184 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
185 uint32_t addr
, unsigned int sel
)
188 e1
= (addr
& 0xffff) | (sel
<< 16);
189 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
195 /* only dpl matters as we do only user space emulation */
196 static void set_idt(int n
, unsigned int dpl
)
198 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
202 void cpu_loop(CPUX86State
*env
)
204 CPUState
*cs
= CPU(x86_env_get_cpu(env
));
208 target_siginfo_t info
;
212 trapnr
= cpu_exec(cs
);
214 process_queued_cpu_work(cs
);
218 /* linux syscall from int $0x80 */
219 ret
= do_syscall(env
,
228 if (ret
== -TARGET_ERESTARTSYS
) {
230 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
231 env
->regs
[R_EAX
] = ret
;
236 /* linux syscall from syscall instruction */
237 ret
= do_syscall(env
,
246 if (ret
== -TARGET_ERESTARTSYS
) {
248 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
249 env
->regs
[R_EAX
] = ret
;
255 info
.si_signo
= TARGET_SIGBUS
;
257 info
.si_code
= TARGET_SI_KERNEL
;
258 info
._sifields
._sigfault
._addr
= 0;
259 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
262 /* XXX: potential problem if ABI32 */
263 #ifndef TARGET_X86_64
264 if (env
->eflags
& VM_MASK
) {
265 handle_vm86_fault(env
);
269 info
.si_signo
= TARGET_SIGSEGV
;
271 info
.si_code
= TARGET_SI_KERNEL
;
272 info
._sifields
._sigfault
._addr
= 0;
273 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
277 info
.si_signo
= TARGET_SIGSEGV
;
279 if (!(env
->error_code
& 1))
280 info
.si_code
= TARGET_SEGV_MAPERR
;
282 info
.si_code
= TARGET_SEGV_ACCERR
;
283 info
._sifields
._sigfault
._addr
= env
->cr
[2];
284 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
287 #ifndef TARGET_X86_64
288 if (env
->eflags
& VM_MASK
) {
289 handle_vm86_trap(env
, trapnr
);
293 /* division by zero */
294 info
.si_signo
= TARGET_SIGFPE
;
296 info
.si_code
= TARGET_FPE_INTDIV
;
297 info
._sifields
._sigfault
._addr
= env
->eip
;
298 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
303 #ifndef TARGET_X86_64
304 if (env
->eflags
& VM_MASK
) {
305 handle_vm86_trap(env
, trapnr
);
309 info
.si_signo
= TARGET_SIGTRAP
;
311 if (trapnr
== EXCP01_DB
) {
312 info
.si_code
= TARGET_TRAP_BRKPT
;
313 info
._sifields
._sigfault
._addr
= env
->eip
;
315 info
.si_code
= TARGET_SI_KERNEL
;
316 info
._sifields
._sigfault
._addr
= 0;
318 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
323 #ifndef TARGET_X86_64
324 if (env
->eflags
& VM_MASK
) {
325 handle_vm86_trap(env
, trapnr
);
329 info
.si_signo
= TARGET_SIGSEGV
;
331 info
.si_code
= TARGET_SI_KERNEL
;
332 info
._sifields
._sigfault
._addr
= 0;
333 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
337 info
.si_signo
= TARGET_SIGILL
;
339 info
.si_code
= TARGET_ILL_ILLOPN
;
340 info
._sifields
._sigfault
._addr
= env
->eip
;
341 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
344 /* just indicate that signals should be handled asap */
350 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
355 info
.si_code
= TARGET_TRAP_BRKPT
;
356 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
361 cpu_exec_step_atomic(cs
);
364 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
365 EXCP_DUMP(env
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
369 process_pending_signals(env
);
376 #define get_user_code_u32(x, gaddr, env) \
377 ({ abi_long __r = get_user_u32((x), (gaddr)); \
378 if (!__r && bswap_code(arm_sctlr_b(env))) { \
384 #define get_user_code_u16(x, gaddr, env) \
385 ({ abi_long __r = get_user_u16((x), (gaddr)); \
386 if (!__r && bswap_code(arm_sctlr_b(env))) { \
392 #define get_user_data_u32(x, gaddr, env) \
393 ({ abi_long __r = get_user_u32((x), (gaddr)); \
394 if (!__r && arm_cpu_bswap_data(env)) { \
400 #define get_user_data_u16(x, gaddr, env) \
401 ({ abi_long __r = get_user_u16((x), (gaddr)); \
402 if (!__r && arm_cpu_bswap_data(env)) { \
408 #define put_user_data_u32(x, gaddr, env) \
409 ({ typeof(x) __x = (x); \
410 if (arm_cpu_bswap_data(env)) { \
411 __x = bswap32(__x); \
413 put_user_u32(__x, (gaddr)); \
416 #define put_user_data_u16(x, gaddr, env) \
417 ({ typeof(x) __x = (x); \
418 if (arm_cpu_bswap_data(env)) { \
419 __x = bswap16(__x); \
421 put_user_u16(__x, (gaddr)); \
425 /* Commpage handling -- there is no commpage for AArch64 */
428 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
430 * r0 = pointer to oldval
431 * r1 = pointer to newval
432 * r2 = pointer to target value
435 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
436 * C set if *ptr was changed, clear if no exchange happened
438 * Note segv's in kernel helpers are a bit tricky, we can set the
439 * data address sensibly but the PC address is just the entry point.
441 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
443 uint64_t oldval
, newval
, val
;
445 target_siginfo_t info
;
447 /* Based on the 32 bit code in do_kernel_trap */
449 /* XXX: This only works between threads, not between processes.
450 It's probably possible to implement this with native host
451 operations. However things like ldrex/strex are much harder so
452 there's not much point trying. */
454 cpsr
= cpsr_read(env
);
457 if (get_user_u64(oldval
, env
->regs
[0])) {
458 env
->exception
.vaddress
= env
->regs
[0];
462 if (get_user_u64(newval
, env
->regs
[1])) {
463 env
->exception
.vaddress
= env
->regs
[1];
467 if (get_user_u64(val
, addr
)) {
468 env
->exception
.vaddress
= addr
;
475 if (put_user_u64(val
, addr
)) {
476 env
->exception
.vaddress
= addr
;
486 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
492 /* We get the PC of the entry address - which is as good as anything,
493 on a real kernel what you get depends on which mode it uses. */
494 info
.si_signo
= TARGET_SIGSEGV
;
496 /* XXX: check env->error_code */
497 info
.si_code
= TARGET_SEGV_MAPERR
;
498 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
499 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
502 /* Handle a jump to the kernel code page. */
504 do_kernel_trap(CPUARMState
*env
)
510 switch (env
->regs
[15]) {
511 case 0xffff0fa0: /* __kernel_memory_barrier */
512 /* ??? No-op. Will need to do better for SMP. */
514 case 0xffff0fc0: /* __kernel_cmpxchg */
515 /* XXX: This only works between threads, not between processes.
516 It's probably possible to implement this with native host
517 operations. However things like ldrex/strex are much harder so
518 there's not much point trying. */
520 cpsr
= cpsr_read(env
);
522 /* FIXME: This should SEGV if the access fails. */
523 if (get_user_u32(val
, addr
))
525 if (val
== env
->regs
[0]) {
527 /* FIXME: Check for segfaults. */
528 put_user_u32(val
, addr
);
535 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
538 case 0xffff0fe0: /* __kernel_get_tls */
539 env
->regs
[0] = cpu_get_tls(env
);
541 case 0xffff0f60: /* __kernel_cmpxchg64 */
542 arm_kernel_cmpxchg64_helper(env
);
548 /* Jump back to the caller. */
549 addr
= env
->regs
[14];
554 env
->regs
[15] = addr
;
559 void cpu_loop(CPUARMState
*env
)
561 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
563 unsigned int n
, insn
;
564 target_siginfo_t info
;
570 trapnr
= cpu_exec(cs
);
572 process_queued_cpu_work(cs
);
578 TaskState
*ts
= cs
->opaque
;
582 /* we handle the FPU emulation here, as Linux */
583 /* we get the opcode */
584 /* FIXME - what to do if get_user() fails? */
585 get_user_code_u32(opcode
, env
->regs
[15], env
);
587 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
588 if (rc
== 0) { /* illegal instruction */
589 info
.si_signo
= TARGET_SIGILL
;
591 info
.si_code
= TARGET_ILL_ILLOPN
;
592 info
._sifields
._sigfault
._addr
= env
->regs
[15];
593 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
594 } else if (rc
< 0) { /* FP exception */
597 /* translate softfloat flags to FPSR flags */
598 if (-rc
& float_flag_invalid
)
600 if (-rc
& float_flag_divbyzero
)
602 if (-rc
& float_flag_overflow
)
604 if (-rc
& float_flag_underflow
)
606 if (-rc
& float_flag_inexact
)
609 FPSR fpsr
= ts
->fpa
.fpsr
;
610 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
612 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
613 info
.si_signo
= TARGET_SIGFPE
;
616 /* ordered by priority, least first */
617 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
618 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
619 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
620 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
621 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
623 info
._sifields
._sigfault
._addr
= env
->regs
[15];
624 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
629 /* accumulate unenabled exceptions */
630 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
632 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
634 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
636 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
638 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
641 } else { /* everything OK */
652 if (trapnr
== EXCP_BKPT
) {
654 /* FIXME - what to do if get_user() fails? */
655 get_user_code_u16(insn
, env
->regs
[15], env
);
659 /* FIXME - what to do if get_user() fails? */
660 get_user_code_u32(insn
, env
->regs
[15], env
);
661 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
666 /* FIXME - what to do if get_user() fails? */
667 get_user_code_u16(insn
, env
->regs
[15] - 2, env
);
670 /* FIXME - what to do if get_user() fails? */
671 get_user_code_u32(insn
, env
->regs
[15] - 4, env
);
676 if (n
== ARM_NR_cacheflush
) {
678 } else if (n
== ARM_NR_semihosting
679 || n
== ARM_NR_thumb_semihosting
) {
680 env
->regs
[0] = do_arm_semihosting (env
);
681 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
683 if (env
->thumb
|| n
== 0) {
686 n
-= ARM_SYSCALL_BASE
;
689 if ( n
> ARM_NR_BASE
) {
691 case ARM_NR_cacheflush
:
695 cpu_set_tls(env
, env
->regs
[0]);
698 case ARM_NR_breakpoint
:
699 env
->regs
[15] -= env
->thumb
? 2 : 4;
702 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
704 env
->regs
[0] = -TARGET_ENOSYS
;
708 ret
= do_syscall(env
,
717 if (ret
== -TARGET_ERESTARTSYS
) {
718 env
->regs
[15] -= env
->thumb
? 2 : 4;
719 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
729 env
->regs
[0] = do_arm_semihosting(env
);
732 /* just indicate that signals should be handled asap */
734 case EXCP_PREFETCH_ABORT
:
735 case EXCP_DATA_ABORT
:
736 addr
= env
->exception
.vaddress
;
738 info
.si_signo
= TARGET_SIGSEGV
;
740 /* XXX: check env->error_code */
741 info
.si_code
= TARGET_SEGV_MAPERR
;
742 info
._sifields
._sigfault
._addr
= addr
;
743 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
751 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
756 info
.si_code
= TARGET_TRAP_BRKPT
;
757 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
761 case EXCP_KERNEL_TRAP
:
762 if (do_kernel_trap(env
))
766 /* nothing to do here for user-mode, just resume guest code */
769 cpu_exec_step_atomic(cs
);
773 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
776 process_pending_signals(env
);
782 /* AArch64 main loop */
783 void cpu_loop(CPUARMState
*env
)
785 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
788 target_siginfo_t info
;
792 trapnr
= cpu_exec(cs
);
794 process_queued_cpu_work(cs
);
798 ret
= do_syscall(env
,
807 if (ret
== -TARGET_ERESTARTSYS
) {
809 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
814 /* just indicate that signals should be handled asap */
817 info
.si_signo
= TARGET_SIGILL
;
819 info
.si_code
= TARGET_ILL_ILLOPN
;
820 info
._sifields
._sigfault
._addr
= env
->pc
;
821 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
823 case EXCP_PREFETCH_ABORT
:
824 case EXCP_DATA_ABORT
:
825 info
.si_signo
= TARGET_SIGSEGV
;
827 /* XXX: check env->error_code */
828 info
.si_code
= TARGET_SEGV_MAPERR
;
829 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
830 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
834 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
838 info
.si_code
= TARGET_TRAP_BRKPT
;
839 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
843 env
->xregs
[0] = do_arm_semihosting(env
);
846 /* nothing to do here for user-mode, just resume guest code */
849 cpu_exec_step_atomic(cs
);
852 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
855 process_pending_signals(env
);
856 /* Exception return on AArch64 always clears the exclusive monitor,
857 * so any return to running guest code implies this.
859 env
->exclusive_addr
= -1;
862 #endif /* ndef TARGET_ABI32 */
866 #ifdef TARGET_UNICORE32
868 void cpu_loop(CPUUniCore32State
*env
)
870 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
872 unsigned int n
, insn
;
873 target_siginfo_t info
;
877 trapnr
= cpu_exec(cs
);
879 process_queued_cpu_work(cs
);
885 get_user_u32(insn
, env
->regs
[31] - 4);
888 if (n
>= UC32_SYSCALL_BASE
) {
890 n
-= UC32_SYSCALL_BASE
;
891 if (n
== UC32_SYSCALL_NR_set_tls
) {
892 cpu_set_tls(env
, env
->regs
[0]);
895 abi_long ret
= do_syscall(env
,
904 if (ret
== -TARGET_ERESTARTSYS
) {
906 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
915 case UC32_EXCP_DTRAP
:
916 case UC32_EXCP_ITRAP
:
917 info
.si_signo
= TARGET_SIGSEGV
;
919 /* XXX: check env->error_code */
920 info
.si_code
= TARGET_SEGV_MAPERR
;
921 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
922 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
925 /* just indicate that signals should be handled asap */
931 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
935 info
.si_code
= TARGET_TRAP_BRKPT
;
936 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
941 cpu_exec_step_atomic(cs
);
946 process_pending_signals(env
);
950 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
956 #define SPARC64_STACK_BIAS 2047
960 /* WARNING: dealing with register windows _is_ complicated. More info
961 can be found at http://www.sics.se/~psm/sparcstack.html */
962 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
964 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
965 /* wrap handling : if cwp is on the last window, then we use the
966 registers 'after' the end */
967 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
968 index
+= 16 * env
->nwindows
;
972 /* save the register window 'cwp1' */
973 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
978 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
979 #ifdef TARGET_SPARC64
981 sp_ptr
+= SPARC64_STACK_BIAS
;
983 #if defined(DEBUG_WIN)
984 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
987 for(i
= 0; i
< 16; i
++) {
988 /* FIXME - what to do if put_user() fails? */
989 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
990 sp_ptr
+= sizeof(abi_ulong
);
994 static void save_window(CPUSPARCState
*env
)
996 #ifndef TARGET_SPARC64
997 unsigned int new_wim
;
998 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
999 ((1LL << env
->nwindows
) - 1);
1000 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1003 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1009 static void restore_window(CPUSPARCState
*env
)
1011 #ifndef TARGET_SPARC64
1012 unsigned int new_wim
;
1014 unsigned int i
, cwp1
;
1017 #ifndef TARGET_SPARC64
1018 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1019 ((1LL << env
->nwindows
) - 1);
1022 /* restore the invalid window */
1023 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1024 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1025 #ifdef TARGET_SPARC64
1027 sp_ptr
+= SPARC64_STACK_BIAS
;
1029 #if defined(DEBUG_WIN)
1030 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1033 for(i
= 0; i
< 16; i
++) {
1034 /* FIXME - what to do if get_user() fails? */
1035 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1036 sp_ptr
+= sizeof(abi_ulong
);
1038 #ifdef TARGET_SPARC64
1040 if (env
->cleanwin
< env
->nwindows
- 1)
1048 static void flush_windows(CPUSPARCState
*env
)
1054 /* if restore would invoke restore_window(), then we can stop */
1055 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1056 #ifndef TARGET_SPARC64
1057 if (env
->wim
& (1 << cwp1
))
1060 if (env
->canrestore
== 0)
1065 save_window_offset(env
, cwp1
);
1068 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1069 #ifndef TARGET_SPARC64
1070 /* set wim so that restore will reload the registers */
1071 env
->wim
= 1 << cwp1
;
1073 #if defined(DEBUG_WIN)
1074 printf("flush_windows: nb=%d\n", offset
- 1);
1078 void cpu_loop (CPUSPARCState
*env
)
1080 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1083 target_siginfo_t info
;
1087 trapnr
= cpu_exec(cs
);
1089 process_queued_cpu_work(cs
);
1091 /* Compute PSR before exposing state. */
1092 if (env
->cc_op
!= CC_OP_FLAGS
) {
1097 #ifndef TARGET_SPARC64
1104 ret
= do_syscall (env
, env
->gregs
[1],
1105 env
->regwptr
[0], env
->regwptr
[1],
1106 env
->regwptr
[2], env
->regwptr
[3],
1107 env
->regwptr
[4], env
->regwptr
[5],
1109 if (ret
== -TARGET_ERESTARTSYS
|| ret
== -TARGET_QEMU_ESIGRETURN
) {
1112 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1113 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1114 env
->xcc
|= PSR_CARRY
;
1116 env
->psr
|= PSR_CARRY
;
1120 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1121 env
->xcc
&= ~PSR_CARRY
;
1123 env
->psr
&= ~PSR_CARRY
;
1126 env
->regwptr
[0] = ret
;
1127 /* next instruction */
1129 env
->npc
= env
->npc
+ 4;
1131 case 0x83: /* flush windows */
1136 /* next instruction */
1138 env
->npc
= env
->npc
+ 4;
1140 #ifndef TARGET_SPARC64
1141 case TT_WIN_OVF
: /* window overflow */
1144 case TT_WIN_UNF
: /* window underflow */
1145 restore_window(env
);
1150 info
.si_signo
= TARGET_SIGSEGV
;
1152 /* XXX: check env->error_code */
1153 info
.si_code
= TARGET_SEGV_MAPERR
;
1154 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1155 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1159 case TT_SPILL
: /* window overflow */
1162 case TT_FILL
: /* window underflow */
1163 restore_window(env
);
1168 info
.si_signo
= TARGET_SIGSEGV
;
1170 /* XXX: check env->error_code */
1171 info
.si_code
= TARGET_SEGV_MAPERR
;
1172 if (trapnr
== TT_DFAULT
)
1173 info
._sifields
._sigfault
._addr
= env
->dmmu
.mmuregs
[4];
1175 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1176 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1179 #ifndef TARGET_ABI32
1182 sparc64_get_context(env
);
1186 sparc64_set_context(env
);
1190 case EXCP_INTERRUPT
:
1191 /* just indicate that signals should be handled asap */
1195 info
.si_signo
= TARGET_SIGILL
;
1197 info
.si_code
= TARGET_ILL_ILLOPC
;
1198 info
._sifields
._sigfault
._addr
= env
->pc
;
1199 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1206 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1209 info
.si_signo
= sig
;
1211 info
.si_code
= TARGET_TRAP_BRKPT
;
1212 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1217 cpu_exec_step_atomic(cs
);
1220 printf ("Unhandled trap: 0x%x\n", trapnr
);
1221 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1224 process_pending_signals (env
);
1231 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1233 return cpu_get_host_ticks();
1236 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1238 return cpu_ppc_get_tb(env
);
1241 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1243 return cpu_ppc_get_tb(env
) >> 32;
1246 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1248 return cpu_ppc_get_tb(env
);
1251 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1253 return cpu_ppc_get_tb(env
) >> 32;
1256 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1257 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1259 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1261 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1264 /* XXX: to be fixed */
1265 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1270 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1275 static int do_store_exclusive(CPUPPCState
*env
)
1278 target_ulong page_addr
;
1279 target_ulong val
, val2
__attribute__((unused
)) = 0;
1283 addr
= env
->reserve_ea
;
1284 page_addr
= addr
& TARGET_PAGE_MASK
;
1287 flags
= page_get_flags(page_addr
);
1288 if ((flags
& PAGE_READ
) == 0) {
1291 int reg
= env
->reserve_info
& 0x1f;
1292 int size
= env
->reserve_info
>> 5;
1295 if (addr
== env
->reserve_addr
) {
1297 case 1: segv
= get_user_u8(val
, addr
); break;
1298 case 2: segv
= get_user_u16(val
, addr
); break;
1299 case 4: segv
= get_user_u32(val
, addr
); break;
1300 #if defined(TARGET_PPC64)
1301 case 8: segv
= get_user_u64(val
, addr
); break;
1303 segv
= get_user_u64(val
, addr
);
1305 segv
= get_user_u64(val2
, addr
+ 8);
1312 if (!segv
&& val
== env
->reserve_val
) {
1313 val
= env
->gpr
[reg
];
1315 case 1: segv
= put_user_u8(val
, addr
); break;
1316 case 2: segv
= put_user_u16(val
, addr
); break;
1317 case 4: segv
= put_user_u32(val
, addr
); break;
1318 #if defined(TARGET_PPC64)
1319 case 8: segv
= put_user_u64(val
, addr
); break;
1321 if (val2
== env
->reserve_val2
) {
1324 val
= env
->gpr
[reg
+1];
1326 val2
= env
->gpr
[reg
+1];
1328 segv
= put_user_u64(val
, addr
);
1330 segv
= put_user_u64(val2
, addr
+ 8);
1343 env
->crf
[0] = (stored
<< 1) | xer_so
;
1344 env
->reserve_addr
= (target_ulong
)-1;
1354 void cpu_loop(CPUPPCState
*env
)
1356 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1357 target_siginfo_t info
;
1363 trapnr
= cpu_exec(cs
);
1365 process_queued_cpu_work(cs
);
1368 case POWERPC_EXCP_NONE
:
1371 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1372 cpu_abort(cs
, "Critical interrupt while in user mode. "
1375 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1376 cpu_abort(cs
, "Machine check exception while in user mode. "
1379 case POWERPC_EXCP_DSI
: /* Data storage exception */
1380 /* XXX: check this. Seems bugged */
1381 switch (env
->error_code
& 0xFF000000) {
1384 info
.si_signo
= TARGET_SIGSEGV
;
1386 info
.si_code
= TARGET_SEGV_MAPERR
;
1389 info
.si_signo
= TARGET_SIGILL
;
1391 info
.si_code
= TARGET_ILL_ILLADR
;
1394 info
.si_signo
= TARGET_SIGSEGV
;
1396 info
.si_code
= TARGET_SEGV_ACCERR
;
1399 /* Let's send a regular segfault... */
1400 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1402 info
.si_signo
= TARGET_SIGSEGV
;
1404 info
.si_code
= TARGET_SEGV_MAPERR
;
1407 info
._sifields
._sigfault
._addr
= env
->nip
;
1408 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1410 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1411 /* XXX: check this */
1412 switch (env
->error_code
& 0xFF000000) {
1414 info
.si_signo
= TARGET_SIGSEGV
;
1416 info
.si_code
= TARGET_SEGV_MAPERR
;
1420 info
.si_signo
= TARGET_SIGSEGV
;
1422 info
.si_code
= TARGET_SEGV_ACCERR
;
1425 /* Let's send a regular segfault... */
1426 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1428 info
.si_signo
= TARGET_SIGSEGV
;
1430 info
.si_code
= TARGET_SEGV_MAPERR
;
1433 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1434 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1436 case POWERPC_EXCP_EXTERNAL
: /* External input */
1437 cpu_abort(cs
, "External interrupt while in user mode. "
1440 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1441 /* XXX: check this */
1442 info
.si_signo
= TARGET_SIGBUS
;
1444 info
.si_code
= TARGET_BUS_ADRALN
;
1445 info
._sifields
._sigfault
._addr
= env
->nip
;
1446 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1448 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1449 case POWERPC_EXCP_HV_EMU
: /* HV emulation */
1450 /* XXX: check this */
1451 switch (env
->error_code
& ~0xF) {
1452 case POWERPC_EXCP_FP
:
1453 info
.si_signo
= TARGET_SIGFPE
;
1455 switch (env
->error_code
& 0xF) {
1456 case POWERPC_EXCP_FP_OX
:
1457 info
.si_code
= TARGET_FPE_FLTOVF
;
1459 case POWERPC_EXCP_FP_UX
:
1460 info
.si_code
= TARGET_FPE_FLTUND
;
1462 case POWERPC_EXCP_FP_ZX
:
1463 case POWERPC_EXCP_FP_VXZDZ
:
1464 info
.si_code
= TARGET_FPE_FLTDIV
;
1466 case POWERPC_EXCP_FP_XX
:
1467 info
.si_code
= TARGET_FPE_FLTRES
;
1469 case POWERPC_EXCP_FP_VXSOFT
:
1470 info
.si_code
= TARGET_FPE_FLTINV
;
1472 case POWERPC_EXCP_FP_VXSNAN
:
1473 case POWERPC_EXCP_FP_VXISI
:
1474 case POWERPC_EXCP_FP_VXIDI
:
1475 case POWERPC_EXCP_FP_VXIMZ
:
1476 case POWERPC_EXCP_FP_VXVC
:
1477 case POWERPC_EXCP_FP_VXSQRT
:
1478 case POWERPC_EXCP_FP_VXCVI
:
1479 info
.si_code
= TARGET_FPE_FLTSUB
;
1482 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1487 case POWERPC_EXCP_INVAL
:
1488 info
.si_signo
= TARGET_SIGILL
;
1490 switch (env
->error_code
& 0xF) {
1491 case POWERPC_EXCP_INVAL_INVAL
:
1492 info
.si_code
= TARGET_ILL_ILLOPC
;
1494 case POWERPC_EXCP_INVAL_LSWX
:
1495 info
.si_code
= TARGET_ILL_ILLOPN
;
1497 case POWERPC_EXCP_INVAL_SPR
:
1498 info
.si_code
= TARGET_ILL_PRVREG
;
1500 case POWERPC_EXCP_INVAL_FP
:
1501 info
.si_code
= TARGET_ILL_COPROC
;
1504 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1505 env
->error_code
& 0xF);
1506 info
.si_code
= TARGET_ILL_ILLADR
;
1510 case POWERPC_EXCP_PRIV
:
1511 info
.si_signo
= TARGET_SIGILL
;
1513 switch (env
->error_code
& 0xF) {
1514 case POWERPC_EXCP_PRIV_OPC
:
1515 info
.si_code
= TARGET_ILL_PRVOPC
;
1517 case POWERPC_EXCP_PRIV_REG
:
1518 info
.si_code
= TARGET_ILL_PRVREG
;
1521 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1522 env
->error_code
& 0xF);
1523 info
.si_code
= TARGET_ILL_PRVOPC
;
1527 case POWERPC_EXCP_TRAP
:
1528 cpu_abort(cs
, "Tried to call a TRAP\n");
1531 /* Should not happen ! */
1532 cpu_abort(cs
, "Unknown program exception (%02x)\n",
1536 info
._sifields
._sigfault
._addr
= env
->nip
;
1537 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1539 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1540 info
.si_signo
= TARGET_SIGILL
;
1542 info
.si_code
= TARGET_ILL_COPROC
;
1543 info
._sifields
._sigfault
._addr
= env
->nip
;
1544 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1546 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1547 cpu_abort(cs
, "Syscall exception while in user mode. "
1550 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1551 info
.si_signo
= TARGET_SIGILL
;
1553 info
.si_code
= TARGET_ILL_COPROC
;
1554 info
._sifields
._sigfault
._addr
= env
->nip
;
1555 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1557 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1558 cpu_abort(cs
, "Decrementer interrupt while in user mode. "
1561 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1562 cpu_abort(cs
, "Fix interval timer interrupt while in user mode. "
1565 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1566 cpu_abort(cs
, "Watchdog timer interrupt while in user mode. "
1569 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1570 cpu_abort(cs
, "Data TLB exception while in user mode. "
1573 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1574 cpu_abort(cs
, "Instruction TLB exception while in user mode. "
1577 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1578 info
.si_signo
= TARGET_SIGILL
;
1580 info
.si_code
= TARGET_ILL_COPROC
;
1581 info
._sifields
._sigfault
._addr
= env
->nip
;
1582 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1584 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1585 cpu_abort(cs
, "Embedded floating-point data IRQ not handled\n");
1587 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1588 cpu_abort(cs
, "Embedded floating-point round IRQ not handled\n");
1590 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1591 cpu_abort(cs
, "Performance monitor exception not handled\n");
1593 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1594 cpu_abort(cs
, "Doorbell interrupt while in user mode. "
1597 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1598 cpu_abort(cs
, "Doorbell critical interrupt while in user mode. "
1601 case POWERPC_EXCP_RESET
: /* System reset exception */
1602 cpu_abort(cs
, "Reset interrupt while in user mode. "
1605 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1606 cpu_abort(cs
, "Data segment exception while in user mode. "
1609 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1610 cpu_abort(cs
, "Instruction segment exception "
1611 "while in user mode. Aborting\n");
1613 /* PowerPC 64 with hypervisor mode support */
1614 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1615 cpu_abort(cs
, "Hypervisor decrementer interrupt "
1616 "while in user mode. Aborting\n");
1618 case POWERPC_EXCP_TRACE
: /* Trace exception */
1620 * we use this exception to emulate step-by-step execution mode.
1623 /* PowerPC 64 with hypervisor mode support */
1624 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1625 cpu_abort(cs
, "Hypervisor data storage exception "
1626 "while in user mode. Aborting\n");
1628 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1629 cpu_abort(cs
, "Hypervisor instruction storage exception "
1630 "while in user mode. Aborting\n");
1632 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1633 cpu_abort(cs
, "Hypervisor data segment exception "
1634 "while in user mode. Aborting\n");
1636 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1637 cpu_abort(cs
, "Hypervisor instruction segment exception "
1638 "while in user mode. Aborting\n");
1640 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1641 info
.si_signo
= TARGET_SIGILL
;
1643 info
.si_code
= TARGET_ILL_COPROC
;
1644 info
._sifields
._sigfault
._addr
= env
->nip
;
1645 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1647 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1648 cpu_abort(cs
, "Programmable interval timer interrupt "
1649 "while in user mode. Aborting\n");
1651 case POWERPC_EXCP_IO
: /* IO error exception */
1652 cpu_abort(cs
, "IO error exception while in user mode. "
1655 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1656 cpu_abort(cs
, "Run mode exception while in user mode. "
1659 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1660 cpu_abort(cs
, "Emulation trap exception not handled\n");
1662 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1663 cpu_abort(cs
, "Instruction fetch TLB exception "
1664 "while in user-mode. Aborting");
1666 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1667 cpu_abort(cs
, "Data load TLB exception while in user-mode. "
1670 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1671 cpu_abort(cs
, "Data store TLB exception while in user-mode. "
1674 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1675 cpu_abort(cs
, "Floating-point assist exception not handled\n");
1677 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1678 cpu_abort(cs
, "Instruction address breakpoint exception "
1681 case POWERPC_EXCP_SMI
: /* System management interrupt */
1682 cpu_abort(cs
, "System management interrupt while in user mode. "
1685 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1686 cpu_abort(cs
, "Thermal interrupt interrupt while in user mode. "
1689 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1690 cpu_abort(cs
, "Performance monitor exception not handled\n");
1692 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1693 cpu_abort(cs
, "Vector assist exception not handled\n");
1695 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1696 cpu_abort(cs
, "Soft patch exception not handled\n");
1698 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1699 cpu_abort(cs
, "Maintenance exception while in user mode. "
1702 case POWERPC_EXCP_STOP
: /* stop translation */
1703 /* We did invalidate the instruction cache. Go on */
1705 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1706 /* We just stopped because of a branch. Go on */
1708 case POWERPC_EXCP_SYSCALL_USER
:
1709 /* system call in user-mode emulation */
1711 * PPC ABI uses overflow flag in cr0 to signal an error
1714 env
->crf
[0] &= ~0x1;
1716 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1717 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1719 if (ret
== -TARGET_ERESTARTSYS
) {
1723 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1724 /* Returning from a successful sigreturn syscall.
1725 Avoid corrupting register state. */
1728 if (ret
> (target_ulong
)(-515)) {
1734 case POWERPC_EXCP_STCX
:
1735 if (do_store_exclusive(env
)) {
1736 info
.si_signo
= TARGET_SIGSEGV
;
1738 info
.si_code
= TARGET_SEGV_MAPERR
;
1739 info
._sifields
._sigfault
._addr
= env
->nip
;
1740 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1747 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1749 info
.si_signo
= sig
;
1751 info
.si_code
= TARGET_TRAP_BRKPT
;
1752 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1756 case EXCP_INTERRUPT
:
1757 /* just indicate that signals should be handled asap */
1760 cpu_exec_step_atomic(cs
);
1763 cpu_abort(cs
, "Unknown exception 0x%x. Aborting\n", trapnr
);
1766 process_pending_signals(env
);
1773 # ifdef TARGET_ABI_MIPSO32
1774 # define MIPS_SYS(name, args) args,
1775 static const uint8_t mips_syscall_args
[] = {
1776 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1777 MIPS_SYS(sys_exit
, 1)
1778 MIPS_SYS(sys_fork
, 0)
1779 MIPS_SYS(sys_read
, 3)
1780 MIPS_SYS(sys_write
, 3)
1781 MIPS_SYS(sys_open
, 3) /* 4005 */
1782 MIPS_SYS(sys_close
, 1)
1783 MIPS_SYS(sys_waitpid
, 3)
1784 MIPS_SYS(sys_creat
, 2)
1785 MIPS_SYS(sys_link
, 2)
1786 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1787 MIPS_SYS(sys_execve
, 0)
1788 MIPS_SYS(sys_chdir
, 1)
1789 MIPS_SYS(sys_time
, 1)
1790 MIPS_SYS(sys_mknod
, 3)
1791 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1792 MIPS_SYS(sys_lchown
, 3)
1793 MIPS_SYS(sys_ni_syscall
, 0)
1794 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1795 MIPS_SYS(sys_lseek
, 3)
1796 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1797 MIPS_SYS(sys_mount
, 5)
1798 MIPS_SYS(sys_umount
, 1)
1799 MIPS_SYS(sys_setuid
, 1)
1800 MIPS_SYS(sys_getuid
, 0)
1801 MIPS_SYS(sys_stime
, 1) /* 4025 */
1802 MIPS_SYS(sys_ptrace
, 4)
1803 MIPS_SYS(sys_alarm
, 1)
1804 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1805 MIPS_SYS(sys_pause
, 0)
1806 MIPS_SYS(sys_utime
, 2) /* 4030 */
1807 MIPS_SYS(sys_ni_syscall
, 0)
1808 MIPS_SYS(sys_ni_syscall
, 0)
1809 MIPS_SYS(sys_access
, 2)
1810 MIPS_SYS(sys_nice
, 1)
1811 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1812 MIPS_SYS(sys_sync
, 0)
1813 MIPS_SYS(sys_kill
, 2)
1814 MIPS_SYS(sys_rename
, 2)
1815 MIPS_SYS(sys_mkdir
, 2)
1816 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1817 MIPS_SYS(sys_dup
, 1)
1818 MIPS_SYS(sys_pipe
, 0)
1819 MIPS_SYS(sys_times
, 1)
1820 MIPS_SYS(sys_ni_syscall
, 0)
1821 MIPS_SYS(sys_brk
, 1) /* 4045 */
1822 MIPS_SYS(sys_setgid
, 1)
1823 MIPS_SYS(sys_getgid
, 0)
1824 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1825 MIPS_SYS(sys_geteuid
, 0)
1826 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1827 MIPS_SYS(sys_acct
, 0)
1828 MIPS_SYS(sys_umount2
, 2)
1829 MIPS_SYS(sys_ni_syscall
, 0)
1830 MIPS_SYS(sys_ioctl
, 3)
1831 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1832 MIPS_SYS(sys_ni_syscall
, 2)
1833 MIPS_SYS(sys_setpgid
, 2)
1834 MIPS_SYS(sys_ni_syscall
, 0)
1835 MIPS_SYS(sys_olduname
, 1)
1836 MIPS_SYS(sys_umask
, 1) /* 4060 */
1837 MIPS_SYS(sys_chroot
, 1)
1838 MIPS_SYS(sys_ustat
, 2)
1839 MIPS_SYS(sys_dup2
, 2)
1840 MIPS_SYS(sys_getppid
, 0)
1841 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1842 MIPS_SYS(sys_setsid
, 0)
1843 MIPS_SYS(sys_sigaction
, 3)
1844 MIPS_SYS(sys_sgetmask
, 0)
1845 MIPS_SYS(sys_ssetmask
, 1)
1846 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1847 MIPS_SYS(sys_setregid
, 2)
1848 MIPS_SYS(sys_sigsuspend
, 0)
1849 MIPS_SYS(sys_sigpending
, 1)
1850 MIPS_SYS(sys_sethostname
, 2)
1851 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1852 MIPS_SYS(sys_getrlimit
, 2)
1853 MIPS_SYS(sys_getrusage
, 2)
1854 MIPS_SYS(sys_gettimeofday
, 2)
1855 MIPS_SYS(sys_settimeofday
, 2)
1856 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1857 MIPS_SYS(sys_setgroups
, 2)
1858 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1859 MIPS_SYS(sys_symlink
, 2)
1860 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1861 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1862 MIPS_SYS(sys_uselib
, 1)
1863 MIPS_SYS(sys_swapon
, 2)
1864 MIPS_SYS(sys_reboot
, 3)
1865 MIPS_SYS(old_readdir
, 3)
1866 MIPS_SYS(old_mmap
, 6) /* 4090 */
1867 MIPS_SYS(sys_munmap
, 2)
1868 MIPS_SYS(sys_truncate
, 2)
1869 MIPS_SYS(sys_ftruncate
, 2)
1870 MIPS_SYS(sys_fchmod
, 2)
1871 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1872 MIPS_SYS(sys_getpriority
, 2)
1873 MIPS_SYS(sys_setpriority
, 3)
1874 MIPS_SYS(sys_ni_syscall
, 0)
1875 MIPS_SYS(sys_statfs
, 2)
1876 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1877 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1878 MIPS_SYS(sys_socketcall
, 2)
1879 MIPS_SYS(sys_syslog
, 3)
1880 MIPS_SYS(sys_setitimer
, 3)
1881 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1882 MIPS_SYS(sys_newstat
, 2)
1883 MIPS_SYS(sys_newlstat
, 2)
1884 MIPS_SYS(sys_newfstat
, 2)
1885 MIPS_SYS(sys_uname
, 1)
1886 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1887 MIPS_SYS(sys_vhangup
, 0)
1888 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1889 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1890 MIPS_SYS(sys_wait4
, 4)
1891 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1892 MIPS_SYS(sys_sysinfo
, 1)
1893 MIPS_SYS(sys_ipc
, 6)
1894 MIPS_SYS(sys_fsync
, 1)
1895 MIPS_SYS(sys_sigreturn
, 0)
1896 MIPS_SYS(sys_clone
, 6) /* 4120 */
1897 MIPS_SYS(sys_setdomainname
, 2)
1898 MIPS_SYS(sys_newuname
, 1)
1899 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1900 MIPS_SYS(sys_adjtimex
, 1)
1901 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1902 MIPS_SYS(sys_sigprocmask
, 3)
1903 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1904 MIPS_SYS(sys_init_module
, 5)
1905 MIPS_SYS(sys_delete_module
, 1)
1906 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1907 MIPS_SYS(sys_quotactl
, 0)
1908 MIPS_SYS(sys_getpgid
, 1)
1909 MIPS_SYS(sys_fchdir
, 1)
1910 MIPS_SYS(sys_bdflush
, 2)
1911 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1912 MIPS_SYS(sys_personality
, 1)
1913 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1914 MIPS_SYS(sys_setfsuid
, 1)
1915 MIPS_SYS(sys_setfsgid
, 1)
1916 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1917 MIPS_SYS(sys_getdents
, 3)
1918 MIPS_SYS(sys_select
, 5)
1919 MIPS_SYS(sys_flock
, 2)
1920 MIPS_SYS(sys_msync
, 3)
1921 MIPS_SYS(sys_readv
, 3) /* 4145 */
1922 MIPS_SYS(sys_writev
, 3)
1923 MIPS_SYS(sys_cacheflush
, 3)
1924 MIPS_SYS(sys_cachectl
, 3)
1925 MIPS_SYS(sys_sysmips
, 4)
1926 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1927 MIPS_SYS(sys_getsid
, 1)
1928 MIPS_SYS(sys_fdatasync
, 0)
1929 MIPS_SYS(sys_sysctl
, 1)
1930 MIPS_SYS(sys_mlock
, 2)
1931 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1932 MIPS_SYS(sys_mlockall
, 1)
1933 MIPS_SYS(sys_munlockall
, 0)
1934 MIPS_SYS(sys_sched_setparam
, 2)
1935 MIPS_SYS(sys_sched_getparam
, 2)
1936 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1937 MIPS_SYS(sys_sched_getscheduler
, 1)
1938 MIPS_SYS(sys_sched_yield
, 0)
1939 MIPS_SYS(sys_sched_get_priority_max
, 1)
1940 MIPS_SYS(sys_sched_get_priority_min
, 1)
1941 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1942 MIPS_SYS(sys_nanosleep
, 2)
1943 MIPS_SYS(sys_mremap
, 5)
1944 MIPS_SYS(sys_accept
, 3)
1945 MIPS_SYS(sys_bind
, 3)
1946 MIPS_SYS(sys_connect
, 3) /* 4170 */
1947 MIPS_SYS(sys_getpeername
, 3)
1948 MIPS_SYS(sys_getsockname
, 3)
1949 MIPS_SYS(sys_getsockopt
, 5)
1950 MIPS_SYS(sys_listen
, 2)
1951 MIPS_SYS(sys_recv
, 4) /* 4175 */
1952 MIPS_SYS(sys_recvfrom
, 6)
1953 MIPS_SYS(sys_recvmsg
, 3)
1954 MIPS_SYS(sys_send
, 4)
1955 MIPS_SYS(sys_sendmsg
, 3)
1956 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1957 MIPS_SYS(sys_setsockopt
, 5)
1958 MIPS_SYS(sys_shutdown
, 2)
1959 MIPS_SYS(sys_socket
, 3)
1960 MIPS_SYS(sys_socketpair
, 4)
1961 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1962 MIPS_SYS(sys_getresuid
, 3)
1963 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1964 MIPS_SYS(sys_poll
, 3)
1965 MIPS_SYS(sys_nfsservctl
, 3)
1966 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1967 MIPS_SYS(sys_getresgid
, 3)
1968 MIPS_SYS(sys_prctl
, 5)
1969 MIPS_SYS(sys_rt_sigreturn
, 0)
1970 MIPS_SYS(sys_rt_sigaction
, 4)
1971 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1972 MIPS_SYS(sys_rt_sigpending
, 2)
1973 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1974 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1975 MIPS_SYS(sys_rt_sigsuspend
, 0)
1976 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1977 MIPS_SYS(sys_pwrite64
, 6)
1978 MIPS_SYS(sys_chown
, 3)
1979 MIPS_SYS(sys_getcwd
, 2)
1980 MIPS_SYS(sys_capget
, 2)
1981 MIPS_SYS(sys_capset
, 2) /* 4205 */
1982 MIPS_SYS(sys_sigaltstack
, 2)
1983 MIPS_SYS(sys_sendfile
, 4)
1984 MIPS_SYS(sys_ni_syscall
, 0)
1985 MIPS_SYS(sys_ni_syscall
, 0)
1986 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1987 MIPS_SYS(sys_truncate64
, 4)
1988 MIPS_SYS(sys_ftruncate64
, 4)
1989 MIPS_SYS(sys_stat64
, 2)
1990 MIPS_SYS(sys_lstat64
, 2)
1991 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1992 MIPS_SYS(sys_pivot_root
, 2)
1993 MIPS_SYS(sys_mincore
, 3)
1994 MIPS_SYS(sys_madvise
, 3)
1995 MIPS_SYS(sys_getdents64
, 3)
1996 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1997 MIPS_SYS(sys_ni_syscall
, 0)
1998 MIPS_SYS(sys_gettid
, 0)
1999 MIPS_SYS(sys_readahead
, 5)
2000 MIPS_SYS(sys_setxattr
, 5)
2001 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2002 MIPS_SYS(sys_fsetxattr
, 5)
2003 MIPS_SYS(sys_getxattr
, 4)
2004 MIPS_SYS(sys_lgetxattr
, 4)
2005 MIPS_SYS(sys_fgetxattr
, 4)
2006 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2007 MIPS_SYS(sys_llistxattr
, 3)
2008 MIPS_SYS(sys_flistxattr
, 3)
2009 MIPS_SYS(sys_removexattr
, 2)
2010 MIPS_SYS(sys_lremovexattr
, 2)
2011 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2012 MIPS_SYS(sys_tkill
, 2)
2013 MIPS_SYS(sys_sendfile64
, 5)
2014 MIPS_SYS(sys_futex
, 6)
2015 MIPS_SYS(sys_sched_setaffinity
, 3)
2016 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2017 MIPS_SYS(sys_io_setup
, 2)
2018 MIPS_SYS(sys_io_destroy
, 1)
2019 MIPS_SYS(sys_io_getevents
, 5)
2020 MIPS_SYS(sys_io_submit
, 3)
2021 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2022 MIPS_SYS(sys_exit_group
, 1)
2023 MIPS_SYS(sys_lookup_dcookie
, 3)
2024 MIPS_SYS(sys_epoll_create
, 1)
2025 MIPS_SYS(sys_epoll_ctl
, 4)
2026 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2027 MIPS_SYS(sys_remap_file_pages
, 5)
2028 MIPS_SYS(sys_set_tid_address
, 1)
2029 MIPS_SYS(sys_restart_syscall
, 0)
2030 MIPS_SYS(sys_fadvise64_64
, 7)
2031 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2032 MIPS_SYS(sys_fstatfs64
, 2)
2033 MIPS_SYS(sys_timer_create
, 3)
2034 MIPS_SYS(sys_timer_settime
, 4)
2035 MIPS_SYS(sys_timer_gettime
, 2)
2036 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2037 MIPS_SYS(sys_timer_delete
, 1)
2038 MIPS_SYS(sys_clock_settime
, 2)
2039 MIPS_SYS(sys_clock_gettime
, 2)
2040 MIPS_SYS(sys_clock_getres
, 2)
2041 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2042 MIPS_SYS(sys_tgkill
, 3)
2043 MIPS_SYS(sys_utimes
, 2)
2044 MIPS_SYS(sys_mbind
, 4)
2045 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2046 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2047 MIPS_SYS(sys_mq_open
, 4)
2048 MIPS_SYS(sys_mq_unlink
, 1)
2049 MIPS_SYS(sys_mq_timedsend
, 5)
2050 MIPS_SYS(sys_mq_timedreceive
, 5)
2051 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2052 MIPS_SYS(sys_mq_getsetattr
, 3)
2053 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2054 MIPS_SYS(sys_waitid
, 4)
2055 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2056 MIPS_SYS(sys_add_key
, 5)
2057 MIPS_SYS(sys_request_key
, 4)
2058 MIPS_SYS(sys_keyctl
, 5)
2059 MIPS_SYS(sys_set_thread_area
, 1)
2060 MIPS_SYS(sys_inotify_init
, 0)
2061 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2062 MIPS_SYS(sys_inotify_rm_watch
, 2)
2063 MIPS_SYS(sys_migrate_pages
, 4)
2064 MIPS_SYS(sys_openat
, 4)
2065 MIPS_SYS(sys_mkdirat
, 3)
2066 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2067 MIPS_SYS(sys_fchownat
, 5)
2068 MIPS_SYS(sys_futimesat
, 3)
2069 MIPS_SYS(sys_fstatat64
, 4)
2070 MIPS_SYS(sys_unlinkat
, 3)
2071 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2072 MIPS_SYS(sys_linkat
, 5)
2073 MIPS_SYS(sys_symlinkat
, 3)
2074 MIPS_SYS(sys_readlinkat
, 4)
2075 MIPS_SYS(sys_fchmodat
, 3)
2076 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2077 MIPS_SYS(sys_pselect6
, 6)
2078 MIPS_SYS(sys_ppoll
, 5)
2079 MIPS_SYS(sys_unshare
, 1)
2080 MIPS_SYS(sys_splice
, 6)
2081 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2082 MIPS_SYS(sys_tee
, 4)
2083 MIPS_SYS(sys_vmsplice
, 4)
2084 MIPS_SYS(sys_move_pages
, 6)
2085 MIPS_SYS(sys_set_robust_list
, 2)
2086 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2087 MIPS_SYS(sys_kexec_load
, 4)
2088 MIPS_SYS(sys_getcpu
, 3)
2089 MIPS_SYS(sys_epoll_pwait
, 6)
2090 MIPS_SYS(sys_ioprio_set
, 3)
2091 MIPS_SYS(sys_ioprio_get
, 2)
2092 MIPS_SYS(sys_utimensat
, 4)
2093 MIPS_SYS(sys_signalfd
, 3)
2094 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2095 MIPS_SYS(sys_eventfd
, 1)
2096 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2097 MIPS_SYS(sys_timerfd_create
, 2)
2098 MIPS_SYS(sys_timerfd_gettime
, 2)
2099 MIPS_SYS(sys_timerfd_settime
, 4)
2100 MIPS_SYS(sys_signalfd4
, 4)
2101 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2102 MIPS_SYS(sys_epoll_create1
, 1)
2103 MIPS_SYS(sys_dup3
, 3)
2104 MIPS_SYS(sys_pipe2
, 2)
2105 MIPS_SYS(sys_inotify_init1
, 1)
2106 MIPS_SYS(sys_preadv
, 5) /* 4330 */
2107 MIPS_SYS(sys_pwritev
, 5)
2108 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2109 MIPS_SYS(sys_perf_event_open
, 5)
2110 MIPS_SYS(sys_accept4
, 4)
2111 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2112 MIPS_SYS(sys_fanotify_init
, 2)
2113 MIPS_SYS(sys_fanotify_mark
, 6)
2114 MIPS_SYS(sys_prlimit64
, 4)
2115 MIPS_SYS(sys_name_to_handle_at
, 5)
2116 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2117 MIPS_SYS(sys_clock_adjtime
, 2)
2118 MIPS_SYS(sys_syncfs
, 1)
2119 MIPS_SYS(sys_sendmmsg
, 4)
2120 MIPS_SYS(sys_setns
, 2)
2121 MIPS_SYS(sys_process_vm_readv
, 6) /* 345 */
2122 MIPS_SYS(sys_process_vm_writev
, 6)
2123 MIPS_SYS(sys_kcmp
, 5)
2124 MIPS_SYS(sys_finit_module
, 3)
2125 MIPS_SYS(sys_sched_setattr
, 2)
2126 MIPS_SYS(sys_sched_getattr
, 3) /* 350 */
2127 MIPS_SYS(sys_renameat2
, 5)
2128 MIPS_SYS(sys_seccomp
, 3)
2129 MIPS_SYS(sys_getrandom
, 3)
2130 MIPS_SYS(sys_memfd_create
, 2)
2131 MIPS_SYS(sys_bpf
, 3) /* 355 */
2132 MIPS_SYS(sys_execveat
, 5)
2133 MIPS_SYS(sys_userfaultfd
, 1)
2134 MIPS_SYS(sys_membarrier
, 2)
2135 MIPS_SYS(sys_mlock2
, 3)
2136 MIPS_SYS(sys_copy_file_range
, 6) /* 360 */
2137 MIPS_SYS(sys_preadv2
, 6)
2138 MIPS_SYS(sys_pwritev2
, 6)
2143 static int do_store_exclusive(CPUMIPSState
*env
)
2146 target_ulong page_addr
;
2154 page_addr
= addr
& TARGET_PAGE_MASK
;
2157 flags
= page_get_flags(page_addr
);
2158 if ((flags
& PAGE_READ
) == 0) {
2161 reg
= env
->llreg
& 0x1f;
2162 d
= (env
->llreg
& 0x20) != 0;
2164 segv
= get_user_s64(val
, addr
);
2166 segv
= get_user_s32(val
, addr
);
2169 if (val
!= env
->llval
) {
2170 env
->active_tc
.gpr
[reg
] = 0;
2173 segv
= put_user_u64(env
->llnewval
, addr
);
2175 segv
= put_user_u32(env
->llnewval
, addr
);
2178 env
->active_tc
.gpr
[reg
] = 1;
2185 env
->active_tc
.PC
+= 4;
2198 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2206 info
->si_signo
= TARGET_SIGFPE
;
2208 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2209 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2213 info
->si_signo
= TARGET_SIGTRAP
;
2215 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2223 void cpu_loop(CPUMIPSState
*env
)
2225 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2226 target_siginfo_t info
;
2229 # ifdef TARGET_ABI_MIPSO32
2230 unsigned int syscall_num
;
2235 trapnr
= cpu_exec(cs
);
2237 process_queued_cpu_work(cs
);
2241 env
->active_tc
.PC
+= 4;
2242 # ifdef TARGET_ABI_MIPSO32
2243 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2244 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2245 ret
= -TARGET_ENOSYS
;
2249 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2251 nb_args
= mips_syscall_args
[syscall_num
];
2252 sp_reg
= env
->active_tc
.gpr
[29];
2254 /* these arguments are taken from the stack */
2256 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2260 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2264 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2268 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2274 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2275 env
->active_tc
.gpr
[4],
2276 env
->active_tc
.gpr
[5],
2277 env
->active_tc
.gpr
[6],
2278 env
->active_tc
.gpr
[7],
2279 arg5
, arg6
, arg7
, arg8
);
2283 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2284 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2285 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2286 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2287 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2289 if (ret
== -TARGET_ERESTARTSYS
) {
2290 env
->active_tc
.PC
-= 4;
2293 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2294 /* Returning from a successful sigreturn syscall.
2295 Avoid clobbering register state. */
2298 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2299 env
->active_tc
.gpr
[7] = 1; /* error flag */
2302 env
->active_tc
.gpr
[7] = 0; /* error flag */
2304 env
->active_tc
.gpr
[2] = ret
;
2310 info
.si_signo
= TARGET_SIGSEGV
;
2312 /* XXX: check env->error_code */
2313 info
.si_code
= TARGET_SEGV_MAPERR
;
2314 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2315 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2319 info
.si_signo
= TARGET_SIGILL
;
2322 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2324 case EXCP_INTERRUPT
:
2325 /* just indicate that signals should be handled asap */
2331 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2334 info
.si_signo
= sig
;
2336 info
.si_code
= TARGET_TRAP_BRKPT
;
2337 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2342 if (do_store_exclusive(env
)) {
2343 info
.si_signo
= TARGET_SIGSEGV
;
2345 info
.si_code
= TARGET_SEGV_MAPERR
;
2346 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2347 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2351 info
.si_signo
= TARGET_SIGILL
;
2353 info
.si_code
= TARGET_ILL_ILLOPC
;
2354 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2356 /* The code below was inspired by the MIPS Linux kernel trap
2357 * handling code in arch/mips/kernel/traps.c.
2361 abi_ulong trap_instr
;
2364 if (env
->hflags
& MIPS_HFLAG_M16
) {
2365 if (env
->insn_flags
& ASE_MICROMIPS
) {
2366 /* microMIPS mode */
2367 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2372 if ((trap_instr
>> 10) == 0x11) {
2373 /* 16-bit instruction */
2374 code
= trap_instr
& 0xf;
2376 /* 32-bit instruction */
2379 ret
= get_user_u16(instr_lo
,
2380 env
->active_tc
.PC
+ 2);
2384 trap_instr
= (trap_instr
<< 16) | instr_lo
;
2385 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2386 /* Unfortunately, microMIPS also suffers from
2387 the old assembler bug... */
2388 if (code
>= (1 << 10)) {
2394 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2398 code
= (trap_instr
>> 6) & 0x3f;
2401 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2406 /* As described in the original Linux kernel code, the
2407 * below checks on 'code' are to work around an old
2410 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2411 if (code
>= (1 << 10)) {
2416 if (do_break(env
, &info
, code
) != 0) {
2423 abi_ulong trap_instr
;
2424 unsigned int code
= 0;
2426 if (env
->hflags
& MIPS_HFLAG_M16
) {
2427 /* microMIPS mode */
2430 ret
= get_user_u16(instr
[0], env
->active_tc
.PC
) ||
2431 get_user_u16(instr
[1], env
->active_tc
.PC
+ 2);
2433 trap_instr
= (instr
[0] << 16) | instr
[1];
2435 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2442 /* The immediate versions don't provide a code. */
2443 if (!(trap_instr
& 0xFC000000)) {
2444 if (env
->hflags
& MIPS_HFLAG_M16
) {
2445 /* microMIPS mode */
2446 code
= ((trap_instr
>> 12) & ((1 << 4) - 1));
2448 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2452 if (do_break(env
, &info
, code
) != 0) {
2458 cpu_exec_step_atomic(cs
);
2462 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
2465 process_pending_signals(env
);
2472 void cpu_loop(CPUNios2State
*env
)
2474 CPUState
*cs
= ENV_GET_CPU(env
);
2475 Nios2CPU
*cpu
= NIOS2_CPU(cs
);
2476 target_siginfo_t info
;
2477 int trapnr
, gdbsig
, ret
;
2481 trapnr
= cpu_exec(cs
);
2486 case EXCP_INTERRUPT
:
2487 /* just indicate that signals should be handled asap */
2490 if (env
->regs
[R_AT
] == 0) {
2492 qemu_log_mask(CPU_LOG_INT
, "\nSyscall\n");
2494 ret
= do_syscall(env
, env
->regs
[2],
2495 env
->regs
[4], env
->regs
[5], env
->regs
[6],
2496 env
->regs
[7], env
->regs
[8], env
->regs
[9],
2499 if (env
->regs
[2] == 0) { /* FIXME: syscall 0 workaround */
2503 env
->regs
[2] = abs(ret
);
2504 /* Return value is 0..4096 */
2505 env
->regs
[7] = (ret
> 0xfffffffffffff000ULL
);
2506 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2507 env
->regs
[CR_STATUS
] &= ~0x3;
2508 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2509 env
->regs
[R_PC
] += 4;
2512 qemu_log_mask(CPU_LOG_INT
, "\nTrap\n");
2514 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2515 env
->regs
[CR_STATUS
] &= ~0x3;
2516 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2517 env
->regs
[R_PC
] = cpu
->exception_addr
;
2519 gdbsig
= TARGET_SIGTRAP
;
2523 switch (env
->regs
[R_PC
]) {
2524 /*case 0x1000:*/ /* TODO:__kuser_helper_version */
2525 case 0x1004: /* __kuser_cmpxchg */
2527 if (env
->regs
[4] & 0x3) {
2530 ret
= get_user_u32(env
->regs
[2], env
->regs
[4]);
2535 env
->regs
[2] -= env
->regs
[5];
2536 if (env
->regs
[2] == 0) {
2537 put_user_u32(env
->regs
[6], env
->regs
[4]);
2540 env
->regs
[R_PC
] = env
->regs
[R_RA
];
2542 /*case 0x1040:*/ /* TODO:__kuser_sigtramp */
2546 info
.si_signo
= TARGET_SIGSEGV
;
2548 /* TODO: check env->error_code */
2549 info
.si_code
= TARGET_SEGV_MAPERR
;
2550 info
._sifields
._sigfault
._addr
= env
->regs
[R_PC
];
2551 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2555 EXCP_DUMP(env
, "\nqemu: unhandled CPU exception %#x - aborting\n",
2557 gdbsig
= TARGET_SIGILL
;
2561 gdb_handlesig(cs
, gdbsig
);
2562 if (gdbsig
!= TARGET_SIGTRAP
) {
2567 process_pending_signals(env
);
2571 #endif /* TARGET_NIOS2 */
2573 #ifdef TARGET_OPENRISC
2575 void cpu_loop(CPUOpenRISCState
*env
)
2577 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2580 target_siginfo_t info
;
2584 trapnr
= cpu_exec(cs
);
2586 process_queued_cpu_work(cs
);
2590 env
->pc
+= 4; /* 0xc00; */
2591 ret
= do_syscall(env
,
2592 env
->gpr
[11], /* return value */
2593 env
->gpr
[3], /* r3 - r7 are params */
2599 if (ret
== -TARGET_ERESTARTSYS
) {
2601 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2608 info
.si_signo
= TARGET_SIGSEGV
;
2610 info
.si_code
= TARGET_SEGV_MAPERR
;
2611 info
._sifields
._sigfault
._addr
= env
->pc
;
2612 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2615 info
.si_signo
= TARGET_SIGBUS
;
2617 info
.si_code
= TARGET_BUS_ADRALN
;
2618 info
._sifields
._sigfault
._addr
= env
->pc
;
2619 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2622 info
.si_signo
= TARGET_SIGILL
;
2624 info
.si_code
= TARGET_ILL_ILLOPC
;
2625 info
._sifields
._sigfault
._addr
= env
->pc
;
2626 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2629 info
.si_signo
= TARGET_SIGFPE
;
2632 info
._sifields
._sigfault
._addr
= env
->pc
;
2633 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2635 case EXCP_INTERRUPT
:
2636 /* We processed the pending cpu work above. */
2639 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2641 info
.si_signo
= trapnr
;
2643 info
.si_code
= TARGET_TRAP_BRKPT
;
2644 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2648 cpu_exec_step_atomic(cs
);
2651 g_assert_not_reached();
2653 process_pending_signals(env
);
2657 #endif /* TARGET_OPENRISC */
2660 void cpu_loop(CPUSH4State
*env
)
2662 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2664 target_siginfo_t info
;
2668 trapnr
= cpu_exec(cs
);
2670 process_queued_cpu_work(cs
);
2675 ret
= do_syscall(env
,
2684 if (ret
== -TARGET_ERESTARTSYS
) {
2686 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2687 env
->gregs
[0] = ret
;
2690 case EXCP_INTERRUPT
:
2691 /* just indicate that signals should be handled asap */
2697 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2700 info
.si_signo
= sig
;
2702 info
.si_code
= TARGET_TRAP_BRKPT
;
2703 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2709 info
.si_signo
= TARGET_SIGSEGV
;
2711 info
.si_code
= TARGET_SEGV_MAPERR
;
2712 info
._sifields
._sigfault
._addr
= env
->tea
;
2713 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2717 cpu_exec_step_atomic(cs
);
2720 printf ("Unhandled trap: 0x%x\n", trapnr
);
2721 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2724 process_pending_signals (env
);
2730 void cpu_loop(CPUCRISState
*env
)
2732 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2734 target_siginfo_t info
;
2738 trapnr
= cpu_exec(cs
);
2740 process_queued_cpu_work(cs
);
2745 info
.si_signo
= TARGET_SIGSEGV
;
2747 /* XXX: check env->error_code */
2748 info
.si_code
= TARGET_SEGV_MAPERR
;
2749 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2750 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2753 case EXCP_INTERRUPT
:
2754 /* just indicate that signals should be handled asap */
2757 ret
= do_syscall(env
,
2766 if (ret
== -TARGET_ERESTARTSYS
) {
2768 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2769 env
->regs
[10] = ret
;
2776 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2779 info
.si_signo
= sig
;
2781 info
.si_code
= TARGET_TRAP_BRKPT
;
2782 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2787 cpu_exec_step_atomic(cs
);
2790 printf ("Unhandled trap: 0x%x\n", trapnr
);
2791 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2794 process_pending_signals (env
);
2799 #ifdef TARGET_MICROBLAZE
2800 void cpu_loop(CPUMBState
*env
)
2802 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2804 target_siginfo_t info
;
2808 trapnr
= cpu_exec(cs
);
2810 process_queued_cpu_work(cs
);
2815 info
.si_signo
= TARGET_SIGSEGV
;
2817 /* XXX: check env->error_code */
2818 info
.si_code
= TARGET_SEGV_MAPERR
;
2819 info
._sifields
._sigfault
._addr
= 0;
2820 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2823 case EXCP_INTERRUPT
:
2824 /* just indicate that signals should be handled asap */
2827 /* Return address is 4 bytes after the call. */
2829 env
->sregs
[SR_PC
] = env
->regs
[14];
2830 ret
= do_syscall(env
,
2839 if (ret
== -TARGET_ERESTARTSYS
) {
2840 /* Wind back to before the syscall. */
2841 env
->sregs
[SR_PC
] -= 4;
2842 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2845 /* All syscall exits result in guest r14 being equal to the
2846 * PC we return to, because the kernel syscall exit "rtbd" does
2847 * this. (This is true even for sigreturn(); note that r14 is
2848 * not a userspace-usable register, as the kernel may clobber it
2851 env
->regs
[14] = env
->sregs
[SR_PC
];
2854 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2855 if (env
->iflags
& D_FLAG
) {
2856 env
->sregs
[SR_ESR
] |= 1 << 12;
2857 env
->sregs
[SR_PC
] -= 4;
2858 /* FIXME: if branch was immed, replay the imm as well. */
2861 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2863 switch (env
->sregs
[SR_ESR
] & 31) {
2864 case ESR_EC_DIVZERO
:
2865 info
.si_signo
= TARGET_SIGFPE
;
2867 info
.si_code
= TARGET_FPE_FLTDIV
;
2868 info
._sifields
._sigfault
._addr
= 0;
2869 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2872 info
.si_signo
= TARGET_SIGFPE
;
2874 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2875 info
.si_code
= TARGET_FPE_FLTINV
;
2877 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2878 info
.si_code
= TARGET_FPE_FLTDIV
;
2880 info
._sifields
._sigfault
._addr
= 0;
2881 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2884 printf ("Unhandled hw-exception: 0x%x\n",
2885 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2886 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2895 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2898 info
.si_signo
= sig
;
2900 info
.si_code
= TARGET_TRAP_BRKPT
;
2901 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2906 cpu_exec_step_atomic(cs
);
2909 printf ("Unhandled trap: 0x%x\n", trapnr
);
2910 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2913 process_pending_signals (env
);
2920 void cpu_loop(CPUM68KState
*env
)
2922 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2925 target_siginfo_t info
;
2926 TaskState
*ts
= cs
->opaque
;
2930 trapnr
= cpu_exec(cs
);
2932 process_queued_cpu_work(cs
);
2937 if (ts
->sim_syscalls
) {
2939 get_user_u16(nr
, env
->pc
+ 2);
2941 do_m68k_simcall(env
, nr
);
2947 case EXCP_HALT_INSN
:
2948 /* Semihosing syscall. */
2950 do_m68k_semihosting(env
, env
->dregs
[0]);
2954 case EXCP_UNSUPPORTED
:
2956 info
.si_signo
= TARGET_SIGILL
;
2958 info
.si_code
= TARGET_ILL_ILLOPN
;
2959 info
._sifields
._sigfault
._addr
= env
->pc
;
2960 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2963 info
.si_signo
= TARGET_SIGFPE
;
2965 info
.si_code
= TARGET_FPE_INTDIV
;
2966 info
._sifields
._sigfault
._addr
= env
->pc
;
2967 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2972 ts
->sim_syscalls
= 0;
2975 ret
= do_syscall(env
,
2984 if (ret
== -TARGET_ERESTARTSYS
) {
2986 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2987 env
->dregs
[0] = ret
;
2991 case EXCP_INTERRUPT
:
2992 /* just indicate that signals should be handled asap */
2996 info
.si_signo
= TARGET_SIGSEGV
;
2998 /* XXX: check env->error_code */
2999 info
.si_code
= TARGET_SEGV_MAPERR
;
3000 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
3001 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3008 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3011 info
.si_signo
= sig
;
3013 info
.si_code
= TARGET_TRAP_BRKPT
;
3014 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3019 cpu_exec_step_atomic(cs
);
3022 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
3025 process_pending_signals(env
);
3028 #endif /* TARGET_M68K */
3031 void cpu_loop(CPUAlphaState
*env
)
3033 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
3035 target_siginfo_t info
;
3040 trapnr
= cpu_exec(cs
);
3042 process_queued_cpu_work(cs
);
3044 /* All of the traps imply a transition through PALcode, which
3045 implies an REI instruction has been executed. Which means
3046 that the intr_flag should be cleared. */
3051 fprintf(stderr
, "Reset requested. Exit\n");
3055 fprintf(stderr
, "Machine check exception. Exit\n");
3058 case EXCP_SMP_INTERRUPT
:
3059 case EXCP_CLK_INTERRUPT
:
3060 case EXCP_DEV_INTERRUPT
:
3061 fprintf(stderr
, "External interrupt. Exit\n");
3065 env
->lock_addr
= -1;
3066 info
.si_signo
= TARGET_SIGSEGV
;
3068 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
3069 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
3070 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3071 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3074 env
->lock_addr
= -1;
3075 info
.si_signo
= TARGET_SIGBUS
;
3077 info
.si_code
= TARGET_BUS_ADRALN
;
3078 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3079 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3083 env
->lock_addr
= -1;
3084 info
.si_signo
= TARGET_SIGILL
;
3086 info
.si_code
= TARGET_ILL_ILLOPC
;
3087 info
._sifields
._sigfault
._addr
= env
->pc
;
3088 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3091 env
->lock_addr
= -1;
3092 info
.si_signo
= TARGET_SIGFPE
;
3094 info
.si_code
= TARGET_FPE_FLTINV
;
3095 info
._sifields
._sigfault
._addr
= env
->pc
;
3096 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3099 /* No-op. Linux simply re-enables the FPU. */
3102 env
->lock_addr
= -1;
3103 switch (env
->error_code
) {
3106 info
.si_signo
= TARGET_SIGTRAP
;
3108 info
.si_code
= TARGET_TRAP_BRKPT
;
3109 info
._sifields
._sigfault
._addr
= env
->pc
;
3110 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3114 info
.si_signo
= TARGET_SIGTRAP
;
3117 info
._sifields
._sigfault
._addr
= env
->pc
;
3118 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3122 trapnr
= env
->ir
[IR_V0
];
3123 sysret
= do_syscall(env
, trapnr
,
3124 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
3125 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
3126 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
3128 if (sysret
== -TARGET_ERESTARTSYS
) {
3132 if (sysret
== -TARGET_QEMU_ESIGRETURN
) {
3135 /* Syscall writes 0 to V0 to bypass error check, similar
3136 to how this is handled internal to Linux kernel.
3137 (Ab)use trapnr temporarily as boolean indicating error. */
3138 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
3139 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
3140 env
->ir
[IR_A3
] = trapnr
;
3144 /* ??? We can probably elide the code using page_unprotect
3145 that is checking for self-modifying code. Instead we
3146 could simply call tb_flush here. Until we work out the
3147 changes required to turn off the extra write protection,
3148 this can be a no-op. */
3152 /* Handled in the translator for usermode. */
3156 /* Handled in the translator for usermode. */
3160 info
.si_signo
= TARGET_SIGFPE
;
3161 switch (env
->ir
[IR_A0
]) {
3162 case TARGET_GEN_INTOVF
:
3163 info
.si_code
= TARGET_FPE_INTOVF
;
3165 case TARGET_GEN_INTDIV
:
3166 info
.si_code
= TARGET_FPE_INTDIV
;
3168 case TARGET_GEN_FLTOVF
:
3169 info
.si_code
= TARGET_FPE_FLTOVF
;
3171 case TARGET_GEN_FLTUND
:
3172 info
.si_code
= TARGET_FPE_FLTUND
;
3174 case TARGET_GEN_FLTINV
:
3175 info
.si_code
= TARGET_FPE_FLTINV
;
3177 case TARGET_GEN_FLTINE
:
3178 info
.si_code
= TARGET_FPE_FLTRES
;
3180 case TARGET_GEN_ROPRAND
:
3184 info
.si_signo
= TARGET_SIGTRAP
;
3189 info
._sifields
._sigfault
._addr
= env
->pc
;
3190 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3197 info
.si_signo
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3198 if (info
.si_signo
) {
3199 env
->lock_addr
= -1;
3201 info
.si_code
= TARGET_TRAP_BRKPT
;
3202 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3205 case EXCP_INTERRUPT
:
3206 /* Just indicate that signals should be handled asap. */
3209 cpu_exec_step_atomic(cs
);
3212 printf ("Unhandled trap: 0x%x\n", trapnr
);
3213 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3216 process_pending_signals (env
);
3219 #endif /* TARGET_ALPHA */
3222 void cpu_loop(CPUS390XState
*env
)
3224 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3226 target_siginfo_t info
;
3232 trapnr
= cpu_exec(cs
);
3234 process_queued_cpu_work(cs
);
3237 case EXCP_INTERRUPT
:
3238 /* Just indicate that signals should be handled asap. */
3242 n
= env
->int_svc_code
;
3244 /* syscalls > 255 */
3247 env
->psw
.addr
+= env
->int_svc_ilen
;
3248 ret
= do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3249 env
->regs
[4], env
->regs
[5],
3250 env
->regs
[6], env
->regs
[7], 0, 0);
3251 if (ret
== -TARGET_ERESTARTSYS
) {
3252 env
->psw
.addr
-= env
->int_svc_ilen
;
3253 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3259 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3261 n
= TARGET_TRAP_BRKPT
;
3266 n
= env
->int_pgm_code
;
3269 case PGM_PRIVILEGED
:
3270 sig
= TARGET_SIGILL
;
3271 n
= TARGET_ILL_ILLOPC
;
3273 case PGM_PROTECTION
:
3274 case PGM_ADDRESSING
:
3275 sig
= TARGET_SIGSEGV
;
3276 /* XXX: check env->error_code */
3277 n
= TARGET_SEGV_MAPERR
;
3278 addr
= env
->__excp_addr
;
3281 case PGM_SPECIFICATION
:
3282 case PGM_SPECIAL_OP
:
3285 sig
= TARGET_SIGILL
;
3286 n
= TARGET_ILL_ILLOPN
;
3289 case PGM_FIXPT_OVERFLOW
:
3290 sig
= TARGET_SIGFPE
;
3291 n
= TARGET_FPE_INTOVF
;
3293 case PGM_FIXPT_DIVIDE
:
3294 sig
= TARGET_SIGFPE
;
3295 n
= TARGET_FPE_INTDIV
;
3299 n
= (env
->fpc
>> 8) & 0xff;
3301 /* compare-and-trap */
3304 /* An IEEE exception, simulated or otherwise. */
3306 n
= TARGET_FPE_FLTINV
;
3307 } else if (n
& 0x40) {
3308 n
= TARGET_FPE_FLTDIV
;
3309 } else if (n
& 0x20) {
3310 n
= TARGET_FPE_FLTOVF
;
3311 } else if (n
& 0x10) {
3312 n
= TARGET_FPE_FLTUND
;
3313 } else if (n
& 0x08) {
3314 n
= TARGET_FPE_FLTRES
;
3316 /* ??? Quantum exception; BFP, DFP error. */
3319 sig
= TARGET_SIGFPE
;
3324 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3325 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3331 addr
= env
->psw
.addr
;
3333 info
.si_signo
= sig
;
3336 info
._sifields
._sigfault
._addr
= addr
;
3337 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3341 cpu_exec_step_atomic(cs
);
3344 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3345 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3348 process_pending_signals (env
);
3352 #endif /* TARGET_S390X */
3354 #ifdef TARGET_TILEGX
3356 static void gen_sigill_reg(CPUTLGState
*env
)
3358 target_siginfo_t info
;
3360 info
.si_signo
= TARGET_SIGILL
;
3362 info
.si_code
= TARGET_ILL_PRVREG
;
3363 info
._sifields
._sigfault
._addr
= env
->pc
;
3364 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3367 static void do_signal(CPUTLGState
*env
, int signo
, int sigcode
)
3369 target_siginfo_t info
;
3371 info
.si_signo
= signo
;
3373 info
._sifields
._sigfault
._addr
= env
->pc
;
3375 if (signo
== TARGET_SIGSEGV
) {
3376 /* The passed in sigcode is a dummy; check for a page mapping
3377 and pass either MAPERR or ACCERR. */
3378 target_ulong addr
= env
->excaddr
;
3379 info
._sifields
._sigfault
._addr
= addr
;
3380 if (page_check_range(addr
, 1, PAGE_VALID
) < 0) {
3381 sigcode
= TARGET_SEGV_MAPERR
;
3383 sigcode
= TARGET_SEGV_ACCERR
;
3386 info
.si_code
= sigcode
;
3388 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3391 static void gen_sigsegv_maperr(CPUTLGState
*env
, target_ulong addr
)
3393 env
->excaddr
= addr
;
3394 do_signal(env
, TARGET_SIGSEGV
, 0);
3397 static void set_regval(CPUTLGState
*env
, uint8_t reg
, uint64_t val
)
3399 if (unlikely(reg
>= TILEGX_R_COUNT
)) {
3410 gen_sigill_reg(env
);
3413 g_assert_not_reached();
3416 env
->regs
[reg
] = val
;
3420 * Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
3421 * memory at the address held in the first source register. If the values are
3422 * not equal, then no memory operation is performed. If the values are equal,
3423 * the 8-byte quantity from the second source register is written into memory
3424 * at the address held in the first source register. In either case, the result
3425 * of the instruction is the value read from memory. The compare and write to
3426 * memory are atomic and thus can be used for synchronization purposes. This
3427 * instruction only operates for addresses aligned to a 8-byte boundary.
3428 * Unaligned memory access causes an Unaligned Data Reference interrupt.
3430 * Functional Description (64-bit)
3431 * uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
3432 * rf[Dest] = memVal;
3433 * if (memVal == SPR[CmpValueSPR])
3434 * memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
3436 * Functional Description (32-bit)
3437 * uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
3438 * rf[Dest] = memVal;
3439 * if (memVal == signExtend32 (SPR[CmpValueSPR]))
3440 * memoryWriteWord (rf[SrcA], rf[SrcB]);
3443 * This function also processes exch and exch4 which need not process SPR.
3445 static void do_exch(CPUTLGState
*env
, bool quad
, bool cmp
)
3448 target_long val
, sprval
;
3452 addr
= env
->atomic_srca
;
3453 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3454 goto sigsegv_maperr
;
3459 sprval
= env
->spregs
[TILEGX_SPR_CMPEXCH
];
3461 sprval
= sextract64(env
->spregs
[TILEGX_SPR_CMPEXCH
], 0, 32);
3465 if (!cmp
|| val
== sprval
) {
3466 target_long valb
= env
->atomic_srcb
;
3467 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3468 goto sigsegv_maperr
;
3472 set_regval(env
, env
->atomic_dstr
, val
);
3478 gen_sigsegv_maperr(env
, addr
);
3481 static void do_fetch(CPUTLGState
*env
, int trapnr
, bool quad
)
3485 target_long val
, valb
;
3489 addr
= env
->atomic_srca
;
3490 valb
= env
->atomic_srcb
;
3491 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3492 goto sigsegv_maperr
;
3496 case TILEGX_EXCP_OPCODE_FETCHADD
:
3497 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3500 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3506 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3508 if ((int32_t)valb
< 0) {
3512 case TILEGX_EXCP_OPCODE_FETCHAND
:
3513 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3516 case TILEGX_EXCP_OPCODE_FETCHOR
:
3517 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3521 g_assert_not_reached();
3525 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3526 goto sigsegv_maperr
;
3530 set_regval(env
, env
->atomic_dstr
, val
);
3536 gen_sigsegv_maperr(env
, addr
);
3539 void cpu_loop(CPUTLGState
*env
)
3541 CPUState
*cs
= CPU(tilegx_env_get_cpu(env
));
3546 trapnr
= cpu_exec(cs
);
3548 process_queued_cpu_work(cs
);
3551 case TILEGX_EXCP_SYSCALL
:
3553 abi_ulong ret
= do_syscall(env
, env
->regs
[TILEGX_R_NR
],
3554 env
->regs
[0], env
->regs
[1],
3555 env
->regs
[2], env
->regs
[3],
3556 env
->regs
[4], env
->regs
[5],
3557 env
->regs
[6], env
->regs
[7]);
3558 if (ret
== -TARGET_ERESTARTSYS
) {
3560 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3561 env
->regs
[TILEGX_R_RE
] = ret
;
3562 env
->regs
[TILEGX_R_ERR
] = TILEGX_IS_ERRNO(ret
) ? -ret
: 0;
3566 case TILEGX_EXCP_OPCODE_EXCH
:
3567 do_exch(env
, true, false);
3569 case TILEGX_EXCP_OPCODE_EXCH4
:
3570 do_exch(env
, false, false);
3572 case TILEGX_EXCP_OPCODE_CMPEXCH
:
3573 do_exch(env
, true, true);
3575 case TILEGX_EXCP_OPCODE_CMPEXCH4
:
3576 do_exch(env
, false, true);
3578 case TILEGX_EXCP_OPCODE_FETCHADD
:
3579 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3580 case TILEGX_EXCP_OPCODE_FETCHAND
:
3581 case TILEGX_EXCP_OPCODE_FETCHOR
:
3582 do_fetch(env
, trapnr
, true);
3584 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3585 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3586 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3587 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3588 do_fetch(env
, trapnr
, false);
3590 case TILEGX_EXCP_SIGNAL
:
3591 do_signal(env
, env
->signo
, env
->sigcode
);
3593 case TILEGX_EXCP_REG_IDN_ACCESS
:
3594 case TILEGX_EXCP_REG_UDN_ACCESS
:
3595 gen_sigill_reg(env
);
3598 cpu_exec_step_atomic(cs
);
3601 fprintf(stderr
, "trapnr is %d[0x%x].\n", trapnr
, trapnr
);
3602 g_assert_not_reached();
3604 process_pending_signals(env
);
3612 static abi_ulong
hppa_lws(CPUHPPAState
*env
)
3614 uint32_t which
= env
->gr
[20];
3615 abi_ulong addr
= env
->gr
[26];
3616 abi_ulong old
= env
->gr
[25];
3617 abi_ulong
new = env
->gr
[24];
3618 abi_ulong size
, ret
;
3622 return -TARGET_ENOSYS
;
3624 case 0: /* elf32 atomic 32bit cmpxchg */
3625 if ((addr
& 3) || !access_ok(VERIFY_WRITE
, addr
, 4)) {
3626 return -TARGET_EFAULT
;
3630 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3634 case 2: /* elf32 atomic "new" cmpxchg */
3637 return -TARGET_ENOSYS
;
3639 if (((addr
| old
| new) & ((1 << size
) - 1))
3640 || !access_ok(VERIFY_WRITE
, addr
, 1 << size
)
3641 || !access_ok(VERIFY_READ
, old
, 1 << size
)
3642 || !access_ok(VERIFY_READ
, new, 1 << size
)) {
3643 return -TARGET_EFAULT
;
3645 /* Note that below we use host-endian loads so that the cmpxchg
3646 can be host-endian as well. */
3649 old
= *(uint8_t *)g2h(old
);
3650 new = *(uint8_t *)g2h(new);
3651 ret
= atomic_cmpxchg((uint8_t *)g2h(addr
), old
, new);
3655 old
= *(uint16_t *)g2h(old
);
3656 new = *(uint16_t *)g2h(new);
3657 ret
= atomic_cmpxchg((uint16_t *)g2h(addr
), old
, new);
3661 old
= *(uint32_t *)g2h(old
);
3662 new = *(uint32_t *)g2h(new);
3663 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3668 uint64_t o64
, n64
, r64
;
3669 o64
= *(uint64_t *)g2h(old
);
3670 n64
= *(uint64_t *)g2h(new);
3671 #ifdef CONFIG_ATOMIC64
3672 r64
= atomic_cmpxchg__nocheck((uint64_t *)g2h(addr
), o64
, n64
);
3676 r64
= *(uint64_t *)g2h(addr
);
3679 *(uint64_t *)g2h(addr
) = n64
;
3694 void cpu_loop(CPUHPPAState
*env
)
3696 CPUState
*cs
= CPU(hppa_env_get_cpu(env
));
3697 target_siginfo_t info
;
3703 trapnr
= cpu_exec(cs
);
3705 process_queued_cpu_work(cs
);
3709 ret
= do_syscall(env
, env
->gr
[20],
3710 env
->gr
[26], env
->gr
[25],
3711 env
->gr
[24], env
->gr
[23],
3712 env
->gr
[22], env
->gr
[21], 0, 0);
3716 /* We arrived here by faking the gateway page. Return. */
3717 env
->iaoq_f
= env
->gr
[31];
3718 env
->iaoq_b
= env
->gr
[31] + 4;
3720 case -TARGET_ERESTARTSYS
:
3721 case -TARGET_QEMU_ESIGRETURN
:
3725 case EXCP_SYSCALL_LWS
:
3726 env
->gr
[21] = hppa_lws(env
);
3727 /* We arrived here by faking the gateway page. Return. */
3728 env
->iaoq_f
= env
->gr
[31];
3729 env
->iaoq_b
= env
->gr
[31] + 4;
3732 info
.si_signo
= TARGET_SIGSEGV
;
3734 info
.si_code
= TARGET_SEGV_ACCERR
;
3735 info
._sifields
._sigfault
._addr
= env
->ior
;
3736 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3739 info
.si_signo
= TARGET_SIGILL
;
3741 info
.si_code
= TARGET_ILL_ILLOPN
;
3742 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3743 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3746 info
.si_signo
= TARGET_SIGFPE
;
3749 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3750 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3753 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3755 info
.si_signo
= trapnr
;
3757 info
.si_code
= TARGET_TRAP_BRKPT
;
3758 queue_signal(env
, trapnr
, QEMU_SI_FAULT
, &info
);
3761 case EXCP_INTERRUPT
:
3762 /* just indicate that signals should be handled asap */
3765 g_assert_not_reached();
3767 process_pending_signals(env
);
3771 #endif /* TARGET_HPPA */
3773 THREAD CPUState
*thread_cpu
;
3775 bool qemu_cpu_is_self(CPUState
*cpu
)
3777 return thread_cpu
== cpu
;
3780 void qemu_cpu_kick(CPUState
*cpu
)
3785 void task_settid(TaskState
*ts
)
3787 if (ts
->ts_tid
== 0) {
3788 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3792 void stop_all_tasks(void)
3795 * We trust that when using NPTL, start_exclusive()
3796 * handles thread stopping correctly.
3801 /* Assumes contents are already zeroed. */
3802 void init_task_state(TaskState
*ts
)
3807 CPUArchState
*cpu_copy(CPUArchState
*env
)
3809 CPUState
*cpu
= ENV_GET_CPU(env
);
3810 CPUState
*new_cpu
= cpu_init(cpu_model
);
3811 CPUArchState
*new_env
= new_cpu
->env_ptr
;
3815 /* Reset non arch specific state */
3818 memcpy(new_env
, env
, sizeof(CPUArchState
));
3820 /* Clone all break/watchpoints.
3821 Note: Once we support ptrace with hw-debug register access, make sure
3822 BP_CPU break/watchpoints are handled correctly on clone. */
3823 QTAILQ_INIT(&new_cpu
->breakpoints
);
3824 QTAILQ_INIT(&new_cpu
->watchpoints
);
3825 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
3826 cpu_breakpoint_insert(new_cpu
, bp
->pc
, bp
->flags
, NULL
);
3828 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
3829 cpu_watchpoint_insert(new_cpu
, wp
->vaddr
, wp
->len
, wp
->flags
, NULL
);
3835 static void handle_arg_help(const char *arg
)
3837 usage(EXIT_SUCCESS
);
3840 static void handle_arg_log(const char *arg
)
3844 mask
= qemu_str_to_log_mask(arg
);
3846 qemu_print_log_usage(stdout
);
3849 qemu_log_needs_buffers();
3853 static void handle_arg_log_filename(const char *arg
)
3855 qemu_set_log_filename(arg
, &error_fatal
);
3858 static void handle_arg_set_env(const char *arg
)
3860 char *r
, *p
, *token
;
3861 r
= p
= strdup(arg
);
3862 while ((token
= strsep(&p
, ",")) != NULL
) {
3863 if (envlist_setenv(envlist
, token
) != 0) {
3864 usage(EXIT_FAILURE
);
3870 static void handle_arg_unset_env(const char *arg
)
3872 char *r
, *p
, *token
;
3873 r
= p
= strdup(arg
);
3874 while ((token
= strsep(&p
, ",")) != NULL
) {
3875 if (envlist_unsetenv(envlist
, token
) != 0) {
3876 usage(EXIT_FAILURE
);
3882 static void handle_arg_argv0(const char *arg
)
3884 argv0
= strdup(arg
);
3887 static void handle_arg_stack_size(const char *arg
)
3890 guest_stack_size
= strtoul(arg
, &p
, 0);
3891 if (guest_stack_size
== 0) {
3892 usage(EXIT_FAILURE
);
3896 guest_stack_size
*= 1024 * 1024;
3897 } else if (*p
== 'k' || *p
== 'K') {
3898 guest_stack_size
*= 1024;
3902 static void handle_arg_ld_prefix(const char *arg
)
3904 interp_prefix
= strdup(arg
);
3907 static void handle_arg_pagesize(const char *arg
)
3909 qemu_host_page_size
= atoi(arg
);
3910 if (qemu_host_page_size
== 0 ||
3911 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3912 fprintf(stderr
, "page size must be a power of two\n");
3917 static void handle_arg_randseed(const char *arg
)
3919 unsigned long long seed
;
3921 if (parse_uint_full(arg
, &seed
, 0) != 0 || seed
> UINT_MAX
) {
3922 fprintf(stderr
, "Invalid seed number: %s\n", arg
);
3928 static void handle_arg_gdb(const char *arg
)
3930 gdbstub_port
= atoi(arg
);
3933 static void handle_arg_uname(const char *arg
)
3935 qemu_uname_release
= strdup(arg
);
3938 static void handle_arg_cpu(const char *arg
)
3940 cpu_model
= strdup(arg
);
3941 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3942 /* XXX: implement xxx_cpu_list for targets that still miss it */
3943 #if defined(cpu_list)
3944 cpu_list(stdout
, &fprintf
);
3950 static void handle_arg_guest_base(const char *arg
)
3952 guest_base
= strtol(arg
, NULL
, 0);
3953 have_guest_base
= 1;
3956 static void handle_arg_reserved_va(const char *arg
)
3960 reserved_va
= strtoul(arg
, &p
, 0);
3974 unsigned long unshifted
= reserved_va
;
3976 reserved_va
<<= shift
;
3977 if (((reserved_va
>> shift
) != unshifted
)
3978 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3979 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3982 fprintf(stderr
, "Reserved virtual address too big\n");
3987 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3992 static void handle_arg_singlestep(const char *arg
)
3997 static void handle_arg_strace(const char *arg
)
4002 static void handle_arg_version(const char *arg
)
4004 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
4005 "\n" QEMU_COPYRIGHT
"\n");
4009 static char *trace_file
;
4010 static void handle_arg_trace(const char *arg
)
4013 trace_file
= trace_opt_parse(arg
);
4016 struct qemu_argument
{
4020 void (*handle_opt
)(const char *arg
);
4021 const char *example
;
4025 static const struct qemu_argument arg_table
[] = {
4026 {"h", "", false, handle_arg_help
,
4027 "", "print this help"},
4028 {"help", "", false, handle_arg_help
,
4030 {"g", "QEMU_GDB", true, handle_arg_gdb
,
4031 "port", "wait gdb connection to 'port'"},
4032 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
4033 "path", "set the elf interpreter prefix to 'path'"},
4034 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
4035 "size", "set the stack size to 'size' bytes"},
4036 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
4037 "model", "select CPU (-cpu help for list)"},
4038 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
4039 "var=value", "sets targets environment variable (see below)"},
4040 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
4041 "var", "unsets targets environment variable (see below)"},
4042 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
4043 "argv0", "forces target process argv[0] to be 'argv0'"},
4044 {"r", "QEMU_UNAME", true, handle_arg_uname
,
4045 "uname", "set qemu uname release string to 'uname'"},
4046 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
4047 "address", "set guest_base address to 'address'"},
4048 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
4049 "size", "reserve 'size' bytes for guest virtual address space"},
4050 {"d", "QEMU_LOG", true, handle_arg_log
,
4051 "item[,...]", "enable logging of specified items "
4052 "(use '-d help' for a list of items)"},
4053 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
4054 "logfile", "write logs to 'logfile' (default stderr)"},
4055 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
4056 "pagesize", "set the host page size to 'pagesize'"},
4057 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
4058 "", "run in singlestep mode"},
4059 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
4060 "", "log system calls"},
4061 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed
,
4062 "", "Seed for pseudo-random number generator"},
4063 {"trace", "QEMU_TRACE", true, handle_arg_trace
,
4064 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
4065 {"version", "QEMU_VERSION", false, handle_arg_version
,
4066 "", "display version information and exit"},
4067 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
4070 static void usage(int exitcode
)
4072 const struct qemu_argument
*arginfo
;
4076 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
4077 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
4079 "Options and associated environment variables:\n"
4082 /* Calculate column widths. We must always have at least enough space
4083 * for the column header.
4085 maxarglen
= strlen("Argument");
4086 maxenvlen
= strlen("Env-variable");
4088 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4089 int arglen
= strlen(arginfo
->argv
);
4090 if (arginfo
->has_arg
) {
4091 arglen
+= strlen(arginfo
->example
) + 1;
4093 if (strlen(arginfo
->env
) > maxenvlen
) {
4094 maxenvlen
= strlen(arginfo
->env
);
4096 if (arglen
> maxarglen
) {
4101 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
4102 maxenvlen
, "Env-variable");
4104 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4105 if (arginfo
->has_arg
) {
4106 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
4107 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
4108 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
4110 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
4111 maxenvlen
, arginfo
->env
,
4118 "QEMU_LD_PREFIX = %s\n"
4119 "QEMU_STACK_SIZE = %ld byte\n",
4124 "You can use -E and -U options or the QEMU_SET_ENV and\n"
4125 "QEMU_UNSET_ENV environment variables to set and unset\n"
4126 "environment variables for the target process.\n"
4127 "It is possible to provide several variables by separating them\n"
4128 "by commas in getsubopt(3) style. Additionally it is possible to\n"
4129 "provide the -E and -U options multiple times.\n"
4130 "The following lines are equivalent:\n"
4131 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
4132 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
4133 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
4134 "Note that if you provide several changes to a single variable\n"
4135 "the last change will stay in effect.\n");
4140 static int parse_args(int argc
, char **argv
)
4144 const struct qemu_argument
*arginfo
;
4146 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4147 if (arginfo
->env
== NULL
) {
4151 r
= getenv(arginfo
->env
);
4153 arginfo
->handle_opt(r
);
4159 if (optind
>= argc
) {
4168 if (!strcmp(r
, "-")) {
4171 /* Treat --foo the same as -foo. */
4176 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4177 if (!strcmp(r
, arginfo
->argv
)) {
4178 if (arginfo
->has_arg
) {
4179 if (optind
>= argc
) {
4180 (void) fprintf(stderr
,
4181 "qemu: missing argument for option '%s'\n", r
);
4184 arginfo
->handle_opt(argv
[optind
]);
4187 arginfo
->handle_opt(NULL
);
4193 /* no option matched the current argv */
4194 if (arginfo
->handle_opt
== NULL
) {
4195 (void) fprintf(stderr
, "qemu: unknown option '%s'\n", r
);
4200 if (optind
>= argc
) {
4201 (void) fprintf(stderr
, "qemu: no user program specified\n");
4205 filename
= argv
[optind
];
4206 exec_path
= argv
[optind
];
4211 int main(int argc
, char **argv
, char **envp
)
4213 struct target_pt_regs regs1
, *regs
= ®s1
;
4214 struct image_info info1
, *info
= &info1
;
4215 struct linux_binprm bprm
;
4220 char **target_environ
, **wrk
;
4227 module_call_init(MODULE_INIT_TRACE
);
4228 qemu_init_cpu_list();
4229 module_call_init(MODULE_INIT_QOM
);
4231 if ((envlist
= envlist_create()) == NULL
) {
4232 (void) fprintf(stderr
, "Unable to allocate envlist\n");
4236 /* add current environment into the list */
4237 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
4238 (void) envlist_setenv(envlist
, *wrk
);
4241 /* Read the stack limit from the kernel. If it's "unlimited",
4242 then we can do little else besides use the default. */
4245 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
4246 && lim
.rlim_cur
!= RLIM_INFINITY
4247 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
4248 guest_stack_size
= lim
.rlim_cur
;
4256 qemu_add_opts(&qemu_trace_opts
);
4258 optind
= parse_args(argc
, argv
);
4260 if (!trace_init_backends()) {
4263 trace_init_file(trace_file
);
4266 memset(regs
, 0, sizeof(struct target_pt_regs
));
4268 /* Zero out image_info */
4269 memset(info
, 0, sizeof(struct image_info
));
4271 memset(&bprm
, 0, sizeof (bprm
));
4273 /* Scan interp_prefix dir for replacement files. */
4274 init_paths(interp_prefix
);
4276 init_qemu_uname_release();
4278 if (cpu_model
== NULL
) {
4279 #if defined(TARGET_I386)
4280 #ifdef TARGET_X86_64
4281 cpu_model
= "qemu64";
4283 cpu_model
= "qemu32";
4285 #elif defined(TARGET_ARM)
4287 #elif defined(TARGET_UNICORE32)
4289 #elif defined(TARGET_M68K)
4291 #elif defined(TARGET_SPARC)
4292 #ifdef TARGET_SPARC64
4293 cpu_model
= "TI UltraSparc II";
4295 cpu_model
= "Fujitsu MB86904";
4297 #elif defined(TARGET_MIPS)
4298 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
4303 #elif defined TARGET_OPENRISC
4304 cpu_model
= "or1200";
4305 #elif defined(TARGET_PPC)
4306 # ifdef TARGET_PPC64
4307 cpu_model
= "POWER8";
4311 #elif defined TARGET_SH4
4312 cpu_model
= TYPE_SH7785_CPU
;
4313 #elif defined TARGET_S390X
4320 /* NOTE: we need to init the CPU at this stage to get
4321 qemu_host_page_size */
4322 cpu
= cpu_init(cpu_model
);
4324 fprintf(stderr
, "Unable to find CPU definition\n");
4332 if (getenv("QEMU_STRACE")) {
4336 if (getenv("QEMU_RAND_SEED")) {
4337 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4340 target_environ
= envlist_to_environ(envlist
, NULL
);
4341 envlist_free(envlist
);
4344 * Now that page sizes are configured in cpu_init() we can do
4345 * proper page alignment for guest_base.
4347 guest_base
= HOST_PAGE_ALIGN(guest_base
);
4349 if (reserved_va
|| have_guest_base
) {
4350 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
4352 if (guest_base
== (unsigned long)-1) {
4353 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
4354 "space for use as guest address space (check your virtual "
4355 "memory ulimit setting or reserve less using -R option)\n",
4361 mmap_next_start
= reserved_va
;
4366 * Read in mmap_min_addr kernel parameter. This value is used
4367 * When loading the ELF image to determine whether guest_base
4368 * is needed. It is also used in mmap_find_vma.
4373 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
4375 if (fscanf(fp
, "%lu", &tmp
) == 1) {
4376 mmap_min_addr
= tmp
;
4377 qemu_log_mask(CPU_LOG_PAGE
, "host mmap_min_addr=0x%lx\n", mmap_min_addr
);
4384 * Prepare copy of argv vector for target.
4386 target_argc
= argc
- optind
;
4387 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
4388 if (target_argv
== NULL
) {
4389 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
4394 * If argv0 is specified (using '-0' switch) we replace
4395 * argv[0] pointer with the given one.
4398 if (argv0
!= NULL
) {
4399 target_argv
[i
++] = strdup(argv0
);
4401 for (; i
< target_argc
; i
++) {
4402 target_argv
[i
] = strdup(argv
[optind
+ i
]);
4404 target_argv
[target_argc
] = NULL
;
4406 ts
= g_new0(TaskState
, 1);
4407 init_task_state(ts
);
4408 /* build Task State */
4414 execfd
= qemu_getauxval(AT_EXECFD
);
4416 execfd
= open(filename
, O_RDONLY
);
4418 printf("Error while loading %s: %s\n", filename
, strerror(errno
));
4419 _exit(EXIT_FAILURE
);
4423 ret
= loader_exec(execfd
, filename
, target_argv
, target_environ
, regs
,
4426 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
4427 _exit(EXIT_FAILURE
);
4430 for (wrk
= target_environ
; *wrk
; wrk
++) {
4434 free(target_environ
);
4436 if (qemu_loglevel_mask(CPU_LOG_PAGE
)) {
4437 qemu_log("guest_base 0x%lx\n", guest_base
);
4440 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
4441 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
4442 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n", info
->start_code
);
4443 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n", info
->start_data
);
4444 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
4445 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n", info
->start_stack
);
4446 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
4447 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
4448 qemu_log("argv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->arg_start
);
4449 qemu_log("env_start 0x" TARGET_ABI_FMT_lx
"\n",
4450 info
->arg_end
+ (abi_ulong
)sizeof(abi_ulong
));
4451 qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->saved_auxv
);
4454 target_set_brk(info
->brk
);
4458 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
4459 generating the prologue until now so that the prologue can take
4460 the real value of GUEST_BASE into account. */
4461 tcg_prologue_init(&tcg_ctx
);
4463 #if defined(TARGET_I386)
4464 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
4465 env
->hflags
|= HF_PE_MASK
| HF_CPL_MASK
;
4466 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
4467 env
->cr
[4] |= CR4_OSFXSR_MASK
;
4468 env
->hflags
|= HF_OSFXSR_MASK
;
4470 #ifndef TARGET_ABI32
4471 /* enable 64 bit mode if possible */
4472 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
4473 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
4476 env
->cr
[4] |= CR4_PAE_MASK
;
4477 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
4478 env
->hflags
|= HF_LMA_MASK
;
4481 /* flags setup : we activate the IRQs by default as in user mode */
4482 env
->eflags
|= IF_MASK
;
4484 /* linux register setup */
4485 #ifndef TARGET_ABI32
4486 env
->regs
[R_EAX
] = regs
->rax
;
4487 env
->regs
[R_EBX
] = regs
->rbx
;
4488 env
->regs
[R_ECX
] = regs
->rcx
;
4489 env
->regs
[R_EDX
] = regs
->rdx
;
4490 env
->regs
[R_ESI
] = regs
->rsi
;
4491 env
->regs
[R_EDI
] = regs
->rdi
;
4492 env
->regs
[R_EBP
] = regs
->rbp
;
4493 env
->regs
[R_ESP
] = regs
->rsp
;
4494 env
->eip
= regs
->rip
;
4496 env
->regs
[R_EAX
] = regs
->eax
;
4497 env
->regs
[R_EBX
] = regs
->ebx
;
4498 env
->regs
[R_ECX
] = regs
->ecx
;
4499 env
->regs
[R_EDX
] = regs
->edx
;
4500 env
->regs
[R_ESI
] = regs
->esi
;
4501 env
->regs
[R_EDI
] = regs
->edi
;
4502 env
->regs
[R_EBP
] = regs
->ebp
;
4503 env
->regs
[R_ESP
] = regs
->esp
;
4504 env
->eip
= regs
->eip
;
4507 /* linux interrupt setup */
4508 #ifndef TARGET_ABI32
4509 env
->idt
.limit
= 511;
4511 env
->idt
.limit
= 255;
4513 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
4514 PROT_READ
|PROT_WRITE
,
4515 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4516 idt_table
= g2h(env
->idt
.base
);
4539 /* linux segment setup */
4541 uint64_t *gdt_table
;
4542 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
4543 PROT_READ
|PROT_WRITE
,
4544 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4545 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
4546 gdt_table
= g2h(env
->gdt
.base
);
4548 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4549 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4550 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4552 /* 64 bit code segment */
4553 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4554 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4556 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4558 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
4559 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4560 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
4562 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
4563 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
4565 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
4566 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
4567 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
4568 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
4569 /* This hack makes Wine work... */
4570 env
->segs
[R_FS
].selector
= 0;
4572 cpu_x86_load_seg(env
, R_DS
, 0);
4573 cpu_x86_load_seg(env
, R_ES
, 0);
4574 cpu_x86_load_seg(env
, R_FS
, 0);
4575 cpu_x86_load_seg(env
, R_GS
, 0);
4577 #elif defined(TARGET_AARCH64)
4581 if (!(arm_feature(env
, ARM_FEATURE_AARCH64
))) {
4583 "The selected ARM CPU does not support 64 bit mode\n");
4587 for (i
= 0; i
< 31; i
++) {
4588 env
->xregs
[i
] = regs
->regs
[i
];
4591 env
->xregs
[31] = regs
->sp
;
4593 #elif defined(TARGET_ARM)
4596 cpsr_write(env
, regs
->uregs
[16], CPSR_USER
| CPSR_EXEC
,
4598 for(i
= 0; i
< 16; i
++) {
4599 env
->regs
[i
] = regs
->uregs
[i
];
4601 #ifdef TARGET_WORDS_BIGENDIAN
4603 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
4604 && (info
->elf_flags
& EF_ARM_BE8
)) {
4605 env
->uncached_cpsr
|= CPSR_E
;
4606 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
4608 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
4612 #elif defined(TARGET_UNICORE32)
4615 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
4616 for (i
= 0; i
< 32; i
++) {
4617 env
->regs
[i
] = regs
->uregs
[i
];
4620 #elif defined(TARGET_SPARC)
4624 env
->npc
= regs
->npc
;
4626 for(i
= 0; i
< 8; i
++)
4627 env
->gregs
[i
] = regs
->u_regs
[i
];
4628 for(i
= 0; i
< 8; i
++)
4629 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
4631 #elif defined(TARGET_PPC)
4635 #if defined(TARGET_PPC64)
4636 int flag
= (env
->insns_flags2
& PPC2_BOOKE206
) ? MSR_CM
: MSR_SF
;
4637 #if defined(TARGET_ABI32)
4638 env
->msr
&= ~((target_ulong
)1 << flag
);
4640 env
->msr
|= (target_ulong
)1 << flag
;
4643 env
->nip
= regs
->nip
;
4644 for(i
= 0; i
< 32; i
++) {
4645 env
->gpr
[i
] = regs
->gpr
[i
];
4648 #elif defined(TARGET_M68K)
4651 env
->dregs
[0] = regs
->d0
;
4652 env
->dregs
[1] = regs
->d1
;
4653 env
->dregs
[2] = regs
->d2
;
4654 env
->dregs
[3] = regs
->d3
;
4655 env
->dregs
[4] = regs
->d4
;
4656 env
->dregs
[5] = regs
->d5
;
4657 env
->dregs
[6] = regs
->d6
;
4658 env
->dregs
[7] = regs
->d7
;
4659 env
->aregs
[0] = regs
->a0
;
4660 env
->aregs
[1] = regs
->a1
;
4661 env
->aregs
[2] = regs
->a2
;
4662 env
->aregs
[3] = regs
->a3
;
4663 env
->aregs
[4] = regs
->a4
;
4664 env
->aregs
[5] = regs
->a5
;
4665 env
->aregs
[6] = regs
->a6
;
4666 env
->aregs
[7] = regs
->usp
;
4668 ts
->sim_syscalls
= 1;
4670 #elif defined(TARGET_MICROBLAZE)
4672 env
->regs
[0] = regs
->r0
;
4673 env
->regs
[1] = regs
->r1
;
4674 env
->regs
[2] = regs
->r2
;
4675 env
->regs
[3] = regs
->r3
;
4676 env
->regs
[4] = regs
->r4
;
4677 env
->regs
[5] = regs
->r5
;
4678 env
->regs
[6] = regs
->r6
;
4679 env
->regs
[7] = regs
->r7
;
4680 env
->regs
[8] = regs
->r8
;
4681 env
->regs
[9] = regs
->r9
;
4682 env
->regs
[10] = regs
->r10
;
4683 env
->regs
[11] = regs
->r11
;
4684 env
->regs
[12] = regs
->r12
;
4685 env
->regs
[13] = regs
->r13
;
4686 env
->regs
[14] = regs
->r14
;
4687 env
->regs
[15] = regs
->r15
;
4688 env
->regs
[16] = regs
->r16
;
4689 env
->regs
[17] = regs
->r17
;
4690 env
->regs
[18] = regs
->r18
;
4691 env
->regs
[19] = regs
->r19
;
4692 env
->regs
[20] = regs
->r20
;
4693 env
->regs
[21] = regs
->r21
;
4694 env
->regs
[22] = regs
->r22
;
4695 env
->regs
[23] = regs
->r23
;
4696 env
->regs
[24] = regs
->r24
;
4697 env
->regs
[25] = regs
->r25
;
4698 env
->regs
[26] = regs
->r26
;
4699 env
->regs
[27] = regs
->r27
;
4700 env
->regs
[28] = regs
->r28
;
4701 env
->regs
[29] = regs
->r29
;
4702 env
->regs
[30] = regs
->r30
;
4703 env
->regs
[31] = regs
->r31
;
4704 env
->sregs
[SR_PC
] = regs
->pc
;
4706 #elif defined(TARGET_MIPS)
4710 for(i
= 0; i
< 32; i
++) {
4711 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
4713 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
4714 if (regs
->cp0_epc
& 1) {
4715 env
->hflags
|= MIPS_HFLAG_M16
;
4717 if (((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) !=
4718 ((env
->active_fpu
.fcr31
& (1 << FCR31_NAN2008
)) != 0)) {
4719 if ((env
->active_fpu
.fcr31_rw_bitmask
&
4720 (1 << FCR31_NAN2008
)) == 0) {
4721 fprintf(stderr
, "ELF binary's NaN mode not supported by CPU\n");
4724 if ((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) {
4725 env
->active_fpu
.fcr31
|= (1 << FCR31_NAN2008
);
4727 env
->active_fpu
.fcr31
&= ~(1 << FCR31_NAN2008
);
4729 restore_snan_bit_mode(env
);
4732 #elif defined(TARGET_NIOS2)
4735 env
->regs
[1] = regs
->r1
;
4736 env
->regs
[2] = regs
->r2
;
4737 env
->regs
[3] = regs
->r3
;
4738 env
->regs
[4] = regs
->r4
;
4739 env
->regs
[5] = regs
->r5
;
4740 env
->regs
[6] = regs
->r6
;
4741 env
->regs
[7] = regs
->r7
;
4742 env
->regs
[8] = regs
->r8
;
4743 env
->regs
[9] = regs
->r9
;
4744 env
->regs
[10] = regs
->r10
;
4745 env
->regs
[11] = regs
->r11
;
4746 env
->regs
[12] = regs
->r12
;
4747 env
->regs
[13] = regs
->r13
;
4748 env
->regs
[14] = regs
->r14
;
4749 env
->regs
[15] = regs
->r15
;
4750 /* TODO: unsigned long orig_r2; */
4751 env
->regs
[R_RA
] = regs
->ra
;
4752 env
->regs
[R_FP
] = regs
->fp
;
4753 env
->regs
[R_SP
] = regs
->sp
;
4754 env
->regs
[R_GP
] = regs
->gp
;
4755 env
->regs
[CR_ESTATUS
] = regs
->estatus
;
4756 env
->regs
[R_EA
] = regs
->ea
;
4757 /* TODO: unsigned long orig_r7; */
4759 /* Emulate eret when starting thread. */
4760 env
->regs
[R_PC
] = regs
->ea
;
4762 #elif defined(TARGET_OPENRISC)
4766 for (i
= 0; i
< 32; i
++) {
4767 env
->gpr
[i
] = regs
->gpr
[i
];
4770 cpu_set_sr(env
, regs
->sr
);
4772 #elif defined(TARGET_SH4)
4776 for(i
= 0; i
< 16; i
++) {
4777 env
->gregs
[i
] = regs
->regs
[i
];
4781 #elif defined(TARGET_ALPHA)
4785 for(i
= 0; i
< 28; i
++) {
4786 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
4788 env
->ir
[IR_SP
] = regs
->usp
;
4791 #elif defined(TARGET_CRIS)
4793 env
->regs
[0] = regs
->r0
;
4794 env
->regs
[1] = regs
->r1
;
4795 env
->regs
[2] = regs
->r2
;
4796 env
->regs
[3] = regs
->r3
;
4797 env
->regs
[4] = regs
->r4
;
4798 env
->regs
[5] = regs
->r5
;
4799 env
->regs
[6] = regs
->r6
;
4800 env
->regs
[7] = regs
->r7
;
4801 env
->regs
[8] = regs
->r8
;
4802 env
->regs
[9] = regs
->r9
;
4803 env
->regs
[10] = regs
->r10
;
4804 env
->regs
[11] = regs
->r11
;
4805 env
->regs
[12] = regs
->r12
;
4806 env
->regs
[13] = regs
->r13
;
4807 env
->regs
[14] = info
->start_stack
;
4808 env
->regs
[15] = regs
->acr
;
4809 env
->pc
= regs
->erp
;
4811 #elif defined(TARGET_S390X)
4814 for (i
= 0; i
< 16; i
++) {
4815 env
->regs
[i
] = regs
->gprs
[i
];
4817 env
->psw
.mask
= regs
->psw
.mask
;
4818 env
->psw
.addr
= regs
->psw
.addr
;
4820 #elif defined(TARGET_TILEGX)
4823 for (i
= 0; i
< TILEGX_R_COUNT
; i
++) {
4824 env
->regs
[i
] = regs
->regs
[i
];
4826 for (i
= 0; i
< TILEGX_SPR_COUNT
; i
++) {
4831 #elif defined(TARGET_HPPA)
4834 for (i
= 1; i
< 32; i
++) {
4835 env
->gr
[i
] = regs
->gr
[i
];
4837 env
->iaoq_f
= regs
->iaoq
[0];
4838 env
->iaoq_b
= regs
->iaoq
[1];
4841 #error unsupported target CPU
4844 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4845 ts
->stack_base
= info
->start_stack
;
4846 ts
->heap_base
= info
->brk
;
4847 /* This will be filled in on the first SYS_HEAPINFO call. */
4852 if (gdbserver_start(gdbstub_port
) < 0) {
4853 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4857 gdb_handlesig(cpu
, 0);