2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "hw/i386/pc.h"
26 #include "hw/char/serial.h"
27 #include "hw/i386/apic.h"
28 #include "hw/i386/topology.h"
29 #include "sysemu/cpus.h"
30 #include "hw/block/fdc.h"
32 #include "hw/pci/pci.h"
33 #include "monitor/monitor.h"
34 #include "hw/nvram/fw_cfg.h"
35 #include "hw/timer/hpet.h"
36 #include "hw/i386/smbios.h"
37 #include "hw/loader.h"
39 #include "multiboot.h"
40 #include "hw/timer/mc146818rtc.h"
41 #include "hw/timer/i8254.h"
42 #include "hw/audio/pcspk.h"
43 #include "hw/pci/msi.h"
44 #include "hw/sysbus.h"
45 #include "sysemu/sysemu.h"
46 #include "sysemu/kvm.h"
48 #include "hw/xen/xen.h"
49 #include "sysemu/block-backend.h"
50 #include "hw/block/block.h"
51 #include "ui/qemu-spice.h"
52 #include "exec/memory.h"
53 #include "exec/address-spaces.h"
54 #include "sysemu/arch_init.h"
55 #include "qemu/bitmap.h"
56 #include "qemu/config-file.h"
57 #include "hw/acpi/acpi.h"
58 #include "hw/acpi/cpu_hotplug.h"
59 #include "hw/cpu/icc_bus.h"
60 #include "hw/boards.h"
61 #include "hw/pci/pci_host.h"
62 #include "acpi-build.h"
63 #include "hw/mem/pc-dimm.h"
65 #include "qapi/visitor.h"
66 #include "qapi-visit.h"
68 /* debug PC/ISA interrupts */
72 #define DPRINTF(fmt, ...) \
73 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
75 #define DPRINTF(fmt, ...)
78 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables
79 * (128K) and other BIOS datastructures (less than 4K reported to be used at
80 * the moment, 32K should be enough for a while). */
81 static unsigned acpi_data_size
= 0x20000 + 0x8000;
82 void pc_set_legacy_acpi_data_size(void)
84 acpi_data_size
= 0x10000;
87 #define BIOS_CFG_IOPORT 0x510
88 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
89 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
90 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
91 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
92 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
94 #define E820_NR_ENTRIES 16
100 } QEMU_PACKED
__attribute((__aligned__(4)));
104 struct e820_entry entry
[E820_NR_ENTRIES
];
105 } QEMU_PACKED
__attribute((__aligned__(4)));
107 static struct e820_table e820_reserve
;
108 static struct e820_entry
*e820_table
;
109 static unsigned e820_entries
;
110 struct hpet_fw_config hpet_cfg
= {.count
= UINT8_MAX
};
112 void gsi_handler(void *opaque
, int n
, int level
)
114 GSIState
*s
= opaque
;
116 DPRINTF("pc: %s GSI %d\n", level
? "raising" : "lowering", n
);
117 if (n
< ISA_NUM_IRQS
) {
118 qemu_set_irq(s
->i8259_irq
[n
], level
);
120 qemu_set_irq(s
->ioapic_irq
[n
], level
);
123 static void ioport80_write(void *opaque
, hwaddr addr
, uint64_t data
,
128 static uint64_t ioport80_read(void *opaque
, hwaddr addr
, unsigned size
)
130 return 0xffffffffffffffffULL
;
133 /* MSDOS compatibility mode FPU exception support */
134 static qemu_irq ferr_irq
;
136 void pc_register_ferr_irq(qemu_irq irq
)
141 /* XXX: add IGNNE support */
142 void cpu_set_ferr(CPUX86State
*s
)
144 qemu_irq_raise(ferr_irq
);
147 static void ioportF0_write(void *opaque
, hwaddr addr
, uint64_t data
,
150 qemu_irq_lower(ferr_irq
);
153 static uint64_t ioportF0_read(void *opaque
, hwaddr addr
, unsigned size
)
155 return 0xffffffffffffffffULL
;
159 uint64_t cpu_get_tsc(CPUX86State
*env
)
161 return cpu_get_ticks();
166 static cpu_set_smm_t smm_set
;
167 static void *smm_arg
;
169 void cpu_smm_register(cpu_set_smm_t callback
, void *arg
)
171 assert(smm_set
== NULL
);
172 assert(smm_arg
== NULL
);
177 void cpu_smm_update(CPUX86State
*env
)
179 if (smm_set
&& smm_arg
&& CPU(x86_env_get_cpu(env
)) == first_cpu
) {
180 smm_set(!!(env
->hflags
& HF_SMM_MASK
), smm_arg
);
186 int cpu_get_pic_interrupt(CPUX86State
*env
)
188 X86CPU
*cpu
= x86_env_get_cpu(env
);
191 intno
= apic_get_interrupt(cpu
->apic_state
);
195 /* read the irq from the PIC */
196 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
200 intno
= pic_read_irq(isa_pic
);
204 static void pic_irq_request(void *opaque
, int irq
, int level
)
206 CPUState
*cs
= first_cpu
;
207 X86CPU
*cpu
= X86_CPU(cs
);
209 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
210 if (cpu
->apic_state
) {
213 if (apic_accept_pic_intr(cpu
->apic_state
)) {
214 apic_deliver_pic_intr(cpu
->apic_state
, level
);
219 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
221 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
226 /* PC cmos mappings */
228 #define REG_EQUIPMENT_BYTE 0x14
230 static int cmos_get_fd_drive_type(FDriveType fd0
)
236 /* 1.44 Mb 3"5 drive */
240 /* 2.88 Mb 3"5 drive */
244 /* 1.2 Mb 5"5 drive */
247 case FDRIVE_DRV_NONE
:
255 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
256 int16_t cylinders
, int8_t heads
, int8_t sectors
)
258 rtc_set_memory(s
, type_ofs
, 47);
259 rtc_set_memory(s
, info_ofs
, cylinders
);
260 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
261 rtc_set_memory(s
, info_ofs
+ 2, heads
);
262 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
263 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
264 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
265 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
266 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
267 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
270 /* convert boot_device letter to something recognizable by the bios */
271 static int boot_device2nibble(char boot_device
)
273 switch(boot_device
) {
276 return 0x01; /* floppy boot */
278 return 0x02; /* hard drive boot */
280 return 0x03; /* CD-ROM boot */
282 return 0x04; /* Network boot */
287 static void set_boot_dev(ISADevice
*s
, const char *boot_device
, Error
**errp
)
289 #define PC_MAX_BOOT_DEVICES 3
290 int nbds
, bds
[3] = { 0, };
293 nbds
= strlen(boot_device
);
294 if (nbds
> PC_MAX_BOOT_DEVICES
) {
295 error_setg(errp
, "Too many boot devices for PC");
298 for (i
= 0; i
< nbds
; i
++) {
299 bds
[i
] = boot_device2nibble(boot_device
[i
]);
301 error_setg(errp
, "Invalid boot device for PC: '%c'",
306 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
307 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
310 static void pc_boot_set(void *opaque
, const char *boot_device
, Error
**errp
)
312 set_boot_dev(opaque
, boot_device
, errp
);
315 typedef struct pc_cmos_init_late_arg
{
316 ISADevice
*rtc_state
;
318 } pc_cmos_init_late_arg
;
320 static void pc_cmos_init_late(void *opaque
)
322 pc_cmos_init_late_arg
*arg
= opaque
;
323 ISADevice
*s
= arg
->rtc_state
;
325 int8_t heads
, sectors
;
330 if (ide_get_geometry(arg
->idebus
[0], 0,
331 &cylinders
, &heads
, §ors
) >= 0) {
332 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
335 if (ide_get_geometry(arg
->idebus
[0], 1,
336 &cylinders
, &heads
, §ors
) >= 0) {
337 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
340 rtc_set_memory(s
, 0x12, val
);
343 for (i
= 0; i
< 4; i
++) {
344 /* NOTE: ide_get_geometry() returns the physical
345 geometry. It is always such that: 1 <= sects <= 63, 1
346 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
347 geometry can be different if a translation is done. */
348 if (ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
349 &cylinders
, &heads
, §ors
) >= 0) {
350 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
351 assert((trans
& ~3) == 0);
352 val
|= trans
<< (i
* 2);
355 rtc_set_memory(s
, 0x39, val
);
357 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
360 void pc_cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
361 const char *boot_device
, MachineState
*machine
,
362 ISADevice
*floppy
, BusState
*idebus0
, BusState
*idebus1
,
366 FDriveType fd_type
[2] = { FDRIVE_DRV_NONE
, FDRIVE_DRV_NONE
};
367 static pc_cmos_init_late_arg arg
;
368 PCMachineState
*pc_machine
= PC_MACHINE(machine
);
369 Error
*local_err
= NULL
;
371 /* various important CMOS locations needed by PC/Bochs bios */
374 /* base memory (first MiB) */
375 val
= MIN(ram_size
/ 1024, 640);
376 rtc_set_memory(s
, 0x15, val
);
377 rtc_set_memory(s
, 0x16, val
>> 8);
378 /* extended memory (next 64MiB) */
379 if (ram_size
> 1024 * 1024) {
380 val
= (ram_size
- 1024 * 1024) / 1024;
386 rtc_set_memory(s
, 0x17, val
);
387 rtc_set_memory(s
, 0x18, val
>> 8);
388 rtc_set_memory(s
, 0x30, val
);
389 rtc_set_memory(s
, 0x31, val
>> 8);
390 /* memory between 16MiB and 4GiB */
391 if (ram_size
> 16 * 1024 * 1024) {
392 val
= (ram_size
- 16 * 1024 * 1024) / 65536;
398 rtc_set_memory(s
, 0x34, val
);
399 rtc_set_memory(s
, 0x35, val
>> 8);
400 /* memory above 4GiB */
401 val
= above_4g_mem_size
/ 65536;
402 rtc_set_memory(s
, 0x5b, val
);
403 rtc_set_memory(s
, 0x5c, val
>> 8);
404 rtc_set_memory(s
, 0x5d, val
>> 16);
406 /* set the number of CPU */
407 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
409 object_property_add_link(OBJECT(machine
), "rtc_state",
411 (Object
**)&pc_machine
->rtc
,
412 object_property_allow_set_link
,
413 OBJ_PROP_LINK_UNREF_ON_RELEASE
, &error_abort
);
414 object_property_set_link(OBJECT(machine
), OBJECT(s
),
415 "rtc_state", &error_abort
);
417 set_boot_dev(s
, boot_device
, &local_err
);
419 error_report("%s", error_get_pretty(local_err
));
425 for (i
= 0; i
< 2; i
++) {
426 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
429 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
430 cmos_get_fd_drive_type(fd_type
[1]);
431 rtc_set_memory(s
, 0x10, val
);
435 if (fd_type
[0] < FDRIVE_DRV_NONE
) {
438 if (fd_type
[1] < FDRIVE_DRV_NONE
) {
445 val
|= 0x01; /* 1 drive, ready for boot */
448 val
|= 0x41; /* 2 drives, ready for boot */
451 val
|= 0x02; /* FPU is there */
452 val
|= 0x04; /* PS/2 mouse installed */
453 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
457 arg
.idebus
[0] = idebus0
;
458 arg
.idebus
[1] = idebus1
;
459 qemu_register_reset(pc_cmos_init_late
, &arg
);
462 #define TYPE_PORT92 "port92"
463 #define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92)
465 /* port 92 stuff: could be split off */
466 typedef struct Port92State
{
467 ISADevice parent_obj
;
474 static void port92_write(void *opaque
, hwaddr addr
, uint64_t val
,
477 Port92State
*s
= opaque
;
478 int oldval
= s
->outport
;
480 DPRINTF("port92: write 0x%02" PRIx64
"\n", val
);
482 qemu_set_irq(*s
->a20_out
, (val
>> 1) & 1);
483 if ((val
& 1) && !(oldval
& 1)) {
484 qemu_system_reset_request();
488 static uint64_t port92_read(void *opaque
, hwaddr addr
,
491 Port92State
*s
= opaque
;
495 DPRINTF("port92: read 0x%02x\n", ret
);
499 static void port92_init(ISADevice
*dev
, qemu_irq
*a20_out
)
501 Port92State
*s
= PORT92(dev
);
503 s
->a20_out
= a20_out
;
506 static const VMStateDescription vmstate_port92_isa
= {
509 .minimum_version_id
= 1,
510 .fields
= (VMStateField
[]) {
511 VMSTATE_UINT8(outport
, Port92State
),
512 VMSTATE_END_OF_LIST()
516 static void port92_reset(DeviceState
*d
)
518 Port92State
*s
= PORT92(d
);
523 static const MemoryRegionOps port92_ops
= {
525 .write
= port92_write
,
527 .min_access_size
= 1,
528 .max_access_size
= 1,
530 .endianness
= DEVICE_LITTLE_ENDIAN
,
533 static void port92_initfn(Object
*obj
)
535 Port92State
*s
= PORT92(obj
);
537 memory_region_init_io(&s
->io
, OBJECT(s
), &port92_ops
, s
, "port92", 1);
542 static void port92_realizefn(DeviceState
*dev
, Error
**errp
)
544 ISADevice
*isadev
= ISA_DEVICE(dev
);
545 Port92State
*s
= PORT92(dev
);
547 isa_register_ioport(isadev
, &s
->io
, 0x92);
550 static void port92_class_initfn(ObjectClass
*klass
, void *data
)
552 DeviceClass
*dc
= DEVICE_CLASS(klass
);
554 dc
->realize
= port92_realizefn
;
555 dc
->reset
= port92_reset
;
556 dc
->vmsd
= &vmstate_port92_isa
;
558 * Reason: unlike ordinary ISA devices, this one needs additional
559 * wiring: its A20 output line needs to be wired up by
562 dc
->cannot_instantiate_with_device_add_yet
= true;
565 static const TypeInfo port92_info
= {
567 .parent
= TYPE_ISA_DEVICE
,
568 .instance_size
= sizeof(Port92State
),
569 .instance_init
= port92_initfn
,
570 .class_init
= port92_class_initfn
,
573 static void port92_register_types(void)
575 type_register_static(&port92_info
);
578 type_init(port92_register_types
)
580 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
582 X86CPU
*cpu
= opaque
;
584 /* XXX: send to all CPUs ? */
585 /* XXX: add logic to handle multiple A20 line sources */
586 x86_cpu_set_a20(cpu
, level
);
589 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
591 int index
= le32_to_cpu(e820_reserve
.count
);
592 struct e820_entry
*entry
;
594 if (type
!= E820_RAM
) {
595 /* old FW_CFG_E820_TABLE entry -- reservations only */
596 if (index
>= E820_NR_ENTRIES
) {
599 entry
= &e820_reserve
.entry
[index
++];
601 entry
->address
= cpu_to_le64(address
);
602 entry
->length
= cpu_to_le64(length
);
603 entry
->type
= cpu_to_le32(type
);
605 e820_reserve
.count
= cpu_to_le32(index
);
608 /* new "etc/e820" file -- include ram too */
609 e820_table
= g_renew(struct e820_entry
, e820_table
, e820_entries
+ 1);
610 e820_table
[e820_entries
].address
= cpu_to_le64(address
);
611 e820_table
[e820_entries
].length
= cpu_to_le64(length
);
612 e820_table
[e820_entries
].type
= cpu_to_le32(type
);
618 int e820_get_num_entries(void)
623 bool e820_get_entry(int idx
, uint32_t type
, uint64_t *address
, uint64_t *length
)
625 if (idx
< e820_entries
&& e820_table
[idx
].type
== cpu_to_le32(type
)) {
626 *address
= le64_to_cpu(e820_table
[idx
].address
);
627 *length
= le64_to_cpu(e820_table
[idx
].length
);
633 /* Enables contiguous-apic-ID mode, for compatibility */
634 static bool compat_apic_id_mode
;
636 void enable_compat_apic_id_mode(void)
638 compat_apic_id_mode
= true;
641 /* Calculates initial APIC ID for a specific CPU index
643 * Currently we need to be able to calculate the APIC ID from the CPU index
644 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
645 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
646 * all CPUs up to max_cpus.
648 uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index
)
653 correct_id
= x86_apicid_from_cpu_idx(smp_cores
, smp_threads
, cpu_index
);
654 if (compat_apic_id_mode
) {
655 if (cpu_index
!= correct_id
&& !warned
) {
656 error_report("APIC IDs set in compatibility mode, "
657 "CPU topology won't match the configuration");
666 /* Calculates the limit to CPU APIC ID values
668 * This function returns the limit for the APIC ID value, so that all
669 * CPU APIC IDs are < pc_apic_id_limit().
671 * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
673 static unsigned int pc_apic_id_limit(unsigned int max_cpus
)
675 return x86_cpu_apic_id_from_index(max_cpus
- 1) + 1;
678 static FWCfgState
*bochs_bios_init(void)
681 uint8_t *smbios_tables
, *smbios_anchor
;
682 size_t smbios_tables_len
, smbios_anchor_len
;
683 uint64_t *numa_fw_cfg
;
685 unsigned int apic_id_limit
= pc_apic_id_limit(max_cpus
);
687 fw_cfg
= fw_cfg_init_io(BIOS_CFG_IOPORT
);
688 /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
690 * SeaBIOS needs FW_CFG_MAX_CPUS for CPU hotplug, but the CPU hotplug
691 * QEMU<->SeaBIOS interface is not based on the "CPU index", but on the APIC
692 * ID of hotplugged CPUs[1]. This means that FW_CFG_MAX_CPUS is not the
693 * "maximum number of CPUs", but the "limit to the APIC ID values SeaBIOS
696 * So, this means we must not use max_cpus, here, but the maximum possible
697 * APIC ID value, plus one.
699 * [1] The only kind of "CPU identifier" used between SeaBIOS and QEMU is
700 * the APIC ID, not the "CPU index"
702 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)apic_id_limit
);
703 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
704 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
705 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
,
706 acpi_tables
, acpi_tables_len
);
707 fw_cfg_add_i32(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, kvm_allows_irq0_override());
709 smbios_tables
= smbios_get_table_legacy(&smbios_tables_len
);
711 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
712 smbios_tables
, smbios_tables_len
);
715 smbios_get_tables(&smbios_tables
, &smbios_tables_len
,
716 &smbios_anchor
, &smbios_anchor_len
);
718 fw_cfg_add_file(fw_cfg
, "etc/smbios/smbios-tables",
719 smbios_tables
, smbios_tables_len
);
720 fw_cfg_add_file(fw_cfg
, "etc/smbios/smbios-anchor",
721 smbios_anchor
, smbios_anchor_len
);
724 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
,
725 &e820_reserve
, sizeof(e820_reserve
));
726 fw_cfg_add_file(fw_cfg
, "etc/e820", e820_table
,
727 sizeof(struct e820_entry
) * e820_entries
);
729 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, &hpet_cfg
, sizeof(hpet_cfg
));
730 /* allocate memory for the NUMA channel: one (64bit) word for the number
731 * of nodes, one word for each VCPU->node and one word for each node to
732 * hold the amount of memory.
734 numa_fw_cfg
= g_new0(uint64_t, 1 + apic_id_limit
+ nb_numa_nodes
);
735 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
736 for (i
= 0; i
< max_cpus
; i
++) {
737 unsigned int apic_id
= x86_cpu_apic_id_from_index(i
);
738 assert(apic_id
< apic_id_limit
);
739 for (j
= 0; j
< nb_numa_nodes
; j
++) {
740 if (test_bit(i
, numa_info
[j
].node_cpu
)) {
741 numa_fw_cfg
[apic_id
+ 1] = cpu_to_le64(j
);
746 for (i
= 0; i
< nb_numa_nodes
; i
++) {
747 numa_fw_cfg
[apic_id_limit
+ 1 + i
] = cpu_to_le64(numa_info
[i
].node_mem
);
749 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, numa_fw_cfg
,
750 (1 + apic_id_limit
+ nb_numa_nodes
) *
751 sizeof(*numa_fw_cfg
));
756 static long get_file_size(FILE *f
)
760 /* XXX: on Unix systems, using fstat() probably makes more sense */
763 fseek(f
, 0, SEEK_END
);
765 fseek(f
, where
, SEEK_SET
);
770 static void load_linux(FWCfgState
*fw_cfg
,
771 const char *kernel_filename
,
772 const char *initrd_filename
,
773 const char *kernel_cmdline
,
777 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
779 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
780 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
784 /* Align to 16 bytes as a paranoia measure */
785 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
787 /* load the kernel header */
788 f
= fopen(kernel_filename
, "rb");
789 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
790 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
791 MIN(ARRAY_SIZE(header
), kernel_size
)) {
792 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
793 kernel_filename
, strerror(errno
));
797 /* kernel protocol version */
799 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
801 if (ldl_p(header
+0x202) == 0x53726448) {
802 protocol
= lduw_p(header
+0x206);
804 /* This looks like a multiboot kernel. If it is, let's stop
805 treating it like a Linux kernel. */
806 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
807 kernel_cmdline
, kernel_size
, header
)) {
813 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
816 cmdline_addr
= 0x9a000 - cmdline_size
;
818 } else if (protocol
< 0x202) {
819 /* High but ancient kernel */
821 cmdline_addr
= 0x9a000 - cmdline_size
;
822 prot_addr
= 0x100000;
824 /* High and recent kernel */
826 cmdline_addr
= 0x20000;
827 prot_addr
= 0x100000;
832 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
833 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
834 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
840 /* highest address for loading the initrd */
841 if (protocol
>= 0x203) {
842 initrd_max
= ldl_p(header
+0x22c);
844 initrd_max
= 0x37ffffff;
847 if (initrd_max
>= max_ram_size
- acpi_data_size
) {
848 initrd_max
= max_ram_size
- acpi_data_size
- 1;
851 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
852 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
853 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
855 if (protocol
>= 0x202) {
856 stl_p(header
+0x228, cmdline_addr
);
858 stw_p(header
+0x20, 0xA33F);
859 stw_p(header
+0x22, cmdline_addr
-real_addr
);
862 /* handle vga= parameter */
863 vmode
= strstr(kernel_cmdline
, "vga=");
865 unsigned int video_mode
;
868 if (!strncmp(vmode
, "normal", 6)) {
870 } else if (!strncmp(vmode
, "ext", 3)) {
872 } else if (!strncmp(vmode
, "ask", 3)) {
875 video_mode
= strtol(vmode
, NULL
, 0);
877 stw_p(header
+0x1fa, video_mode
);
881 /* High nybble = B reserved for QEMU; low nybble is revision number.
882 If this code is substantially changed, you may want to consider
883 incrementing the revision. */
884 if (protocol
>= 0x200) {
885 header
[0x210] = 0xB0;
888 if (protocol
>= 0x201) {
889 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
890 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
894 if (initrd_filename
) {
895 if (protocol
< 0x200) {
896 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
900 initrd_size
= get_image_size(initrd_filename
);
901 if (initrd_size
< 0) {
902 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
903 initrd_filename
, strerror(errno
));
907 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
909 initrd_data
= g_malloc(initrd_size
);
910 load_image(initrd_filename
, initrd_data
);
912 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
913 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
914 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
916 stl_p(header
+0x218, initrd_addr
);
917 stl_p(header
+0x21c, initrd_size
);
920 /* load kernel and setup */
921 setup_size
= header
[0x1f1];
922 if (setup_size
== 0) {
925 setup_size
= (setup_size
+1)*512;
926 kernel_size
-= setup_size
;
928 setup
= g_malloc(setup_size
);
929 kernel
= g_malloc(kernel_size
);
930 fseek(f
, 0, SEEK_SET
);
931 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
932 fprintf(stderr
, "fread() failed\n");
935 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
936 fprintf(stderr
, "fread() failed\n");
940 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
942 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
943 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
944 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
946 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
947 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
948 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
950 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
951 option_rom
[nb_option_roms
].bootindex
= 0;
955 #define NE2000_NB_MAX 6
957 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
959 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
961 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
963 static int nb_ne2k
= 0;
965 if (nb_ne2k
== NE2000_NB_MAX
)
967 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
968 ne2000_irq
[nb_ne2k
], nd
);
972 DeviceState
*cpu_get_current_apic(void)
975 X86CPU
*cpu
= X86_CPU(current_cpu
);
976 return cpu
->apic_state
;
982 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
984 X86CPU
*cpu
= opaque
;
987 cpu_interrupt(CPU(cpu
), CPU_INTERRUPT_SMI
);
991 static X86CPU
*pc_new_cpu(const char *cpu_model
, int64_t apic_id
,
992 DeviceState
*icc_bridge
, Error
**errp
)
995 Error
*local_err
= NULL
;
997 cpu
= cpu_x86_create(cpu_model
, icc_bridge
, &local_err
);
998 if (local_err
!= NULL
) {
999 error_propagate(errp
, local_err
);
1003 object_property_set_int(OBJECT(cpu
), apic_id
, "apic-id", &local_err
);
1004 object_property_set_bool(OBJECT(cpu
), true, "realized", &local_err
);
1007 error_propagate(errp
, local_err
);
1008 object_unref(OBJECT(cpu
));
1014 static const char *current_cpu_model
;
1016 void pc_hot_add_cpu(const int64_t id
, Error
**errp
)
1018 DeviceState
*icc_bridge
;
1019 int64_t apic_id
= x86_cpu_apic_id_from_index(id
);
1022 error_setg(errp
, "Invalid CPU id: %" PRIi64
, id
);
1026 if (cpu_exists(apic_id
)) {
1027 error_setg(errp
, "Unable to add CPU: %" PRIi64
1028 ", it already exists", id
);
1032 if (id
>= max_cpus
) {
1033 error_setg(errp
, "Unable to add CPU: %" PRIi64
1034 ", max allowed: %d", id
, max_cpus
- 1);
1038 if (apic_id
>= ACPI_CPU_HOTPLUG_ID_LIMIT
) {
1039 error_setg(errp
, "Unable to add CPU: %" PRIi64
1040 ", resulting APIC ID (%" PRIi64
") is too large",
1045 icc_bridge
= DEVICE(object_resolve_path_type("icc-bridge",
1046 TYPE_ICC_BRIDGE
, NULL
));
1047 pc_new_cpu(current_cpu_model
, apic_id
, icc_bridge
, errp
);
1050 void pc_cpus_init(const char *cpu_model
, DeviceState
*icc_bridge
)
1054 Error
*error
= NULL
;
1055 unsigned long apic_id_limit
;
1058 if (cpu_model
== NULL
) {
1059 #ifdef TARGET_X86_64
1060 cpu_model
= "qemu64";
1062 cpu_model
= "qemu32";
1065 current_cpu_model
= cpu_model
;
1067 apic_id_limit
= pc_apic_id_limit(max_cpus
);
1068 if (apic_id_limit
> ACPI_CPU_HOTPLUG_ID_LIMIT
) {
1069 error_report("max_cpus is too large. APIC ID of last CPU is %lu",
1074 for (i
= 0; i
< smp_cpus
; i
++) {
1075 cpu
= pc_new_cpu(cpu_model
, x86_cpu_apic_id_from_index(i
),
1076 icc_bridge
, &error
);
1078 error_report("%s", error_get_pretty(error
));
1084 /* map APIC MMIO area if CPU has APIC */
1085 if (cpu
&& cpu
->apic_state
) {
1086 /* XXX: what if the base changes? */
1087 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge
), 0,
1088 APIC_DEFAULT_ADDRESS
, 0x1000);
1091 /* tell smbios about cpuid version and features */
1092 smbios_set_cpuid(cpu
->env
.cpuid_version
, cpu
->env
.features
[FEAT_1_EDX
]);
1095 /* pci-info ROM file. Little endian format */
1096 typedef struct PcRomPciInfo
{
1103 typedef struct PcGuestInfoState
{
1105 Notifier machine_done
;
1109 void pc_guest_info_machine_done(Notifier
*notifier
, void *data
)
1111 PcGuestInfoState
*guest_info_state
= container_of(notifier
,
1114 acpi_setup(&guest_info_state
->info
);
1117 PcGuestInfo
*pc_guest_info_init(ram_addr_t below_4g_mem_size
,
1118 ram_addr_t above_4g_mem_size
)
1120 PcGuestInfoState
*guest_info_state
= g_malloc0(sizeof *guest_info_state
);
1121 PcGuestInfo
*guest_info
= &guest_info_state
->info
;
1124 guest_info
->ram_size_below_4g
= below_4g_mem_size
;
1125 guest_info
->ram_size
= below_4g_mem_size
+ above_4g_mem_size
;
1126 guest_info
->apic_id_limit
= pc_apic_id_limit(max_cpus
);
1127 guest_info
->apic_xrupt_override
= kvm_allows_irq0_override();
1128 guest_info
->numa_nodes
= nb_numa_nodes
;
1129 guest_info
->node_mem
= g_malloc0(guest_info
->numa_nodes
*
1130 sizeof *guest_info
->node_mem
);
1131 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1132 guest_info
->node_mem
[i
] = numa_info
[i
].node_mem
;
1135 guest_info
->node_cpu
= g_malloc0(guest_info
->apic_id_limit
*
1136 sizeof *guest_info
->node_cpu
);
1138 for (i
= 0; i
< max_cpus
; i
++) {
1139 unsigned int apic_id
= x86_cpu_apic_id_from_index(i
);
1140 assert(apic_id
< guest_info
->apic_id_limit
);
1141 for (j
= 0; j
< nb_numa_nodes
; j
++) {
1142 if (test_bit(i
, numa_info
[j
].node_cpu
)) {
1143 guest_info
->node_cpu
[apic_id
] = j
;
1149 guest_info_state
->machine_done
.notify
= pc_guest_info_machine_done
;
1150 qemu_add_machine_init_done_notifier(&guest_info_state
->machine_done
);
1154 /* setup pci memory address space mapping into system address space */
1155 void pc_pci_as_mapping_init(Object
*owner
, MemoryRegion
*system_memory
,
1156 MemoryRegion
*pci_address_space
)
1158 /* Set to lower priority than RAM */
1159 memory_region_add_subregion_overlap(system_memory
, 0x0,
1160 pci_address_space
, -1);
1163 void pc_acpi_init(const char *default_dsdt
)
1167 if (acpi_tables
!= NULL
) {
1168 /* manually set via -acpitable, leave it alone */
1172 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, default_dsdt
);
1173 if (filename
== NULL
) {
1174 fprintf(stderr
, "WARNING: failed to find %s\n", default_dsdt
);
1180 arg
= g_strdup_printf("file=%s", filename
);
1182 /* creates a deep copy of "arg" */
1183 opts
= qemu_opts_parse(qemu_find_opts("acpi"), arg
, 0);
1184 g_assert(opts
!= NULL
);
1186 acpi_table_add_builtin(opts
, &err
);
1188 error_report("WARNING: failed to load %s: %s", filename
,
1189 error_get_pretty(err
));
1197 FWCfgState
*xen_load_linux(const char *kernel_filename
,
1198 const char *kernel_cmdline
,
1199 const char *initrd_filename
,
1200 ram_addr_t below_4g_mem_size
,
1201 PcGuestInfo
*guest_info
)
1206 assert(kernel_filename
!= NULL
);
1208 fw_cfg
= fw_cfg_init_io(BIOS_CFG_IOPORT
);
1211 load_linux(fw_cfg
, kernel_filename
, initrd_filename
,
1212 kernel_cmdline
, below_4g_mem_size
);
1213 for (i
= 0; i
< nb_option_roms
; i
++) {
1214 assert(!strcmp(option_rom
[i
].name
, "linuxboot.bin") ||
1215 !strcmp(option_rom
[i
].name
, "multiboot.bin"));
1216 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1218 guest_info
->fw_cfg
= fw_cfg
;
1222 FWCfgState
*pc_memory_init(MachineState
*machine
,
1223 MemoryRegion
*system_memory
,
1224 ram_addr_t below_4g_mem_size
,
1225 ram_addr_t above_4g_mem_size
,
1226 MemoryRegion
*rom_memory
,
1227 MemoryRegion
**ram_memory
,
1228 PcGuestInfo
*guest_info
)
1231 MemoryRegion
*ram
, *option_rom_mr
;
1232 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
1234 PCMachineState
*pcms
= PC_MACHINE(machine
);
1236 assert(machine
->ram_size
== below_4g_mem_size
+ above_4g_mem_size
);
1238 linux_boot
= (machine
->kernel_filename
!= NULL
);
1240 /* Allocate RAM. We allocate it as a single memory region and use
1241 * aliases to address portions of it, mostly for backwards compatibility
1242 * with older qemus that used qemu_ram_alloc().
1244 ram
= g_malloc(sizeof(*ram
));
1245 memory_region_allocate_system_memory(ram
, NULL
, "pc.ram",
1248 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
1249 memory_region_init_alias(ram_below_4g
, NULL
, "ram-below-4g", ram
,
1250 0, below_4g_mem_size
);
1251 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
1252 e820_add_entry(0, below_4g_mem_size
, E820_RAM
);
1253 if (above_4g_mem_size
> 0) {
1254 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
1255 memory_region_init_alias(ram_above_4g
, NULL
, "ram-above-4g", ram
,
1256 below_4g_mem_size
, above_4g_mem_size
);
1257 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
1259 e820_add_entry(0x100000000ULL
, above_4g_mem_size
, E820_RAM
);
1262 if (!guest_info
->has_reserved_memory
&&
1263 (machine
->ram_slots
||
1264 (machine
->maxram_size
> machine
->ram_size
))) {
1265 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1267 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
1272 /* initialize hotplug memory address space */
1273 if (guest_info
->has_reserved_memory
&&
1274 (machine
->ram_size
< machine
->maxram_size
)) {
1275 ram_addr_t hotplug_mem_size
=
1276 machine
->maxram_size
- machine
->ram_size
;
1278 if (machine
->ram_slots
> ACPI_MAX_RAM_SLOTS
) {
1279 error_report("unsupported amount of memory slots: %"PRIu64
,
1280 machine
->ram_slots
);
1284 pcms
->hotplug_memory_base
=
1285 ROUND_UP(0x100000000ULL
+ above_4g_mem_size
, 1ULL << 30);
1287 if (pcms
->enforce_aligned_dimm
) {
1288 /* size hotplug region assuming 1G page max alignment per slot */
1289 hotplug_mem_size
+= (1ULL << 30) * machine
->ram_slots
;
1292 if ((pcms
->hotplug_memory_base
+ hotplug_mem_size
) <
1294 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT
,
1295 machine
->maxram_size
);
1299 memory_region_init(&pcms
->hotplug_memory
, OBJECT(pcms
),
1300 "hotplug-memory", hotplug_mem_size
);
1301 memory_region_add_subregion(system_memory
, pcms
->hotplug_memory_base
,
1302 &pcms
->hotplug_memory
);
1305 /* Initialize PC system firmware */
1306 pc_system_firmware_init(rom_memory
, guest_info
->isapc_ram_fw
);
1308 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
1309 memory_region_init_ram(option_rom_mr
, NULL
, "pc.rom", PC_ROM_SIZE
,
1311 vmstate_register_ram_global(option_rom_mr
);
1312 memory_region_add_subregion_overlap(rom_memory
,
1317 fw_cfg
= bochs_bios_init();
1320 if (guest_info
->has_reserved_memory
&& pcms
->hotplug_memory_base
) {
1321 uint64_t *val
= g_malloc(sizeof(*val
));
1322 *val
= cpu_to_le64(ROUND_UP(pcms
->hotplug_memory_base
, 0x1ULL
<< 30));
1323 fw_cfg_add_file(fw_cfg
, "etc/reserved-memory-end", val
, sizeof(*val
));
1327 load_linux(fw_cfg
, machine
->kernel_filename
, machine
->initrd_filename
,
1328 machine
->kernel_cmdline
, below_4g_mem_size
);
1331 for (i
= 0; i
< nb_option_roms
; i
++) {
1332 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1334 guest_info
->fw_cfg
= fw_cfg
;
1338 qemu_irq
*pc_allocate_cpu_irq(void)
1340 return qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
1343 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1345 DeviceState
*dev
= NULL
;
1348 PCIDevice
*pcidev
= pci_vga_init(pci_bus
);
1349 dev
= pcidev
? &pcidev
->qdev
: NULL
;
1350 } else if (isa_bus
) {
1351 ISADevice
*isadev
= isa_vga_init(isa_bus
);
1352 dev
= isadev
? DEVICE(isadev
) : NULL
;
1357 static void cpu_request_exit(void *opaque
, int irq
, int level
)
1359 CPUState
*cpu
= current_cpu
;
1366 static const MemoryRegionOps ioport80_io_ops
= {
1367 .write
= ioport80_write
,
1368 .read
= ioport80_read
,
1369 .endianness
= DEVICE_NATIVE_ENDIAN
,
1371 .min_access_size
= 1,
1372 .max_access_size
= 1,
1376 static const MemoryRegionOps ioportF0_io_ops
= {
1377 .write
= ioportF0_write
,
1378 .read
= ioportF0_read
,
1379 .endianness
= DEVICE_NATIVE_ENDIAN
,
1381 .min_access_size
= 1,
1382 .max_access_size
= 1,
1386 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
1387 ISADevice
**rtc_state
,
1393 DriveInfo
*fd
[MAX_FD
];
1394 DeviceState
*hpet
= NULL
;
1395 int pit_isa_irq
= 0;
1396 qemu_irq pit_alt_irq
= NULL
;
1397 qemu_irq rtc_irq
= NULL
;
1399 ISADevice
*i8042
, *port92
, *vmmouse
, *pit
= NULL
;
1400 qemu_irq
*cpu_exit_irq
;
1401 MemoryRegion
*ioport80_io
= g_new(MemoryRegion
, 1);
1402 MemoryRegion
*ioportF0_io
= g_new(MemoryRegion
, 1);
1404 memory_region_init_io(ioport80_io
, NULL
, &ioport80_io_ops
, NULL
, "ioport80", 1);
1405 memory_region_add_subregion(isa_bus
->address_space_io
, 0x80, ioport80_io
);
1407 memory_region_init_io(ioportF0_io
, NULL
, &ioportF0_io_ops
, NULL
, "ioportF0", 1);
1408 memory_region_add_subregion(isa_bus
->address_space_io
, 0xf0, ioportF0_io
);
1411 * Check if an HPET shall be created.
1413 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1414 * when the HPET wants to take over. Thus we have to disable the latter.
1416 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1417 /* In order to set property, here not using sysbus_try_create_simple */
1418 hpet
= qdev_try_create(NULL
, TYPE_HPET
);
1420 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
1421 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
1424 uint8_t compat
= object_property_get_int(OBJECT(hpet
),
1427 qdev_prop_set_uint32(hpet
, HPET_INTCAP
, hpet_irqs
);
1429 qdev_init_nofail(hpet
);
1430 sysbus_mmio_map(SYS_BUS_DEVICE(hpet
), 0, HPET_BASE
);
1432 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1433 sysbus_connect_irq(SYS_BUS_DEVICE(hpet
), i
, gsi
[i
]);
1436 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1437 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1440 *rtc_state
= rtc_init(isa_bus
, 2000, rtc_irq
);
1442 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1444 if (!xen_enabled()) {
1445 if (kvm_irqchip_in_kernel()) {
1446 pit
= kvm_pit_init(isa_bus
, 0x40);
1448 pit
= pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1451 /* connect PIT to output control line of the HPET */
1452 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(DEVICE(pit
), 0));
1454 pcspk_init(isa_bus
, pit
);
1457 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1458 if (serial_hds
[i
]) {
1459 serial_isa_init(isa_bus
, i
, serial_hds
[i
]);
1463 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1464 if (parallel_hds
[i
]) {
1465 parallel_init(isa_bus
, i
, parallel_hds
[i
]);
1469 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1470 i8042
= isa_create_simple(isa_bus
, "i8042");
1471 i8042_setup_a20_line(i8042
, &a20_line
[0]);
1473 vmport_init(isa_bus
);
1474 vmmouse
= isa_try_create(isa_bus
, "vmmouse");
1479 DeviceState
*dev
= DEVICE(vmmouse
);
1480 qdev_prop_set_ptr(dev
, "ps2_mouse", i8042
);
1481 qdev_init_nofail(dev
);
1483 port92
= isa_create_simple(isa_bus
, "port92");
1484 port92_init(port92
, &a20_line
[1]);
1486 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
1487 DMA_init(0, cpu_exit_irq
);
1489 for(i
= 0; i
< MAX_FD
; i
++) {
1490 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1492 *floppy
= fdctrl_init_isa(isa_bus
, fd
);
1495 void pc_nic_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1499 for (i
= 0; i
< nb_nics
; i
++) {
1500 NICInfo
*nd
= &nd_table
[i
];
1502 if (!pci_bus
|| (nd
->model
&& strcmp(nd
->model
, "ne2k_isa") == 0)) {
1503 pc_init_ne2k_isa(isa_bus
, nd
);
1505 pci_nic_init_nofail(nd
, pci_bus
, "e1000", NULL
);
1510 void pc_pci_device_init(PCIBus
*pci_bus
)
1515 max_bus
= drive_get_max_bus(IF_SCSI
);
1516 for (bus
= 0; bus
<= max_bus
; bus
++) {
1517 pci_create_simple(pci_bus
, -1, "lsi53c895a");
1521 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
1527 if (kvm_irqchip_in_kernel()) {
1528 dev
= qdev_create(NULL
, "kvm-ioapic");
1530 dev
= qdev_create(NULL
, "ioapic");
1533 object_property_add_child(object_resolve_path(parent_name
, NULL
),
1534 "ioapic", OBJECT(dev
), NULL
);
1536 qdev_init_nofail(dev
);
1537 d
= SYS_BUS_DEVICE(dev
);
1538 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
1540 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
1541 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
1545 static void pc_generic_machine_class_init(ObjectClass
*oc
, void *data
)
1547 MachineClass
*mc
= MACHINE_CLASS(oc
);
1548 QEMUMachine
*qm
= data
;
1550 mc
->family
= qm
->family
;
1551 mc
->name
= qm
->name
;
1552 mc
->alias
= qm
->alias
;
1553 mc
->desc
= qm
->desc
;
1554 mc
->init
= qm
->init
;
1555 mc
->reset
= qm
->reset
;
1556 mc
->hot_add_cpu
= qm
->hot_add_cpu
;
1557 mc
->kvm_type
= qm
->kvm_type
;
1558 mc
->block_default_type
= qm
->block_default_type
;
1559 mc
->units_per_default_bus
= qm
->units_per_default_bus
;
1560 mc
->max_cpus
= qm
->max_cpus
;
1561 mc
->no_serial
= qm
->no_serial
;
1562 mc
->no_parallel
= qm
->no_parallel
;
1563 mc
->use_virtcon
= qm
->use_virtcon
;
1564 mc
->use_sclp
= qm
->use_sclp
;
1565 mc
->no_floppy
= qm
->no_floppy
;
1566 mc
->no_cdrom
= qm
->no_cdrom
;
1567 mc
->no_sdcard
= qm
->no_sdcard
;
1568 mc
->is_default
= qm
->is_default
;
1569 mc
->default_machine_opts
= qm
->default_machine_opts
;
1570 mc
->default_boot_order
= qm
->default_boot_order
;
1571 mc
->default_display
= qm
->default_display
;
1572 mc
->compat_props
= qm
->compat_props
;
1573 mc
->hw_version
= qm
->hw_version
;
1576 void qemu_register_pc_machine(QEMUMachine
*m
)
1578 char *name
= g_strconcat(m
->name
, TYPE_MACHINE_SUFFIX
, NULL
);
1581 .parent
= TYPE_PC_MACHINE
,
1582 .class_init
= pc_generic_machine_class_init
,
1583 .class_data
= (void *)m
,
1590 static void pc_dimm_plug(HotplugHandler
*hotplug_dev
,
1591 DeviceState
*dev
, Error
**errp
)
1594 HotplugHandlerClass
*hhc
;
1595 Error
*local_err
= NULL
;
1596 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1597 MachineState
*machine
= MACHINE(hotplug_dev
);
1598 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
1599 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
1600 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
1601 uint64_t existing_dimms_capacity
= 0;
1602 uint64_t align
= TARGET_PAGE_SIZE
;
1605 addr
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
, &local_err
);
1610 if (memory_region_get_alignment(mr
) && pcms
->enforce_aligned_dimm
) {
1611 align
= memory_region_get_alignment(mr
);
1614 addr
= pc_dimm_get_free_addr(pcms
->hotplug_memory_base
,
1615 memory_region_size(&pcms
->hotplug_memory
),
1616 !addr
? NULL
: &addr
, align
,
1617 memory_region_size(mr
), &local_err
);
1622 existing_dimms_capacity
= pc_existing_dimms_capacity(&local_err
);
1627 if (existing_dimms_capacity
+ memory_region_size(mr
) >
1628 machine
->maxram_size
- machine
->ram_size
) {
1629 error_setg(&local_err
, "not enough space, currently 0x%" PRIx64
1630 " in use of total hot pluggable 0x" RAM_ADDR_FMT
,
1631 existing_dimms_capacity
,
1632 machine
->maxram_size
- machine
->ram_size
);
1636 object_property_set_int(OBJECT(dev
), addr
, PC_DIMM_ADDR_PROP
, &local_err
);
1640 trace_mhp_pc_dimm_assigned_address(addr
);
1642 slot
= object_property_get_int(OBJECT(dev
), PC_DIMM_SLOT_PROP
, &local_err
);
1647 slot
= pc_dimm_get_free_slot(slot
== PC_DIMM_UNASSIGNED_SLOT
? NULL
: &slot
,
1648 machine
->ram_slots
, &local_err
);
1652 object_property_set_int(OBJECT(dev
), slot
, PC_DIMM_SLOT_PROP
, &local_err
);
1656 trace_mhp_pc_dimm_assigned_slot(slot
);
1658 if (!pcms
->acpi_dev
) {
1659 error_setg(&local_err
,
1660 "memory hotplug is not enabled: missing acpi device");
1664 if (kvm_enabled() && !kvm_has_free_slot(machine
)) {
1665 error_setg(&local_err
, "hypervisor has no free memory slots left");
1669 memory_region_add_subregion(&pcms
->hotplug_memory
,
1670 addr
- pcms
->hotplug_memory_base
, mr
);
1671 vmstate_register_ram(mr
, dev
);
1673 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1674 hhc
->plug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1676 error_propagate(errp
, local_err
);
1679 static void pc_cpu_plug(HotplugHandler
*hotplug_dev
,
1680 DeviceState
*dev
, Error
**errp
)
1682 HotplugHandlerClass
*hhc
;
1683 Error
*local_err
= NULL
;
1684 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1686 if (!dev
->hotplugged
) {
1690 if (!pcms
->acpi_dev
) {
1691 error_setg(&local_err
,
1692 "cpu hotplug is not enabled: missing acpi device");
1696 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1697 hhc
->plug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1702 /* increment the number of CPUs */
1703 rtc_set_memory(pcms
->rtc
, 0x5f, rtc_get_memory(pcms
->rtc
, 0x5f) + 1);
1705 error_propagate(errp
, local_err
);
1708 static void pc_machine_device_plug_cb(HotplugHandler
*hotplug_dev
,
1709 DeviceState
*dev
, Error
**errp
)
1711 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1712 pc_dimm_plug(hotplug_dev
, dev
, errp
);
1713 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1714 pc_cpu_plug(hotplug_dev
, dev
, errp
);
1718 static HotplugHandler
*pc_get_hotpug_handler(MachineState
*machine
,
1721 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(machine
);
1723 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
1724 object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1725 return HOTPLUG_HANDLER(machine
);
1728 return pcmc
->get_hotplug_handler
?
1729 pcmc
->get_hotplug_handler(machine
, dev
) : NULL
;
1733 pc_machine_get_hotplug_memory_region_size(Object
*obj
, Visitor
*v
, void *opaque
,
1734 const char *name
, Error
**errp
)
1736 PCMachineState
*pcms
= PC_MACHINE(obj
);
1737 int64_t value
= memory_region_size(&pcms
->hotplug_memory
);
1739 visit_type_int(v
, &value
, name
, errp
);
1742 static void pc_machine_get_max_ram_below_4g(Object
*obj
, Visitor
*v
,
1743 void *opaque
, const char *name
,
1746 PCMachineState
*pcms
= PC_MACHINE(obj
);
1747 uint64_t value
= pcms
->max_ram_below_4g
;
1749 visit_type_size(v
, &value
, name
, errp
);
1752 static void pc_machine_set_max_ram_below_4g(Object
*obj
, Visitor
*v
,
1753 void *opaque
, const char *name
,
1756 PCMachineState
*pcms
= PC_MACHINE(obj
);
1757 Error
*error
= NULL
;
1760 visit_type_size(v
, &value
, name
, &error
);
1762 error_propagate(errp
, error
);
1765 if (value
> (1ULL << 32)) {
1766 error_set(&error
, ERROR_CLASS_GENERIC_ERROR
,
1767 "Machine option 'max-ram-below-4g=%"PRIu64
1768 "' expects size less than or equal to 4G", value
);
1769 error_propagate(errp
, error
);
1773 if (value
< (1ULL << 20)) {
1774 error_report("Warning: small max_ram_below_4g(%"PRIu64
1775 ") less than 1M. BIOS may not work..",
1779 pcms
->max_ram_below_4g
= value
;
1782 static void pc_machine_get_vmport(Object
*obj
, Visitor
*v
, void *opaque
,
1783 const char *name
, Error
**errp
)
1785 PCMachineState
*pcms
= PC_MACHINE(obj
);
1786 OnOffAuto vmport
= pcms
->vmport
;
1788 visit_type_OnOffAuto(v
, &vmport
, name
, errp
);
1791 static void pc_machine_set_vmport(Object
*obj
, Visitor
*v
, void *opaque
,
1792 const char *name
, Error
**errp
)
1794 PCMachineState
*pcms
= PC_MACHINE(obj
);
1796 visit_type_OnOffAuto(v
, &pcms
->vmport
, name
, errp
);
1799 static bool pc_machine_get_aligned_dimm(Object
*obj
, Error
**errp
)
1801 PCMachineState
*pcms
= PC_MACHINE(obj
);
1803 return pcms
->enforce_aligned_dimm
;
1806 static void pc_machine_initfn(Object
*obj
)
1808 PCMachineState
*pcms
= PC_MACHINE(obj
);
1810 object_property_add(obj
, PC_MACHINE_MEMHP_REGION_SIZE
, "int",
1811 pc_machine_get_hotplug_memory_region_size
,
1812 NULL
, NULL
, NULL
, NULL
);
1814 pcms
->max_ram_below_4g
= 1ULL << 32; /* 4G */
1815 object_property_add(obj
, PC_MACHINE_MAX_RAM_BELOW_4G
, "size",
1816 pc_machine_get_max_ram_below_4g
,
1817 pc_machine_set_max_ram_below_4g
,
1819 object_property_set_description(obj
, PC_MACHINE_MAX_RAM_BELOW_4G
,
1820 "Maximum ram below the 4G boundary (32bit boundary)",
1823 pcms
->vmport
= ON_OFF_AUTO_AUTO
;
1824 object_property_add(obj
, PC_MACHINE_VMPORT
, "OnOffAuto",
1825 pc_machine_get_vmport
,
1826 pc_machine_set_vmport
,
1828 object_property_set_description(obj
, PC_MACHINE_VMPORT
,
1829 "Enable vmport (pc & q35)",
1832 pcms
->enforce_aligned_dimm
= true;
1833 object_property_add_bool(obj
, PC_MACHINE_ENFORCE_ALIGNED_DIMM
,
1834 pc_machine_get_aligned_dimm
,
1838 static void pc_machine_class_init(ObjectClass
*oc
, void *data
)
1840 MachineClass
*mc
= MACHINE_CLASS(oc
);
1841 PCMachineClass
*pcmc
= PC_MACHINE_CLASS(oc
);
1842 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
1844 pcmc
->get_hotplug_handler
= mc
->get_hotplug_handler
;
1845 mc
->get_hotplug_handler
= pc_get_hotpug_handler
;
1846 hc
->plug
= pc_machine_device_plug_cb
;
1849 static const TypeInfo pc_machine_info
= {
1850 .name
= TYPE_PC_MACHINE
,
1851 .parent
= TYPE_MACHINE
,
1853 .instance_size
= sizeof(PCMachineState
),
1854 .instance_init
= pc_machine_initfn
,
1855 .class_size
= sizeof(PCMachineClass
),
1856 .class_init
= pc_machine_class_init
,
1857 .interfaces
= (InterfaceInfo
[]) {
1858 { TYPE_HOTPLUG_HANDLER
},
1863 static void pc_machine_register_types(void)
1865 type_register_static(&pc_machine_info
);
1868 type_init(pc_machine_register_types
)