1 /* QEMU Synchronous Serial Interface support. */
3 /* In principle SSI is a point-point interface. As such the qemu
4 implementation has a single slave device on a "bus".
5 However it is fairly common for boards to have multiple slaves
6 connected to a single master, and select devices with an external
7 chip select. This is implemented in qemu by having an explicit mux device.
8 It is assumed that master and slave are both using the same transfer width.
16 typedef struct SSISlave SSISlave
;
18 #define TYPE_SSI_SLAVE "ssi-slave"
19 #define SSI_SLAVE(obj) \
20 OBJECT_CHECK(SSISlave, (obj), TYPE_SSI_SLAVE)
21 #define SSI_SLAVE_CLASS(klass) \
22 OBJECT_CLASS_CHECK(SSISlaveClass, (klass), TYPE_SSI_SLAVE)
23 #define SSI_SLAVE_GET_CLASS(obj) \
24 OBJECT_GET_CLASS(SSISlaveClass, (obj), TYPE_SSI_SLAVE)
27 typedef struct SSISlaveClass
{
28 DeviceClass parent_class
;
30 int (*init
)(SSISlave
*dev
);
31 uint32_t (*transfer
)(SSISlave
*dev
, uint32_t val
);
38 #define SSI_SLAVE_FROM_QDEV(dev) DO_UPCAST(SSISlave, qdev, dev)
39 #define FROM_SSI_SLAVE(type, dev) DO_UPCAST(type, ssidev, dev)
41 void ssi_register_slave(DeviceInfo
*info
);
43 DeviceState
*ssi_create_slave(SSIBus
*bus
, const char *name
);
45 /* Master interface. */
46 SSIBus
*ssi_create_bus(DeviceState
*parent
, const char *name
);
48 uint32_t ssi_transfer(SSIBus
*bus
, uint32_t val
);
51 void max111x_set_input(DeviceState
*dev
, int line
, uint8_t value
);