1 /* opcodes/i386-dis.c r1.126 */
2 /* Print i386 instructions for GDB, the GNU debugger.
3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
34 #include "qemu/osdep.h"
35 #include "disas/bfd.h"
36 #include "qemu/cutils.h"
38 /* include/opcode/i386.h r1.78 */
40 /* opcode/i386.h -- Intel 80386 opcode macros
41 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
42 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
43 Free Software Foundation, Inc.
45 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
47 This program is free software; you can redistribute it and/or modify
48 it under the terms of the GNU General Public License as published by
49 the Free Software Foundation; either version 2 of the License, or
50 (at your option) any later version.
52 This program is distributed in the hope that it will be useful,
53 but WITHOUT ANY WARRANTY; without even the implied warranty of
54 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
55 GNU General Public License for more details.
57 You should have received a copy of the GNU General Public License
58 along with this program; if not, see <http://www.gnu.org/licenses/>. */
60 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
61 ix86 Unix assemblers, generate floating point instructions with
62 reversed source and destination registers in certain cases.
63 Unfortunately, gcc and possibly many other programs use this
64 reversed syntax, so we're stuck with it.
66 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
67 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
68 the expected st(3) = st(3) - st
70 This happens with all the non-commutative arithmetic floating point
71 operations with two register operands, where the source register is
72 %st, and destination register is %st(i).
74 The affected opcode map is dceX, dcfX, deeX, defX. */
76 #ifndef SYSV386_COMPAT
77 /* Set non-zero for broken, compatible instructions. Set to zero for
78 non-broken opcodes at your peril. gcc generates SystemV/386
79 compatible instructions. */
80 #define SYSV386_COMPAT 1
83 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
84 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
86 #define OLDGCC_COMPAT SYSV386_COMPAT
89 #define MOV_AX_DISP32 0xa0
90 #define POP_SEG_SHORT 0x07
91 #define JUMP_PC_RELATIVE 0xeb
92 #define INT_OPCODE 0xcd
93 #define INT3_OPCODE 0xcc
94 /* The opcode for the fwait instruction, which disassembler treats as a
95 prefix when it can. */
96 #define FWAIT_OPCODE 0x9b
97 #define ADDR_PREFIX_OPCODE 0x67
98 #define DATA_PREFIX_OPCODE 0x66
99 #define LOCK_PREFIX_OPCODE 0xf0
100 #define CS_PREFIX_OPCODE 0x2e
101 #define DS_PREFIX_OPCODE 0x3e
102 #define ES_PREFIX_OPCODE 0x26
103 #define FS_PREFIX_OPCODE 0x64
104 #define GS_PREFIX_OPCODE 0x65
105 #define SS_PREFIX_OPCODE 0x36
106 #define REPNE_PREFIX_OPCODE 0xf2
107 #define REPE_PREFIX_OPCODE 0xf3
109 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
110 #define NOP_OPCODE (char) 0x90
112 /* register numbers */
113 #define EBP_REG_NUM 5
114 #define ESP_REG_NUM 4
116 /* modrm_byte.regmem for twobyte escape */
117 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
118 /* index_base_byte.index for no index register addressing */
119 #define NO_INDEX_REGISTER ESP_REG_NUM
120 /* index_base_byte.base for no base register addressing */
121 #define NO_BASE_REGISTER EBP_REG_NUM
122 #define NO_BASE_REGISTER_16 6
124 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
125 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
126 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
128 /* x86-64 extension prefix. */
129 #define REX_OPCODE 0x40
131 /* Indicates 64 bit operand size. */
133 /* High extension to reg field of modrm byte. */
135 /* High extension to SIB index field. */
137 /* High extension to base field of modrm or SIB, or reg field of opcode. */
140 /* max operands per insn */
141 #define MAX_OPERANDS 4
143 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
144 #define MAX_IMMEDIATE_OPERANDS 2
146 /* max memory refs per insn (string ops) */
147 #define MAX_MEMORY_OPERANDS 2
149 /* max size of insn mnemonics. */
150 #define MAX_MNEM_SIZE 16
152 /* max size of register name in insn mnemonics. */
153 #define MAX_REG_NAME_SIZE 8
155 /* opcodes/i386-dis.c r1.126 */
156 #include "qemu-common.h"
160 static int fetch_data2(struct disassemble_info
*, bfd_byte
*);
161 static int fetch_data(struct disassemble_info
*, bfd_byte
*);
162 static void ckprefix (void);
163 static const char *prefix_name (int, int);
164 static int print_insn (bfd_vma
, disassemble_info
*);
165 static void dofloat (int);
166 static void OP_ST (int, int);
167 static void OP_STi (int, int);
168 static int putop (const char *, int);
169 static void oappend (const char *);
170 static void append_seg (void);
171 static void OP_indirE (int, int);
172 static void print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
);
173 static void print_displacement (char *, bfd_vma
);
174 static void OP_E (int, int);
175 static void OP_G (int, int);
176 static void OP_vvvv (int, int);
177 static bfd_vma
get64 (void);
178 static bfd_signed_vma
get32 (void);
179 static bfd_signed_vma
get32s (void);
180 static int get16 (void);
181 static void set_op (bfd_vma
, int);
182 static void OP_REG (int, int);
183 static void OP_IMREG (int, int);
184 static void OP_I (int, int);
185 static void OP_I64 (int, int);
186 static void OP_sI (int, int);
187 static void OP_J (int, int);
188 static void OP_SEG (int, int);
189 static void OP_DIR (int, int);
190 static void OP_OFF (int, int);
191 static void OP_OFF64 (int, int);
192 static void ptr_reg (int, int);
193 static void OP_ESreg (int, int);
194 static void OP_DSreg (int, int);
195 static void OP_C (int, int);
196 static void OP_D (int, int);
197 static void OP_T (int, int);
198 static void OP_R (int, int);
199 static void OP_MMX (int, int);
200 static void OP_XMM (int, int);
201 static void OP_EM (int, int);
202 static void OP_EX (int, int);
203 static void OP_EMC (int,int);
204 static void OP_MXC (int,int);
205 static void OP_MS (int, int);
206 static void OP_XS (int, int);
207 static void OP_M (int, int);
208 static void OP_VMX (int, int);
209 static void OP_0fae (int, int);
210 static void OP_0f07 (int, int);
211 static void NOP_Fixup1 (int, int);
212 static void NOP_Fixup2 (int, int);
213 static void OP_3DNowSuffix (int, int);
214 static void OP_SIMD_Suffix (int, int);
215 static void SIMD_Fixup (int, int);
216 static void PNI_Fixup (int, int);
217 static void SVME_Fixup (int, int);
218 static void INVLPG_Fixup (int, int);
219 static void BadOp (void);
220 static void VMX_Fixup (int, int);
221 static void REP_Fixup (int, int);
222 static void CMPXCHG8B_Fixup (int, int);
223 static void XMM_Fixup (int, int);
224 static void CRC32_Fixup (int, int);
227 /* Points to first byte not fetched. */
228 bfd_byte
*max_fetched
;
229 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
242 static enum address_mode address_mode
;
244 /* Flags for the prefixes for the current instruction. See below. */
247 /* REX prefix the current instruction. See below. */
249 /* Bits of REX we've already used. */
251 /* Mark parts used in the REX prefix. When we are testing for
252 empty prefix (for 8bit register REX extension), just mask it
253 out. Otherwise test for REX bit is excuse for existence of REX
254 only in case value is nonzero. */
255 #define USED_REX(value) \
260 rex_used |= (value) | REX_OPCODE; \
263 rex_used |= REX_OPCODE; \
266 /* Flags for prefixes which we somehow handled when printing the
267 current instruction. */
268 static int used_prefixes
;
270 /* The VEX.vvvv register, unencoded. */
273 /* Flags stored in PREFIXES. */
274 #define PREFIX_REPZ 1
275 #define PREFIX_REPNZ 2
276 #define PREFIX_LOCK 4
278 #define PREFIX_SS 0x10
279 #define PREFIX_DS 0x20
280 #define PREFIX_ES 0x40
281 #define PREFIX_FS 0x80
282 #define PREFIX_GS 0x100
283 #define PREFIX_DATA 0x200
284 #define PREFIX_ADDR 0x400
285 #define PREFIX_FWAIT 0x800
287 #define PREFIX_VEX_0F 0x1000
288 #define PREFIX_VEX_0F38 0x2000
289 #define PREFIX_VEX_0F3A 0x4000
291 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
292 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
295 fetch_data2(struct disassemble_info
*info
, bfd_byte
*addr
)
298 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
299 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
301 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
302 status
= (*info
->read_memory_func
) (start
,
304 addr
- priv
->max_fetched
,
310 /* If we did manage to read at least one byte, then
311 print_insn_i386 will do something sensible. Otherwise, print
312 an error. We do that here because this is where we know
314 if (priv
->max_fetched
== priv
->the_buffer
)
315 (*info
->memory_error_func
) (status
, start
, info
);
316 siglongjmp(priv
->bailout
, 1);
319 priv
->max_fetched
= addr
;
324 fetch_data(struct disassemble_info
*info
, bfd_byte
*addr
)
326 if (addr
<= ((struct dis_private
*) (info
->private_data
))->max_fetched
) {
329 return fetch_data2(info
, addr
);
334 #define XX { NULL, 0 }
336 #define Bv { OP_vvvv, v_mode }
337 #define Eb { OP_E, b_mode }
338 #define Ev { OP_E, v_mode }
339 #define Ed { OP_E, d_mode }
340 #define Edq { OP_E, dq_mode }
341 #define Edqw { OP_E, dqw_mode }
342 #define Edqb { OP_E, dqb_mode }
343 #define Edqd { OP_E, dqd_mode }
344 #define indirEv { OP_indirE, stack_v_mode }
345 #define indirEp { OP_indirE, f_mode }
346 #define stackEv { OP_E, stack_v_mode }
347 #define Em { OP_E, m_mode }
348 #define Ew { OP_E, w_mode }
349 #define M { OP_M, 0 } /* lea, lgdt, etc. */
350 #define Ma { OP_M, v_mode }
351 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
352 #define Mq { OP_M, q_mode }
353 #define Gb { OP_G, b_mode }
354 #define Gv { OP_G, v_mode }
355 #define Gd { OP_G, d_mode }
356 #define Gdq { OP_G, dq_mode }
357 #define Gm { OP_G, m_mode }
358 #define Gw { OP_G, w_mode }
359 #define Rd { OP_R, d_mode }
360 #define Rm { OP_R, m_mode }
361 #define Ib { OP_I, b_mode }
362 #define sIb { OP_sI, b_mode } /* sign extended byte */
363 #define Iv { OP_I, v_mode }
364 #define Iq { OP_I, q_mode }
365 #define Iv64 { OP_I64, v_mode }
366 #define Iw { OP_I, w_mode }
367 #define I1 { OP_I, const_1_mode }
368 #define Jb { OP_J, b_mode }
369 #define Jv { OP_J, v_mode }
370 #define Cm { OP_C, m_mode }
371 #define Dm { OP_D, m_mode }
372 #define Td { OP_T, d_mode }
374 #define RMeAX { OP_REG, eAX_reg }
375 #define RMeBX { OP_REG, eBX_reg }
376 #define RMeCX { OP_REG, eCX_reg }
377 #define RMeDX { OP_REG, eDX_reg }
378 #define RMeSP { OP_REG, eSP_reg }
379 #define RMeBP { OP_REG, eBP_reg }
380 #define RMeSI { OP_REG, eSI_reg }
381 #define RMeDI { OP_REG, eDI_reg }
382 #define RMrAX { OP_REG, rAX_reg }
383 #define RMrBX { OP_REG, rBX_reg }
384 #define RMrCX { OP_REG, rCX_reg }
385 #define RMrDX { OP_REG, rDX_reg }
386 #define RMrSP { OP_REG, rSP_reg }
387 #define RMrBP { OP_REG, rBP_reg }
388 #define RMrSI { OP_REG, rSI_reg }
389 #define RMrDI { OP_REG, rDI_reg }
390 #define RMAL { OP_REG, al_reg }
391 #define RMAL { OP_REG, al_reg }
392 #define RMCL { OP_REG, cl_reg }
393 #define RMDL { OP_REG, dl_reg }
394 #define RMBL { OP_REG, bl_reg }
395 #define RMAH { OP_REG, ah_reg }
396 #define RMCH { OP_REG, ch_reg }
397 #define RMDH { OP_REG, dh_reg }
398 #define RMBH { OP_REG, bh_reg }
399 #define RMAX { OP_REG, ax_reg }
400 #define RMDX { OP_REG, dx_reg }
402 #define eAX { OP_IMREG, eAX_reg }
403 #define eBX { OP_IMREG, eBX_reg }
404 #define eCX { OP_IMREG, eCX_reg }
405 #define eDX { OP_IMREG, eDX_reg }
406 #define eSP { OP_IMREG, eSP_reg }
407 #define eBP { OP_IMREG, eBP_reg }
408 #define eSI { OP_IMREG, eSI_reg }
409 #define eDI { OP_IMREG, eDI_reg }
410 #define AL { OP_IMREG, al_reg }
411 #define CL { OP_IMREG, cl_reg }
412 #define DL { OP_IMREG, dl_reg }
413 #define BL { OP_IMREG, bl_reg }
414 #define AH { OP_IMREG, ah_reg }
415 #define CH { OP_IMREG, ch_reg }
416 #define DH { OP_IMREG, dh_reg }
417 #define BH { OP_IMREG, bh_reg }
418 #define AX { OP_IMREG, ax_reg }
419 #define DX { OP_IMREG, dx_reg }
420 #define zAX { OP_IMREG, z_mode_ax_reg }
421 #define indirDX { OP_IMREG, indir_dx_reg }
423 #define Sw { OP_SEG, w_mode }
424 #define Sv { OP_SEG, v_mode }
425 #define Ap { OP_DIR, 0 }
426 #define Ob { OP_OFF64, b_mode }
427 #define Ov { OP_OFF64, v_mode }
428 #define Xb { OP_DSreg, eSI_reg }
429 #define Xv { OP_DSreg, eSI_reg }
430 #define Xz { OP_DSreg, eSI_reg }
431 #define Yb { OP_ESreg, eDI_reg }
432 #define Yv { OP_ESreg, eDI_reg }
433 #define DSBX { OP_DSreg, eBX_reg }
435 #define es { OP_REG, es_reg }
436 #define ss { OP_REG, ss_reg }
437 #define cs { OP_REG, cs_reg }
438 #define ds { OP_REG, ds_reg }
439 #define fs { OP_REG, fs_reg }
440 #define gs { OP_REG, gs_reg }
442 #define MX { OP_MMX, 0 }
443 #define XM { OP_XMM, 0 }
444 #define EM { OP_EM, v_mode }
445 #define EMd { OP_EM, d_mode }
446 #define EMq { OP_EM, q_mode }
447 #define EXd { OP_EX, d_mode }
448 #define EXq { OP_EX, q_mode }
449 #define EXx { OP_EX, x_mode }
450 #define MS { OP_MS, v_mode }
451 #define XS { OP_XS, v_mode }
452 #define EMC { OP_EMC, v_mode }
453 #define MXC { OP_MXC, 0 }
454 #define VM { OP_VMX, q_mode }
455 #define OPSUF { OP_3DNowSuffix, 0 }
456 #define OPSIMD { OP_SIMD_Suffix, 0 }
457 #define XMM0 { XMM_Fixup, 0 }
459 /* Used handle "rep" prefix for string instructions. */
460 #define Xbr { REP_Fixup, eSI_reg }
461 #define Xvr { REP_Fixup, eSI_reg }
462 #define Ybr { REP_Fixup, eDI_reg }
463 #define Yvr { REP_Fixup, eDI_reg }
464 #define Yzr { REP_Fixup, eDI_reg }
465 #define indirDXr { REP_Fixup, indir_dx_reg }
466 #define ALr { REP_Fixup, al_reg }
467 #define eAXr { REP_Fixup, eAX_reg }
469 #define cond_jump_flag { NULL, cond_jump_mode }
470 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
472 /* bits in sizeflag */
473 #define SUFFIX_ALWAYS 4
477 #define b_mode 1 /* byte operand */
478 #define v_mode 2 /* operand size depends on prefixes */
479 #define w_mode 3 /* word operand */
480 #define d_mode 4 /* double word operand */
481 #define q_mode 5 /* quad word operand */
482 #define t_mode 6 /* ten-byte operand */
483 #define x_mode 7 /* 16-byte XMM operand */
484 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
485 #define cond_jump_mode 9
486 #define loop_jcxz_mode 10
487 #define dq_mode 11 /* operand size depends on REX prefixes. */
488 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
489 #define f_mode 13 /* 4- or 6-byte pointer operand */
490 #define const_1_mode 14
491 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
492 #define z_mode 16 /* non-quad operand size depends on prefixes */
493 #define o_mode 17 /* 16-byte operand */
494 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
495 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
540 #define z_mode_ax_reg 149
541 #define indir_dx_reg 150
545 #define USE_PREFIX_USER_TABLE 3
546 #define X86_64_SPECIAL 4
547 #define IS_3BYTE_OPCODE 5
549 #define FLOAT NULL, { { NULL, FLOATCODE } }
551 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
552 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
553 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
554 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
555 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
556 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
557 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
558 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
559 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
560 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
561 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
562 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
563 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
564 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
565 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
566 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
567 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
568 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
569 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
570 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
571 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
572 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
573 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
574 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
575 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
576 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
577 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
578 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
580 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
581 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
582 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
583 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
584 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
585 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
586 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
587 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
588 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
589 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
590 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
591 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
592 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
593 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
594 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
595 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
596 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
597 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
598 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
599 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
600 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
601 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
602 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
603 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
604 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
605 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
606 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
607 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
608 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
609 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
610 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
611 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
612 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
613 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
614 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
615 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
616 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
617 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
618 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
619 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
620 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
621 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
622 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
623 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
624 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
625 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
626 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
627 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
628 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
629 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
630 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
631 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
632 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
633 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
634 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
635 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
636 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
637 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
638 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
639 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
640 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
641 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
642 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
643 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
644 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
645 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
646 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
647 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
648 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
649 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
650 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
651 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
652 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
653 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
654 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
655 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
656 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
657 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
658 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
659 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
660 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
661 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
662 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
663 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
664 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
665 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
666 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
667 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
668 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
669 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
670 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
671 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
672 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
673 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
674 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
675 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
676 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
677 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
678 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
679 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
680 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
681 #define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
682 #define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
683 #define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
684 #define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
685 #define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
686 #define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
688 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
689 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
690 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
691 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
693 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
694 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
696 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
707 /* Upper case letters in the instruction names here are macros.
708 'A' => print 'b' if no register operands or suffix_always is true
709 'B' => print 'b' if suffix_always is true
710 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
712 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
713 . suffix_always is true
714 'E' => print 'e' if 32-bit form of jcxz
715 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
716 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
717 'H' => print ",pt" or ",pn" branch hint
718 'I' => honor following macro letter even in Intel mode (implemented only
719 . for some of the macro letters)
721 'K' => print 'd' or 'q' if rex prefix is present.
722 'L' => print 'l' if suffix_always is true
723 'N' => print 'n' if instruction has no wait "prefix"
724 'O' => print 'd' or 'o' (or 'q' in Intel mode)
725 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
726 . or suffix_always is true. print 'q' if rex prefix is present.
727 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
729 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
730 'S' => print 'w', 'l' or 'q' if suffix_always is true
731 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
732 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
733 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
734 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
735 'X' => print 's', 'd' depending on data16 prefix (for XMM)
736 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
737 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
739 Many of the above letters print nothing in Intel mode. See "putop"
742 Braces '{' and '}', and vertical bars '|', indicate alternative
743 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
744 modes. In cases where there are only two alternatives, the X86_64
745 instruction is reserved, and "(bad)" is printed.
748 static const struct dis386 dis386
[] = {
750 { "addB", { Eb
, Gb
} },
751 { "addS", { Ev
, Gv
} },
752 { "addB", { Gb
, Eb
} },
753 { "addS", { Gv
, Ev
} },
754 { "addB", { AL
, Ib
} },
755 { "addS", { eAX
, Iv
} },
756 { "push{T|}", { es
} },
757 { "pop{T|}", { es
} },
759 { "orB", { Eb
, Gb
} },
760 { "orS", { Ev
, Gv
} },
761 { "orB", { Gb
, Eb
} },
762 { "orS", { Gv
, Ev
} },
763 { "orB", { AL
, Ib
} },
764 { "orS", { eAX
, Iv
} },
765 { "push{T|}", { cs
} },
766 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
768 { "adcB", { Eb
, Gb
} },
769 { "adcS", { Ev
, Gv
} },
770 { "adcB", { Gb
, Eb
} },
771 { "adcS", { Gv
, Ev
} },
772 { "adcB", { AL
, Ib
} },
773 { "adcS", { eAX
, Iv
} },
774 { "push{T|}", { ss
} },
775 { "pop{T|}", { ss
} },
777 { "sbbB", { Eb
, Gb
} },
778 { "sbbS", { Ev
, Gv
} },
779 { "sbbB", { Gb
, Eb
} },
780 { "sbbS", { Gv
, Ev
} },
781 { "sbbB", { AL
, Ib
} },
782 { "sbbS", { eAX
, Iv
} },
783 { "push{T|}", { ds
} },
784 { "pop{T|}", { ds
} },
786 { "andB", { Eb
, Gb
} },
787 { "andS", { Ev
, Gv
} },
788 { "andB", { Gb
, Eb
} },
789 { "andS", { Gv
, Ev
} },
790 { "andB", { AL
, Ib
} },
791 { "andS", { eAX
, Iv
} },
792 { "(bad)", { XX
} }, /* SEG ES prefix */
793 { "daa{|}", { XX
} },
795 { "subB", { Eb
, Gb
} },
796 { "subS", { Ev
, Gv
} },
797 { "subB", { Gb
, Eb
} },
798 { "subS", { Gv
, Ev
} },
799 { "subB", { AL
, Ib
} },
800 { "subS", { eAX
, Iv
} },
801 { "(bad)", { XX
} }, /* SEG CS prefix */
802 { "das{|}", { XX
} },
804 { "xorB", { Eb
, Gb
} },
805 { "xorS", { Ev
, Gv
} },
806 { "xorB", { Gb
, Eb
} },
807 { "xorS", { Gv
, Ev
} },
808 { "xorB", { AL
, Ib
} },
809 { "xorS", { eAX
, Iv
} },
810 { "(bad)", { XX
} }, /* SEG SS prefix */
811 { "aaa{|}", { XX
} },
813 { "cmpB", { Eb
, Gb
} },
814 { "cmpS", { Ev
, Gv
} },
815 { "cmpB", { Gb
, Eb
} },
816 { "cmpS", { Gv
, Ev
} },
817 { "cmpB", { AL
, Ib
} },
818 { "cmpS", { eAX
, Iv
} },
819 { "(bad)", { XX
} }, /* SEG DS prefix */
820 { "aas{|}", { XX
} },
822 { "inc{S|}", { RMeAX
} },
823 { "inc{S|}", { RMeCX
} },
824 { "inc{S|}", { RMeDX
} },
825 { "inc{S|}", { RMeBX
} },
826 { "inc{S|}", { RMeSP
} },
827 { "inc{S|}", { RMeBP
} },
828 { "inc{S|}", { RMeSI
} },
829 { "inc{S|}", { RMeDI
} },
831 { "dec{S|}", { RMeAX
} },
832 { "dec{S|}", { RMeCX
} },
833 { "dec{S|}", { RMeDX
} },
834 { "dec{S|}", { RMeBX
} },
835 { "dec{S|}", { RMeSP
} },
836 { "dec{S|}", { RMeBP
} },
837 { "dec{S|}", { RMeSI
} },
838 { "dec{S|}", { RMeDI
} },
840 { "pushV", { RMrAX
} },
841 { "pushV", { RMrCX
} },
842 { "pushV", { RMrDX
} },
843 { "pushV", { RMrBX
} },
844 { "pushV", { RMrSP
} },
845 { "pushV", { RMrBP
} },
846 { "pushV", { RMrSI
} },
847 { "pushV", { RMrDI
} },
849 { "popV", { RMrAX
} },
850 { "popV", { RMrCX
} },
851 { "popV", { RMrDX
} },
852 { "popV", { RMrBX
} },
853 { "popV", { RMrSP
} },
854 { "popV", { RMrBP
} },
855 { "popV", { RMrSI
} },
856 { "popV", { RMrDI
} },
862 { "(bad)", { XX
} }, /* seg fs */
863 { "(bad)", { XX
} }, /* seg gs */
864 { "(bad)", { XX
} }, /* op size prefix */
865 { "(bad)", { XX
} }, /* adr size prefix */
868 { "imulS", { Gv
, Ev
, Iv
} },
869 { "pushT", { sIb
} },
870 { "imulS", { Gv
, Ev
, sIb
} },
871 { "ins{b||b|}", { Ybr
, indirDX
} },
872 { "ins{R||G|}", { Yzr
, indirDX
} },
873 { "outs{b||b|}", { indirDXr
, Xb
} },
874 { "outs{R||G|}", { indirDXr
, Xz
} },
876 { "joH", { Jb
, XX
, cond_jump_flag
} },
877 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
878 { "jbH", { Jb
, XX
, cond_jump_flag
} },
879 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
880 { "jeH", { Jb
, XX
, cond_jump_flag
} },
881 { "jneH", { Jb
, XX
, cond_jump_flag
} },
882 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
883 { "jaH", { Jb
, XX
, cond_jump_flag
} },
885 { "jsH", { Jb
, XX
, cond_jump_flag
} },
886 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
887 { "jpH", { Jb
, XX
, cond_jump_flag
} },
888 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
889 { "jlH", { Jb
, XX
, cond_jump_flag
} },
890 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
891 { "jleH", { Jb
, XX
, cond_jump_flag
} },
892 { "jgH", { Jb
, XX
, cond_jump_flag
} },
898 { "testB", { Eb
, Gb
} },
899 { "testS", { Ev
, Gv
} },
900 { "xchgB", { Eb
, Gb
} },
901 { "xchgS", { Ev
, Gv
} },
903 { "movB", { Eb
, Gb
} },
904 { "movS", { Ev
, Gv
} },
905 { "movB", { Gb
, Eb
} },
906 { "movS", { Gv
, Ev
} },
907 { "movD", { Sv
, Sw
} },
908 { "leaS", { Gv
, M
} },
909 { "movD", { Sw
, Sv
} },
913 { "xchgS", { RMeCX
, eAX
} },
914 { "xchgS", { RMeDX
, eAX
} },
915 { "xchgS", { RMeBX
, eAX
} },
916 { "xchgS", { RMeSP
, eAX
} },
917 { "xchgS", { RMeBP
, eAX
} },
918 { "xchgS", { RMeSI
, eAX
} },
919 { "xchgS", { RMeDI
, eAX
} },
921 { "cW{t||t|}R", { XX
} },
922 { "cR{t||t|}O", { XX
} },
923 { "Jcall{T|}", { Ap
} },
924 { "(bad)", { XX
} }, /* fwait */
925 { "pushfT", { XX
} },
927 { "sahf{|}", { XX
} },
928 { "lahf{|}", { XX
} },
930 { "movB", { AL
, Ob
} },
931 { "movS", { eAX
, Ov
} },
932 { "movB", { Ob
, AL
} },
933 { "movS", { Ov
, eAX
} },
934 { "movs{b||b|}", { Ybr
, Xb
} },
935 { "movs{R||R|}", { Yvr
, Xv
} },
936 { "cmps{b||b|}", { Xb
, Yb
} },
937 { "cmps{R||R|}", { Xv
, Yv
} },
939 { "testB", { AL
, Ib
} },
940 { "testS", { eAX
, Iv
} },
941 { "stosB", { Ybr
, AL
} },
942 { "stosS", { Yvr
, eAX
} },
943 { "lodsB", { ALr
, Xb
} },
944 { "lodsS", { eAXr
, Xv
} },
945 { "scasB", { AL
, Yb
} },
946 { "scasS", { eAX
, Yv
} },
948 { "movB", { RMAL
, Ib
} },
949 { "movB", { RMCL
, Ib
} },
950 { "movB", { RMDL
, Ib
} },
951 { "movB", { RMBL
, Ib
} },
952 { "movB", { RMAH
, Ib
} },
953 { "movB", { RMCH
, Ib
} },
954 { "movB", { RMDH
, Ib
} },
955 { "movB", { RMBH
, Ib
} },
957 { "movS", { RMeAX
, Iv64
} },
958 { "movS", { RMeCX
, Iv64
} },
959 { "movS", { RMeDX
, Iv64
} },
960 { "movS", { RMeBX
, Iv64
} },
961 { "movS", { RMeSP
, Iv64
} },
962 { "movS", { RMeBP
, Iv64
} },
963 { "movS", { RMeSI
, Iv64
} },
964 { "movS", { RMeDI
, Iv64
} },
970 { "les{S|}", { Gv
, Mp
} },
971 { "ldsS", { Gv
, Mp
} },
975 { "enterT", { Iw
, Ib
} },
976 { "leaveT", { XX
} },
981 { "into{|}", { XX
} },
988 { "aam{|}", { sIb
} },
989 { "aad{|}", { sIb
} },
991 { "xlat", { DSBX
} },
1002 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
1003 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
1004 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
1005 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
1006 { "inB", { AL
, Ib
} },
1007 { "inG", { zAX
, Ib
} },
1008 { "outB", { Ib
, AL
} },
1009 { "outG", { Ib
, zAX
} },
1011 { "callT", { Jv
} },
1013 { "Jjmp{T|}", { Ap
} },
1015 { "inB", { AL
, indirDX
} },
1016 { "inG", { zAX
, indirDX
} },
1017 { "outB", { indirDX
, AL
} },
1018 { "outG", { indirDX
, zAX
} },
1020 { "(bad)", { XX
} }, /* lock prefix */
1021 { "icebp", { XX
} },
1022 { "(bad)", { XX
} }, /* repne */
1023 { "(bad)", { XX
} }, /* repz */
1039 static const struct dis386 dis386_twobyte
[] = {
1043 { "larS", { Gv
, Ew
} },
1044 { "lslS", { Gv
, Ew
} },
1045 { "(bad)", { XX
} },
1046 { "syscall", { XX
} },
1048 { "sysretP", { XX
} },
1051 { "wbinvd", { XX
} },
1052 { "(bad)", { XX
} },
1054 { "(bad)", { XX
} },
1056 { "femms", { XX
} },
1057 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
1062 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
1063 { "unpcklpX", { XM
, EXq
} },
1064 { "unpckhpX", { XM
, EXq
} },
1066 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
1069 { "(bad)", { XX
} },
1070 { "(bad)", { XX
} },
1071 { "(bad)", { XX
} },
1072 { "(bad)", { XX
} },
1073 { "(bad)", { XX
} },
1074 { "(bad)", { XX
} },
1077 { "movZ", { Rm
, Cm
} },
1078 { "movZ", { Rm
, Dm
} },
1079 { "movZ", { Cm
, Rm
} },
1080 { "movZ", { Dm
, Rm
} },
1081 { "movL", { Rd
, Td
} },
1082 { "(bad)", { XX
} },
1083 { "movL", { Td
, Rd
} },
1084 { "(bad)", { XX
} },
1086 { "movapX", { XM
, EXx
} },
1087 { "movapX", { EXx
, XM
} },
1095 { "wrmsr", { XX
} },
1096 { "rdtsc", { XX
} },
1097 { "rdmsr", { XX
} },
1098 { "rdpmc", { XX
} },
1099 { "sysenter", { XX
} },
1100 { "sysexit", { XX
} },
1101 { "(bad)", { XX
} },
1102 { "(bad)", { XX
} },
1105 { "(bad)", { XX
} },
1107 { "(bad)", { XX
} },
1108 { "(bad)", { XX
} },
1109 { "(bad)", { XX
} },
1110 { "(bad)", { XX
} },
1111 { "(bad)", { XX
} },
1113 { "cmovo", { Gv
, Ev
} },
1114 { "cmovno", { Gv
, Ev
} },
1115 { "cmovb", { Gv
, Ev
} },
1116 { "cmovae", { Gv
, Ev
} },
1117 { "cmove", { Gv
, Ev
} },
1118 { "cmovne", { Gv
, Ev
} },
1119 { "cmovbe", { Gv
, Ev
} },
1120 { "cmova", { Gv
, Ev
} },
1122 { "cmovs", { Gv
, Ev
} },
1123 { "cmovns", { Gv
, Ev
} },
1124 { "cmovp", { Gv
, Ev
} },
1125 { "cmovnp", { Gv
, Ev
} },
1126 { "cmovl", { Gv
, Ev
} },
1127 { "cmovge", { Gv
, Ev
} },
1128 { "cmovle", { Gv
, Ev
} },
1129 { "cmovg", { Gv
, Ev
} },
1131 { "movmskpX", { Gdq
, XS
} },
1135 { "andpX", { XM
, EXx
} },
1136 { "andnpX", { XM
, EXx
} },
1137 { "orpX", { XM
, EXx
} },
1138 { "xorpX", { XM
, EXx
} },
1152 { "packsswb", { MX
, EM
} },
1153 { "pcmpgtb", { MX
, EM
} },
1154 { "pcmpgtw", { MX
, EM
} },
1155 { "pcmpgtd", { MX
, EM
} },
1156 { "packuswb", { MX
, EM
} },
1158 { "punpckhbw", { MX
, EM
} },
1159 { "punpckhwd", { MX
, EM
} },
1160 { "punpckhdq", { MX
, EM
} },
1161 { "packssdw", { MX
, EM
} },
1164 { "movd", { MX
, Edq
} },
1171 { "pcmpeqb", { MX
, EM
} },
1172 { "pcmpeqw", { MX
, EM
} },
1173 { "pcmpeqd", { MX
, EM
} },
1178 { "(bad)", { XX
} },
1179 { "(bad)", { XX
} },
1185 { "joH", { Jv
, XX
, cond_jump_flag
} },
1186 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1187 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1188 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1189 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1190 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1191 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1192 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1194 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1195 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1196 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1197 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1198 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1199 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1200 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1201 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1204 { "setno", { Eb
} },
1206 { "setae", { Eb
} },
1208 { "setne", { Eb
} },
1209 { "setbe", { Eb
} },
1213 { "setns", { Eb
} },
1215 { "setnp", { Eb
} },
1217 { "setge", { Eb
} },
1218 { "setle", { Eb
} },
1221 { "pushT", { fs
} },
1223 { "cpuid", { XX
} },
1224 { "btS", { Ev
, Gv
} },
1225 { "shldS", { Ev
, Gv
, Ib
} },
1226 { "shldS", { Ev
, Gv
, CL
} },
1230 { "pushT", { gs
} },
1233 { "btsS", { Ev
, Gv
} },
1234 { "shrdS", { Ev
, Gv
, Ib
} },
1235 { "shrdS", { Ev
, Gv
, CL
} },
1237 { "imulS", { Gv
, Ev
} },
1239 { "cmpxchgB", { Eb
, Gb
} },
1240 { "cmpxchgS", { Ev
, Gv
} },
1241 { "lssS", { Gv
, Mp
} },
1242 { "btrS", { Ev
, Gv
} },
1243 { "lfsS", { Gv
, Mp
} },
1244 { "lgsS", { Gv
, Mp
} },
1245 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1246 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1251 { "btcS", { Ev
, Gv
} },
1252 { "bsfS", { Gv
, Ev
} },
1254 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1255 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1257 { "xaddB", { Eb
, Gb
} },
1258 { "xaddS", { Ev
, Gv
} },
1260 { "movntiS", { Ev
, Gv
} },
1261 { "pinsrw", { MX
, Edqw
, Ib
} },
1262 { "pextrw", { Gdq
, MS
, Ib
} },
1263 { "shufpX", { XM
, EXx
, Ib
} },
1266 { "bswap", { RMeAX
} },
1267 { "bswap", { RMeCX
} },
1268 { "bswap", { RMeDX
} },
1269 { "bswap", { RMeBX
} },
1270 { "bswap", { RMeSP
} },
1271 { "bswap", { RMeBP
} },
1272 { "bswap", { RMeSI
} },
1273 { "bswap", { RMeDI
} },
1276 { "psrlw", { MX
, EM
} },
1277 { "psrld", { MX
, EM
} },
1278 { "psrlq", { MX
, EM
} },
1279 { "paddq", { MX
, EM
} },
1280 { "pmullw", { MX
, EM
} },
1282 { "pmovmskb", { Gdq
, MS
} },
1284 { "psubusb", { MX
, EM
} },
1285 { "psubusw", { MX
, EM
} },
1286 { "pminub", { MX
, EM
} },
1287 { "pand", { MX
, EM
} },
1288 { "paddusb", { MX
, EM
} },
1289 { "paddusw", { MX
, EM
} },
1290 { "pmaxub", { MX
, EM
} },
1291 { "pandn", { MX
, EM
} },
1293 { "pavgb", { MX
, EM
} },
1294 { "psraw", { MX
, EM
} },
1295 { "psrad", { MX
, EM
} },
1296 { "pavgw", { MX
, EM
} },
1297 { "pmulhuw", { MX
, EM
} },
1298 { "pmulhw", { MX
, EM
} },
1302 { "psubsb", { MX
, EM
} },
1303 { "psubsw", { MX
, EM
} },
1304 { "pminsw", { MX
, EM
} },
1305 { "por", { MX
, EM
} },
1306 { "paddsb", { MX
, EM
} },
1307 { "paddsw", { MX
, EM
} },
1308 { "pmaxsw", { MX
, EM
} },
1309 { "pxor", { MX
, EM
} },
1312 { "psllw", { MX
, EM
} },
1313 { "pslld", { MX
, EM
} },
1314 { "psllq", { MX
, EM
} },
1315 { "pmuludq", { MX
, EM
} },
1316 { "pmaddwd", { MX
, EM
} },
1317 { "psadbw", { MX
, EM
} },
1320 { "psubb", { MX
, EM
} },
1321 { "psubw", { MX
, EM
} },
1322 { "psubd", { MX
, EM
} },
1323 { "psubq", { MX
, EM
} },
1324 { "paddb", { MX
, EM
} },
1325 { "paddw", { MX
, EM
} },
1326 { "paddd", { MX
, EM
} },
1327 { "(bad)", { XX
} },
1330 static const unsigned char onebyte_has_modrm
[256] = {
1331 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1332 /* ------------------------------- */
1333 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1334 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1335 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1336 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1337 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1338 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1339 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1340 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1341 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1342 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1343 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1344 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1345 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1346 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1347 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1348 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1349 /* ------------------------------- */
1350 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1353 static const unsigned char twobyte_has_modrm
[256] = {
1354 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1355 /* ------------------------------- */
1356 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1357 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1358 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1359 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1360 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1361 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1362 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1363 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1364 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1365 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1366 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1367 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1368 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1369 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1370 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1371 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1372 /* ------------------------------- */
1373 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1376 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1377 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1378 /* ------------------------------- */
1379 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1380 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1381 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1382 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1383 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1384 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1385 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1386 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1387 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1388 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1389 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1390 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1391 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1392 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1393 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1394 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1395 /* ------------------------------- */
1396 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1399 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1400 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1401 /* ------------------------------- */
1402 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1403 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1404 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1405 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1406 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1407 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1408 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1409 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1410 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1411 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1412 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1413 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1414 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1415 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1416 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1417 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1418 /* ------------------------------- */
1419 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1422 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1424 /* ------------------------------- */
1425 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1426 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1427 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1428 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1429 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1430 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1431 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1432 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1433 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1434 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1435 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1436 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1437 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1438 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1439 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1440 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1441 /* ------------------------------- */
1442 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1445 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1446 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1447 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1448 /* ------------------------------- */
1449 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1450 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1451 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1452 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1453 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1454 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1455 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1456 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1457 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1458 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1459 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1460 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1461 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1462 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
1463 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1464 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1465 /* ------------------------------- */
1466 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1469 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1470 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1471 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1472 /* ------------------------------- */
1473 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1474 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1475 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1476 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1477 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1478 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1479 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1480 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1481 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1482 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1483 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1484 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1485 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1486 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1487 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1488 /* f0 */ 1,1,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1489 /* ------------------------------- */
1490 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1493 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1494 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1495 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1496 /* ------------------------------- */
1497 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1498 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1499 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1500 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1501 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1502 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1503 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1504 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1505 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1506 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1507 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1508 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1509 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1510 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1511 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1512 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1513 /* ------------------------------- */
1514 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1517 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1518 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1519 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1520 /* ------------------------------- */
1521 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1522 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1523 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1524 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1525 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1526 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1527 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1528 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1529 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1530 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1531 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1532 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1533 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1534 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
1535 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1536 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1537 /* ------------------------------- */
1538 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1541 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1542 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1543 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1544 /* ------------------------------- */
1545 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1546 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1547 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1548 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1549 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1550 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1551 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1552 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1553 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1554 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1555 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1556 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1557 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1558 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1559 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1560 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1561 /* ------------------------------- */
1562 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1565 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1566 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1567 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1568 /* ------------------------------- */
1569 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1570 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1571 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1572 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1573 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1574 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1575 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1576 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1577 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1578 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1579 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1580 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1581 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1582 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1583 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1584 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1585 /* ------------------------------- */
1586 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1589 static char obuf
[100];
1591 static char scratchbuf
[100];
1592 static unsigned char *start_codep
;
1593 static unsigned char *insn_codep
;
1594 static unsigned char *codep
;
1595 static disassemble_info
*the_info
;
1603 static unsigned char need_modrm
;
1605 /* If we are accessing mod/rm/reg without need_modrm set, then the
1606 values are stale. Hitting this abort likely indicates that you
1607 need to update onebyte_has_modrm or twobyte_has_modrm. */
1608 #define MODRM_CHECK if (!need_modrm) abort ()
1610 static const char * const *names64
;
1611 static const char * const *names32
;
1612 static const char * const *names16
;
1613 static const char * const *names8
;
1614 static const char * const *names8rex
;
1615 static const char * const *names_seg
;
1616 static const char * const *index16
;
1618 static const char * const intel_names64
[] = {
1619 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1620 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1622 static const char * const intel_names32
[] = {
1623 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1624 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1626 static const char * const intel_names16
[] = {
1627 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1628 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1630 static const char * const intel_names8
[] = {
1631 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1633 static const char * const intel_names8rex
[] = {
1634 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1635 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1637 static const char * const intel_names_seg
[] = {
1638 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1640 static const char * const intel_index16
[] = {
1641 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1644 static const char * const att_names64
[] = {
1645 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1646 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1648 static const char * const att_names32
[] = {
1649 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1650 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1652 static const char * const att_names16
[] = {
1653 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1654 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1656 static const char * const att_names8
[] = {
1657 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1659 static const char * const att_names8rex
[] = {
1660 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1661 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1663 static const char * const att_names_seg
[] = {
1664 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1666 static const char * const att_index16
[] = {
1667 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1670 static const struct dis386 grps
[][8] = {
1673 { "popU", { stackEv
} },
1674 { "(bad)", { XX
} },
1675 { "(bad)", { XX
} },
1676 { "(bad)", { XX
} },
1677 { "(bad)", { XX
} },
1678 { "(bad)", { XX
} },
1679 { "(bad)", { XX
} },
1680 { "(bad)", { XX
} },
1684 { "addA", { Eb
, Ib
} },
1685 { "orA", { Eb
, Ib
} },
1686 { "adcA", { Eb
, Ib
} },
1687 { "sbbA", { Eb
, Ib
} },
1688 { "andA", { Eb
, Ib
} },
1689 { "subA", { Eb
, Ib
} },
1690 { "xorA", { Eb
, Ib
} },
1691 { "cmpA", { Eb
, Ib
} },
1695 { "addQ", { Ev
, Iv
} },
1696 { "orQ", { Ev
, Iv
} },
1697 { "adcQ", { Ev
, Iv
} },
1698 { "sbbQ", { Ev
, Iv
} },
1699 { "andQ", { Ev
, Iv
} },
1700 { "subQ", { Ev
, Iv
} },
1701 { "xorQ", { Ev
, Iv
} },
1702 { "cmpQ", { Ev
, Iv
} },
1706 { "addQ", { Ev
, sIb
} },
1707 { "orQ", { Ev
, sIb
} },
1708 { "adcQ", { Ev
, sIb
} },
1709 { "sbbQ", { Ev
, sIb
} },
1710 { "andQ", { Ev
, sIb
} },
1711 { "subQ", { Ev
, sIb
} },
1712 { "xorQ", { Ev
, sIb
} },
1713 { "cmpQ", { Ev
, sIb
} },
1717 { "rolA", { Eb
, Ib
} },
1718 { "rorA", { Eb
, Ib
} },
1719 { "rclA", { Eb
, Ib
} },
1720 { "rcrA", { Eb
, Ib
} },
1721 { "shlA", { Eb
, Ib
} },
1722 { "shrA", { Eb
, Ib
} },
1723 { "(bad)", { XX
} },
1724 { "sarA", { Eb
, Ib
} },
1728 { "rolQ", { Ev
, Ib
} },
1729 { "rorQ", { Ev
, Ib
} },
1730 { "rclQ", { Ev
, Ib
} },
1731 { "rcrQ", { Ev
, Ib
} },
1732 { "shlQ", { Ev
, Ib
} },
1733 { "shrQ", { Ev
, Ib
} },
1734 { "(bad)", { XX
} },
1735 { "sarQ", { Ev
, Ib
} },
1739 { "rolA", { Eb
, I1
} },
1740 { "rorA", { Eb
, I1
} },
1741 { "rclA", { Eb
, I1
} },
1742 { "rcrA", { Eb
, I1
} },
1743 { "shlA", { Eb
, I1
} },
1744 { "shrA", { Eb
, I1
} },
1745 { "(bad)", { XX
} },
1746 { "sarA", { Eb
, I1
} },
1750 { "rolQ", { Ev
, I1
} },
1751 { "rorQ", { Ev
, I1
} },
1752 { "rclQ", { Ev
, I1
} },
1753 { "rcrQ", { Ev
, I1
} },
1754 { "shlQ", { Ev
, I1
} },
1755 { "shrQ", { Ev
, I1
} },
1756 { "(bad)", { XX
} },
1757 { "sarQ", { Ev
, I1
} },
1761 { "rolA", { Eb
, CL
} },
1762 { "rorA", { Eb
, CL
} },
1763 { "rclA", { Eb
, CL
} },
1764 { "rcrA", { Eb
, CL
} },
1765 { "shlA", { Eb
, CL
} },
1766 { "shrA", { Eb
, CL
} },
1767 { "(bad)", { XX
} },
1768 { "sarA", { Eb
, CL
} },
1772 { "rolQ", { Ev
, CL
} },
1773 { "rorQ", { Ev
, CL
} },
1774 { "rclQ", { Ev
, CL
} },
1775 { "rcrQ", { Ev
, CL
} },
1776 { "shlQ", { Ev
, CL
} },
1777 { "shrQ", { Ev
, CL
} },
1778 { "(bad)", { XX
} },
1779 { "sarQ", { Ev
, CL
} },
1783 { "testA", { Eb
, Ib
} },
1784 { "(bad)", { Eb
} },
1787 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1788 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1789 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1790 { "idivA", { Eb
} }, /* and idiv for consistency. */
1794 { "testQ", { Ev
, Iv
} },
1795 { "(bad)", { XX
} },
1798 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1799 { "imulQ", { Ev
} },
1801 { "idivQ", { Ev
} },
1807 { "(bad)", { XX
} },
1808 { "(bad)", { XX
} },
1809 { "(bad)", { XX
} },
1810 { "(bad)", { XX
} },
1811 { "(bad)", { XX
} },
1812 { "(bad)", { XX
} },
1818 { "callT", { indirEv
} },
1819 { "JcallT", { indirEp
} },
1820 { "jmpT", { indirEv
} },
1821 { "JjmpT", { indirEp
} },
1822 { "pushU", { stackEv
} },
1823 { "(bad)", { XX
} },
1827 { "sldtD", { Sv
} },
1833 { "(bad)", { XX
} },
1834 { "(bad)", { XX
} },
1838 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1839 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1840 { "lgdt{Q|Q||}", { M
} },
1841 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1842 { "smswD", { Sv
} },
1843 { "(bad)", { XX
} },
1845 { "invlpg", { { INVLPG_Fixup
, w_mode
} } },
1849 { "(bad)", { XX
} },
1850 { "(bad)", { XX
} },
1851 { "(bad)", { XX
} },
1852 { "(bad)", { XX
} },
1853 { "btQ", { Ev
, Ib
} },
1854 { "btsQ", { Ev
, Ib
} },
1855 { "btrQ", { Ev
, Ib
} },
1856 { "btcQ", { Ev
, Ib
} },
1860 { "(bad)", { XX
} },
1861 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1862 { "(bad)", { XX
} },
1863 { "(bad)", { XX
} },
1864 { "(bad)", { XX
} },
1865 { "(bad)", { XX
} },
1866 { "", { VM
} }, /* See OP_VMX. */
1867 { "vmptrst", { Mq
} },
1871 { "movA", { Eb
, Ib
} },
1872 { "(bad)", { XX
} },
1873 { "(bad)", { XX
} },
1874 { "(bad)", { XX
} },
1875 { "(bad)", { XX
} },
1876 { "(bad)", { XX
} },
1877 { "(bad)", { XX
} },
1878 { "(bad)", { XX
} },
1882 { "movQ", { Ev
, Iv
} },
1883 { "(bad)", { XX
} },
1884 { "(bad)", { XX
} },
1885 { "(bad)", { XX
} },
1886 { "(bad)", { XX
} },
1887 { "(bad)", { XX
} },
1888 { "(bad)", { XX
} },
1889 { "(bad)", { XX
} },
1893 { "(bad)", { XX
} },
1894 { "(bad)", { XX
} },
1895 { "psrlw", { MS
, Ib
} },
1896 { "(bad)", { XX
} },
1897 { "psraw", { MS
, Ib
} },
1898 { "(bad)", { XX
} },
1899 { "psllw", { MS
, Ib
} },
1900 { "(bad)", { XX
} },
1904 { "(bad)", { XX
} },
1905 { "(bad)", { XX
} },
1906 { "psrld", { MS
, Ib
} },
1907 { "(bad)", { XX
} },
1908 { "psrad", { MS
, Ib
} },
1909 { "(bad)", { XX
} },
1910 { "pslld", { MS
, Ib
} },
1911 { "(bad)", { XX
} },
1915 { "(bad)", { XX
} },
1916 { "(bad)", { XX
} },
1917 { "psrlq", { MS
, Ib
} },
1918 { "psrldq", { MS
, Ib
} },
1919 { "(bad)", { XX
} },
1920 { "(bad)", { XX
} },
1921 { "psllq", { MS
, Ib
} },
1922 { "pslldq", { MS
, Ib
} },
1926 { "fxsave", { Ev
} },
1927 { "fxrstor", { Ev
} },
1928 { "ldmxcsr", { Ev
} },
1929 { "stmxcsr", { Ev
} },
1930 { "(bad)", { XX
} },
1931 { "lfence", { { OP_0fae
, 0 } } },
1932 { "mfence", { { OP_0fae
, 0 } } },
1933 { "clflush", { { OP_0fae
, 0 } } },
1937 { "prefetchnta", { Ev
} },
1938 { "prefetcht0", { Ev
} },
1939 { "prefetcht1", { Ev
} },
1940 { "prefetcht2", { Ev
} },
1941 { "(bad)", { XX
} },
1942 { "(bad)", { XX
} },
1943 { "(bad)", { XX
} },
1944 { "(bad)", { XX
} },
1948 { "prefetch", { Eb
} },
1949 { "prefetchw", { Eb
} },
1950 { "(bad)", { XX
} },
1951 { "(bad)", { XX
} },
1952 { "(bad)", { XX
} },
1953 { "(bad)", { XX
} },
1954 { "(bad)", { XX
} },
1955 { "(bad)", { XX
} },
1959 { "xstore-rng", { { OP_0f07
, 0 } } },
1960 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1961 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1962 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1963 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1964 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1965 { "(bad)", { { OP_0f07
, 0 } } },
1966 { "(bad)", { { OP_0f07
, 0 } } },
1970 { "montmul", { { OP_0f07
, 0 } } },
1971 { "xsha1", { { OP_0f07
, 0 } } },
1972 { "xsha256", { { OP_0f07
, 0 } } },
1973 { "(bad)", { { OP_0f07
, 0 } } },
1974 { "(bad)", { { OP_0f07
, 0 } } },
1975 { "(bad)", { { OP_0f07
, 0 } } },
1976 { "(bad)", { { OP_0f07
, 0 } } },
1977 { "(bad)", { { OP_0f07
, 0 } } },
1981 static const struct dis386 prefix_user_table
[][4] = {
1984 { "addps", { XM
, EXx
} },
1985 { "addss", { XM
, EXd
} },
1986 { "addpd", { XM
, EXx
} },
1987 { "addsd", { XM
, EXq
} },
1991 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1992 { "", { XM
, EXx
, OPSIMD
} },
1993 { "", { XM
, EXx
, OPSIMD
} },
1994 { "", { XM
, EXx
, OPSIMD
} },
1998 { "cvtpi2ps", { XM
, EMC
} },
1999 { "cvtsi2ssY", { XM
, Ev
} },
2000 { "cvtpi2pd", { XM
, EMC
} },
2001 { "cvtsi2sdY", { XM
, Ev
} },
2005 { "cvtps2pi", { MXC
, EXx
} },
2006 { "cvtss2siY", { Gv
, EXx
} },
2007 { "cvtpd2pi", { MXC
, EXx
} },
2008 { "cvtsd2siY", { Gv
, EXx
} },
2012 { "cvttps2pi", { MXC
, EXx
} },
2013 { "cvttss2siY", { Gv
, EXx
} },
2014 { "cvttpd2pi", { MXC
, EXx
} },
2015 { "cvttsd2siY", { Gv
, EXx
} },
2019 { "divps", { XM
, EXx
} },
2020 { "divss", { XM
, EXx
} },
2021 { "divpd", { XM
, EXx
} },
2022 { "divsd", { XM
, EXx
} },
2026 { "maxps", { XM
, EXx
} },
2027 { "maxss", { XM
, EXx
} },
2028 { "maxpd", { XM
, EXx
} },
2029 { "maxsd", { XM
, EXx
} },
2033 { "minps", { XM
, EXx
} },
2034 { "minss", { XM
, EXx
} },
2035 { "minpd", { XM
, EXx
} },
2036 { "minsd", { XM
, EXx
} },
2040 { "movups", { XM
, EXx
} },
2041 { "movss", { XM
, EXx
} },
2042 { "movupd", { XM
, EXx
} },
2043 { "movsd", { XM
, EXx
} },
2047 { "movups", { EXx
, XM
} },
2048 { "movss", { EXx
, XM
} },
2049 { "movupd", { EXx
, XM
} },
2050 { "movsd", { EXx
, XM
} },
2054 { "mulps", { XM
, EXx
} },
2055 { "mulss", { XM
, EXx
} },
2056 { "mulpd", { XM
, EXx
} },
2057 { "mulsd", { XM
, EXx
} },
2061 { "rcpps", { XM
, EXx
} },
2062 { "rcpss", { XM
, EXx
} },
2063 { "(bad)", { XM
, EXx
} },
2064 { "(bad)", { XM
, EXx
} },
2068 { "rsqrtps",{ XM
, EXx
} },
2069 { "rsqrtss",{ XM
, EXx
} },
2070 { "(bad)", { XM
, EXx
} },
2071 { "(bad)", { XM
, EXx
} },
2075 { "sqrtps", { XM
, EXx
} },
2076 { "sqrtss", { XM
, EXx
} },
2077 { "sqrtpd", { XM
, EXx
} },
2078 { "sqrtsd", { XM
, EXx
} },
2082 { "subps", { XM
, EXx
} },
2083 { "subss", { XM
, EXx
} },
2084 { "subpd", { XM
, EXx
} },
2085 { "subsd", { XM
, EXx
} },
2089 { "(bad)", { XM
, EXx
} },
2090 { "cvtdq2pd", { XM
, EXq
} },
2091 { "cvttpd2dq", { XM
, EXx
} },
2092 { "cvtpd2dq", { XM
, EXx
} },
2096 { "cvtdq2ps", { XM
, EXx
} },
2097 { "cvttps2dq", { XM
, EXx
} },
2098 { "cvtps2dq", { XM
, EXx
} },
2099 { "(bad)", { XM
, EXx
} },
2103 { "cvtps2pd", { XM
, EXq
} },
2104 { "cvtss2sd", { XM
, EXx
} },
2105 { "cvtpd2ps", { XM
, EXx
} },
2106 { "cvtsd2ss", { XM
, EXx
} },
2110 { "maskmovq", { MX
, MS
} },
2111 { "(bad)", { XM
, EXx
} },
2112 { "maskmovdqu", { XM
, XS
} },
2113 { "(bad)", { XM
, EXx
} },
2117 { "movq", { MX
, EM
} },
2118 { "movdqu", { XM
, EXx
} },
2119 { "movdqa", { XM
, EXx
} },
2120 { "(bad)", { XM
, EXx
} },
2124 { "movq", { EM
, MX
} },
2125 { "movdqu", { EXx
, XM
} },
2126 { "movdqa", { EXx
, XM
} },
2127 { "(bad)", { EXx
, XM
} },
2131 { "(bad)", { EXx
, XM
} },
2132 { "movq2dq",{ XM
, MS
} },
2133 { "movq", { EXx
, XM
} },
2134 { "movdq2q",{ MX
, XS
} },
2138 { "pshufw", { MX
, EM
, Ib
} },
2139 { "pshufhw",{ XM
, EXx
, Ib
} },
2140 { "pshufd", { XM
, EXx
, Ib
} },
2141 { "pshuflw",{ XM
, EXx
, Ib
} },
2145 { "movd", { Edq
, MX
} },
2146 { "movq", { XM
, EXx
} },
2147 { "movd", { Edq
, XM
} },
2148 { "(bad)", { Ed
, XM
} },
2152 { "(bad)", { MX
, EXx
} },
2153 { "(bad)", { XM
, EXx
} },
2154 { "punpckhqdq", { XM
, EXx
} },
2155 { "(bad)", { XM
, EXx
} },
2159 { "movntq", { EM
, MX
} },
2160 { "(bad)", { EM
, XM
} },
2161 { "movntdq",{ EM
, XM
} },
2162 { "(bad)", { EM
, XM
} },
2166 { "(bad)", { MX
, EXx
} },
2167 { "(bad)", { XM
, EXx
} },
2168 { "punpcklqdq", { XM
, EXx
} },
2169 { "(bad)", { XM
, EXx
} },
2173 { "(bad)", { MX
, EXx
} },
2174 { "(bad)", { XM
, EXx
} },
2175 { "addsubpd", { XM
, EXx
} },
2176 { "addsubps", { XM
, EXx
} },
2180 { "(bad)", { MX
, EXx
} },
2181 { "(bad)", { XM
, EXx
} },
2182 { "haddpd", { XM
, EXx
} },
2183 { "haddps", { XM
, EXx
} },
2187 { "(bad)", { MX
, EXx
} },
2188 { "(bad)", { XM
, EXx
} },
2189 { "hsubpd", { XM
, EXx
} },
2190 { "hsubps", { XM
, EXx
} },
2194 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2195 { "movsldup", { XM
, EXx
} },
2196 { "movlpd", { XM
, EXq
} },
2197 { "movddup", { XM
, EXq
} },
2201 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
2202 { "movshdup", { XM
, EXx
} },
2203 { "movhpd", { XM
, EXq
} },
2204 { "(bad)", { XM
, EXq
} },
2208 { "(bad)", { XM
, EXx
} },
2209 { "(bad)", { XM
, EXx
} },
2210 { "(bad)", { XM
, EXx
} },
2211 { "lddqu", { XM
, M
} },
2215 {"movntps", { Ev
, XM
} },
2216 {"movntss", { Ev
, XM
} },
2217 {"movntpd", { Ev
, XM
} },
2218 {"movntsd", { Ev
, XM
} },
2223 {"vmread", { Em
, Gm
} },
2225 {"extrq", { XS
, Ib
, Ib
} },
2226 {"insertq", { XM
, XS
, Ib
, Ib
} },
2231 {"vmwrite", { Gm
, Em
} },
2233 {"extrq", { XM
, XS
} },
2234 {"insertq", { XM
, XS
} },
2239 { "bsrS", { Gv
, Ev
} },
2240 { "lzcntS", { Gv
, Ev
} },
2241 { "bsrS", { Gv
, Ev
} },
2242 { "(bad)", { XX
} },
2247 { "(bad)", { XX
} },
2248 { "popcntS", { Gv
, Ev
} },
2249 { "(bad)", { XX
} },
2250 { "(bad)", { XX
} },
2255 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2256 { "pause", { XX
} },
2257 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2258 { "(bad)", { XX
} },
2263 { "(bad)", { XX
} },
2264 { "(bad)", { XX
} },
2265 { "pblendvb", {XM
, EXx
, XMM0
} },
2266 { "(bad)", { XX
} },
2271 { "(bad)", { XX
} },
2272 { "(bad)", { XX
} },
2273 { "blendvps", {XM
, EXx
, XMM0
} },
2274 { "(bad)", { XX
} },
2279 { "(bad)", { XX
} },
2280 { "(bad)", { XX
} },
2281 { "blendvpd", { XM
, EXx
, XMM0
} },
2282 { "(bad)", { XX
} },
2287 { "(bad)", { XX
} },
2288 { "(bad)", { XX
} },
2289 { "ptest", { XM
, EXx
} },
2290 { "(bad)", { XX
} },
2295 { "(bad)", { XX
} },
2296 { "(bad)", { XX
} },
2297 { "pmovsxbw", { XM
, EXx
} },
2298 { "(bad)", { XX
} },
2303 { "(bad)", { XX
} },
2304 { "(bad)", { XX
} },
2305 { "pmovsxbd", { XM
, EXx
} },
2306 { "(bad)", { XX
} },
2311 { "(bad)", { XX
} },
2312 { "(bad)", { XX
} },
2313 { "pmovsxbq", { XM
, EXx
} },
2314 { "(bad)", { XX
} },
2319 { "(bad)", { XX
} },
2320 { "(bad)", { XX
} },
2321 { "pmovsxwd", { XM
, EXx
} },
2322 { "(bad)", { XX
} },
2327 { "(bad)", { XX
} },
2328 { "(bad)", { XX
} },
2329 { "pmovsxwq", { XM
, EXx
} },
2330 { "(bad)", { XX
} },
2335 { "(bad)", { XX
} },
2336 { "(bad)", { XX
} },
2337 { "pmovsxdq", { XM
, EXx
} },
2338 { "(bad)", { XX
} },
2343 { "(bad)", { XX
} },
2344 { "(bad)", { XX
} },
2345 { "pmuldq", { XM
, EXx
} },
2346 { "(bad)", { XX
} },
2351 { "(bad)", { XX
} },
2352 { "(bad)", { XX
} },
2353 { "pcmpeqq", { XM
, EXx
} },
2354 { "(bad)", { XX
} },
2359 { "(bad)", { XX
} },
2360 { "(bad)", { XX
} },
2361 { "movntdqa", { XM
, EM
} },
2362 { "(bad)", { XX
} },
2367 { "(bad)", { XX
} },
2368 { "(bad)", { XX
} },
2369 { "packusdw", { XM
, EXx
} },
2370 { "(bad)", { XX
} },
2375 { "(bad)", { XX
} },
2376 { "(bad)", { XX
} },
2377 { "pmovzxbw", { XM
, EXx
} },
2378 { "(bad)", { XX
} },
2383 { "(bad)", { XX
} },
2384 { "(bad)", { XX
} },
2385 { "pmovzxbd", { XM
, EXx
} },
2386 { "(bad)", { XX
} },
2391 { "(bad)", { XX
} },
2392 { "(bad)", { XX
} },
2393 { "pmovzxbq", { XM
, EXx
} },
2394 { "(bad)", { XX
} },
2399 { "(bad)", { XX
} },
2400 { "(bad)", { XX
} },
2401 { "pmovzxwd", { XM
, EXx
} },
2402 { "(bad)", { XX
} },
2407 { "(bad)", { XX
} },
2408 { "(bad)", { XX
} },
2409 { "pmovzxwq", { XM
, EXx
} },
2410 { "(bad)", { XX
} },
2415 { "(bad)", { XX
} },
2416 { "(bad)", { XX
} },
2417 { "pmovzxdq", { XM
, EXx
} },
2418 { "(bad)", { XX
} },
2423 { "(bad)", { XX
} },
2424 { "(bad)", { XX
} },
2425 { "pminsb", { XM
, EXx
} },
2426 { "(bad)", { XX
} },
2431 { "(bad)", { XX
} },
2432 { "(bad)", { XX
} },
2433 { "pminsd", { XM
, EXx
} },
2434 { "(bad)", { XX
} },
2439 { "(bad)", { XX
} },
2440 { "(bad)", { XX
} },
2441 { "pminuw", { XM
, EXx
} },
2442 { "(bad)", { XX
} },
2447 { "(bad)", { XX
} },
2448 { "(bad)", { XX
} },
2449 { "pminud", { XM
, EXx
} },
2450 { "(bad)", { XX
} },
2455 { "(bad)", { XX
} },
2456 { "(bad)", { XX
} },
2457 { "pmaxsb", { XM
, EXx
} },
2458 { "(bad)", { XX
} },
2463 { "(bad)", { XX
} },
2464 { "(bad)", { XX
} },
2465 { "pmaxsd", { XM
, EXx
} },
2466 { "(bad)", { XX
} },
2471 { "(bad)", { XX
} },
2472 { "(bad)", { XX
} },
2473 { "pmaxuw", { XM
, EXx
} },
2474 { "(bad)", { XX
} },
2479 { "(bad)", { XX
} },
2480 { "(bad)", { XX
} },
2481 { "pmaxud", { XM
, EXx
} },
2482 { "(bad)", { XX
} },
2487 { "(bad)", { XX
} },
2488 { "(bad)", { XX
} },
2489 { "pmulld", { XM
, EXx
} },
2490 { "(bad)", { XX
} },
2495 { "(bad)", { XX
} },
2496 { "(bad)", { XX
} },
2497 { "phminposuw", { XM
, EXx
} },
2498 { "(bad)", { XX
} },
2503 { "(bad)", { XX
} },
2504 { "(bad)", { XX
} },
2505 { "roundps", { XM
, EXx
, Ib
} },
2506 { "(bad)", { XX
} },
2511 { "(bad)", { XX
} },
2512 { "(bad)", { XX
} },
2513 { "roundpd", { XM
, EXx
, Ib
} },
2514 { "(bad)", { XX
} },
2519 { "(bad)", { XX
} },
2520 { "(bad)", { XX
} },
2521 { "roundss", { XM
, EXx
, Ib
} },
2522 { "(bad)", { XX
} },
2527 { "(bad)", { XX
} },
2528 { "(bad)", { XX
} },
2529 { "roundsd", { XM
, EXx
, Ib
} },
2530 { "(bad)", { XX
} },
2535 { "(bad)", { XX
} },
2536 { "(bad)", { XX
} },
2537 { "blendps", { XM
, EXx
, Ib
} },
2538 { "(bad)", { XX
} },
2543 { "(bad)", { XX
} },
2544 { "(bad)", { XX
} },
2545 { "blendpd", { XM
, EXx
, Ib
} },
2546 { "(bad)", { XX
} },
2551 { "(bad)", { XX
} },
2552 { "(bad)", { XX
} },
2553 { "pblendw", { XM
, EXx
, Ib
} },
2554 { "(bad)", { XX
} },
2559 { "(bad)", { XX
} },
2560 { "(bad)", { XX
} },
2561 { "pextrb", { Edqb
, XM
, Ib
} },
2562 { "(bad)", { XX
} },
2567 { "(bad)", { XX
} },
2568 { "(bad)", { XX
} },
2569 { "pextrw", { Edqw
, XM
, Ib
} },
2570 { "(bad)", { XX
} },
2575 { "(bad)", { XX
} },
2576 { "(bad)", { XX
} },
2577 { "pextrK", { Edq
, XM
, Ib
} },
2578 { "(bad)", { XX
} },
2583 { "(bad)", { XX
} },
2584 { "(bad)", { XX
} },
2585 { "extractps", { Edqd
, XM
, Ib
} },
2586 { "(bad)", { XX
} },
2591 { "(bad)", { XX
} },
2592 { "(bad)", { XX
} },
2593 { "pinsrb", { XM
, Edqb
, Ib
} },
2594 { "(bad)", { XX
} },
2599 { "(bad)", { XX
} },
2600 { "(bad)", { XX
} },
2601 { "insertps", { XM
, EXx
, Ib
} },
2602 { "(bad)", { XX
} },
2607 { "(bad)", { XX
} },
2608 { "(bad)", { XX
} },
2609 { "pinsrK", { XM
, Edq
, Ib
} },
2610 { "(bad)", { XX
} },
2615 { "(bad)", { XX
} },
2616 { "(bad)", { XX
} },
2617 { "dpps", { XM
, EXx
, Ib
} },
2618 { "(bad)", { XX
} },
2623 { "(bad)", { XX
} },
2624 { "(bad)", { XX
} },
2625 { "dppd", { XM
, EXx
, Ib
} },
2626 { "(bad)", { XX
} },
2631 { "(bad)", { XX
} },
2632 { "(bad)", { XX
} },
2633 { "mpsadbw", { XM
, EXx
, Ib
} },
2634 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2640 { "(bad)", { XX
} },
2641 { "pcmpgtq", { XM
, EXx
} },
2642 { "(bad)", { XX
} },
2647 { "movbe", { Gv
, Ev
} },
2648 { "(bad)", { XX
} },
2649 { "movbe", { Gv
, Ev
} },
2650 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2655 { "movbe", { Ev
, Gv
} },
2656 { "(bad)", { XX
} },
2657 { "movbe", { Ev
, Gv
} },
2658 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2663 { "(bad)", { XX
} },
2664 { "(bad)", { XX
} },
2665 { "pcmpestrm", { XM
, EXx
, Ib
} },
2666 { "(bad)", { XX
} },
2671 { "(bad)", { XX
} },
2672 { "(bad)", { XX
} },
2673 { "pcmpestri", { XM
, EXx
, Ib
} },
2674 { "(bad)", { XX
} },
2679 { "(bad)", { XX
} },
2680 { "(bad)", { XX
} },
2681 { "pcmpistrm", { XM
, EXx
, Ib
} },
2682 { "(bad)", { XX
} },
2687 { "(bad)", { XX
} },
2688 { "(bad)", { XX
} },
2689 { "pcmpistri", { XM
, EXx
, Ib
} },
2690 { "(bad)", { XX
} },
2695 { "ucomiss",{ XM
, EXd
} },
2696 { "(bad)", { XX
} },
2697 { "ucomisd",{ XM
, EXq
} },
2698 { "(bad)", { XX
} },
2703 { "comiss", { XM
, EXd
} },
2704 { "(bad)", { XX
} },
2705 { "comisd", { XM
, EXq
} },
2706 { "(bad)", { XX
} },
2711 { "punpcklbw",{ MX
, EMd
} },
2712 { "(bad)", { XX
} },
2713 { "punpcklbw",{ MX
, EMq
} },
2714 { "(bad)", { XX
} },
2719 { "punpcklwd",{ MX
, EMd
} },
2720 { "(bad)", { XX
} },
2721 { "punpcklwd",{ MX
, EMq
} },
2722 { "(bad)", { XX
} },
2727 { "punpckldq",{ MX
, EMd
} },
2728 { "(bad)", { XX
} },
2729 { "punpckldq",{ MX
, EMq
} },
2730 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2736 { "(bad)", { XX
} },
2737 { "pclmulqdq", { XM
, EXx
, Ib
} },
2738 { "(bad)", { XX
} },
2743 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2745 { "aesimc", { XM
, EXx
} },
2746 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2752 { "(bad)", { XX
} },
2753 { "aesenc", { XM
, EXx
} },
2754 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2760 { "(bad)", { XX
} },
2761 { "aesenclast", { XM
, EXx
} },
2762 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "aesdec", { XM
, EXx
} },
2770 { "(bad)", { XX
} },
2775 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "aesdeclast", { XM
, EXx
} },
2778 { "(bad)", { XX
} },
2783 { "(bad)", { XX
} },
2784 { "(bad)", { XX
} },
2785 { "aeskeygenassist", { XM
, EXx
, Ib
} },
2786 { "(bad)", { XX
} },
2791 { "andnS", { Gv
, Bv
, Ev
} },
2792 { "(bad)", { XX
} },
2793 { "(bad)", { XX
} },
2794 { "(bad)", { XX
} },
2799 { "bextrS", { Gv
, Ev
, Bv
} },
2800 { "sarxS", { Gv
, Ev
, Bv
} },
2801 { "shlxS", { Gv
, Ev
, Bv
} },
2802 { "shrxS", { Gv
, Ev
, Bv
} },
2807 static const struct dis386 x86_64_table
[][2] = {
2809 { "pusha{P|}", { XX
} },
2810 { "(bad)", { XX
} },
2813 { "popa{P|}", { XX
} },
2814 { "(bad)", { XX
} },
2817 { "bound{S|}", { Gv
, Ma
} },
2818 { "(bad)", { XX
} },
2821 { "arpl", { Ew
, Gw
} },
2822 { "movs{||lq|xd}", { Gv
, Ed
} },
2826 static const struct dis386 three_byte_table
[][256] = {
2830 { "pshufb", { MX
, EM
} },
2831 { "phaddw", { MX
, EM
} },
2832 { "phaddd", { MX
, EM
} },
2833 { "phaddsw", { MX
, EM
} },
2834 { "pmaddubsw", { MX
, EM
} },
2835 { "phsubw", { MX
, EM
} },
2836 { "phsubd", { MX
, EM
} },
2837 { "phsubsw", { MX
, EM
} },
2839 { "psignb", { MX
, EM
} },
2840 { "psignw", { MX
, EM
} },
2841 { "psignd", { MX
, EM
} },
2842 { "pmulhrsw", { MX
, EM
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2845 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2851 { "(bad)", { XX
} },
2854 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2860 { "(bad)", { XX
} },
2861 { "pabsb", { MX
, EM
} },
2862 { "pabsw", { MX
, EM
} },
2863 { "pabsd", { MX
, EM
} },
2864 { "(bad)", { XX
} },
2872 { "(bad)", { XX
} },
2873 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2881 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2890 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2905 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2908 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2914 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2917 { "(bad)", { XX
} },
2918 { "(bad)", { XX
} },
2920 { "(bad)", { XX
} },
2921 { "(bad)", { XX
} },
2922 { "(bad)", { XX
} },
2923 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2926 { "(bad)", { XX
} },
2927 { "(bad)", { XX
} },
2929 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2932 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2935 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2941 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2944 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2953 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2962 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2966 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2971 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2977 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2980 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2989 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2998 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3007 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3013 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3016 { "(bad)", { XX
} },
3017 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3020 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3025 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3034 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3037 { "(bad)", { XX
} },
3038 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3040 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3043 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3046 { "(bad)", { XX
} },
3047 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3049 { "(bad)", { XX
} },
3050 { "(bad)", { XX
} },
3051 { "(bad)", { XX
} },
3052 { "(bad)", { XX
} },
3053 { "(bad)", { XX
} },
3055 { "(bad)", { XX
} },
3056 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3060 { "(bad)", { XX
} },
3061 { "(bad)", { XX
} },
3062 { "(bad)", { XX
} },
3064 { "(bad)", { XX
} },
3065 { "(bad)", { XX
} },
3066 { "(bad)", { XX
} },
3067 { "(bad)", { XX
} },
3068 { "(bad)", { XX
} },
3069 { "(bad)", { XX
} },
3070 { "(bad)", { XX
} },
3071 { "(bad)", { XX
} },
3073 { "(bad)", { XX
} },
3074 { "(bad)", { XX
} },
3075 { "(bad)", { XX
} },
3082 { "(bad)", { XX
} },
3083 { "(bad)", { XX
} },
3084 { "(bad)", { XX
} },
3085 { "(bad)", { XX
} },
3086 { "(bad)", { XX
} },
3087 { "(bad)", { XX
} },
3088 { "(bad)", { XX
} },
3089 { "(bad)", { XX
} },
3091 { "(bad)", { XX
} },
3092 { "(bad)", { XX
} },
3093 { "(bad)", { XX
} },
3094 { "(bad)", { XX
} },
3095 { "(bad)", { XX
} },
3096 { "(bad)", { XX
} },
3097 { "(bad)", { XX
} },
3098 { "(bad)", { XX
} },
3103 { "(bad)", { XX
} },
3104 { "(bad)", { XX
} },
3105 { "(bad)", { XX
} },
3106 { "(bad)", { XX
} },
3109 { "(bad)", { XX
} },
3110 { "(bad)", { XX
} },
3111 { "(bad)", { XX
} },
3112 { "(bad)", { XX
} },
3113 { "(bad)", { XX
} },
3114 { "(bad)", { XX
} },
3115 { "(bad)", { XX
} },
3116 { "(bad)", { XX
} },
3121 { "(bad)", { XX
} },
3122 { "(bad)", { XX
} },
3123 { "(bad)", { XX
} },
3124 { "(bad)", { XX
} },
3125 { "(bad)", { XX
} },
3126 { "(bad)", { XX
} },
3127 { "(bad)", { XX
} },
3128 { "(bad)", { XX
} },
3137 { "palignr", { MX
, EM
, Ib
} },
3139 { "(bad)", { XX
} },
3140 { "(bad)", { XX
} },
3141 { "(bad)", { XX
} },
3142 { "(bad)", { XX
} },
3148 { "(bad)", { XX
} },
3149 { "(bad)", { XX
} },
3150 { "(bad)", { XX
} },
3151 { "(bad)", { XX
} },
3152 { "(bad)", { XX
} },
3153 { "(bad)", { XX
} },
3154 { "(bad)", { XX
} },
3155 { "(bad)", { XX
} },
3160 { "(bad)", { XX
} },
3161 { "(bad)", { XX
} },
3162 { "(bad)", { XX
} },
3163 { "(bad)", { XX
} },
3164 { "(bad)", { XX
} },
3166 { "(bad)", { XX
} },
3167 { "(bad)", { XX
} },
3168 { "(bad)", { XX
} },
3169 { "(bad)", { XX
} },
3170 { "(bad)", { XX
} },
3171 { "(bad)", { XX
} },
3172 { "(bad)", { XX
} },
3173 { "(bad)", { XX
} },
3175 { "(bad)", { XX
} },
3176 { "(bad)", { XX
} },
3177 { "(bad)", { XX
} },
3178 { "(bad)", { XX
} },
3179 { "(bad)", { XX
} },
3180 { "(bad)", { XX
} },
3181 { "(bad)", { XX
} },
3182 { "(bad)", { XX
} },
3184 { "(bad)", { XX
} },
3185 { "(bad)", { XX
} },
3186 { "(bad)", { XX
} },
3187 { "(bad)", { XX
} },
3188 { "(bad)", { XX
} },
3189 { "(bad)", { XX
} },
3190 { "(bad)", { XX
} },
3191 { "(bad)", { XX
} },
3196 { "(bad)", { XX
} },
3198 { "(bad)", { XX
} },
3199 { "(bad)", { XX
} },
3200 { "(bad)", { XX
} },
3202 { "(bad)", { XX
} },
3203 { "(bad)", { XX
} },
3204 { "(bad)", { XX
} },
3205 { "(bad)", { XX
} },
3206 { "(bad)", { XX
} },
3207 { "(bad)", { XX
} },
3208 { "(bad)", { XX
} },
3209 { "(bad)", { XX
} },
3211 { "(bad)", { XX
} },
3212 { "(bad)", { XX
} },
3213 { "(bad)", { XX
} },
3214 { "(bad)", { XX
} },
3215 { "(bad)", { XX
} },
3216 { "(bad)", { XX
} },
3217 { "(bad)", { XX
} },
3218 { "(bad)", { XX
} },
3220 { "(bad)", { XX
} },
3221 { "(bad)", { XX
} },
3222 { "(bad)", { XX
} },
3223 { "(bad)", { XX
} },
3224 { "(bad)", { XX
} },
3225 { "(bad)", { XX
} },
3226 { "(bad)", { XX
} },
3227 { "(bad)", { XX
} },
3233 { "(bad)", { XX
} },
3234 { "(bad)", { XX
} },
3235 { "(bad)", { XX
} },
3236 { "(bad)", { XX
} },
3238 { "(bad)", { XX
} },
3239 { "(bad)", { XX
} },
3240 { "(bad)", { XX
} },
3241 { "(bad)", { XX
} },
3242 { "(bad)", { XX
} },
3243 { "(bad)", { XX
} },
3244 { "(bad)", { XX
} },
3245 { "(bad)", { XX
} },
3247 { "(bad)", { XX
} },
3248 { "(bad)", { XX
} },
3249 { "(bad)", { XX
} },
3250 { "(bad)", { XX
} },
3251 { "(bad)", { XX
} },
3252 { "(bad)", { XX
} },
3253 { "(bad)", { XX
} },
3254 { "(bad)", { XX
} },
3256 { "(bad)", { XX
} },
3257 { "(bad)", { XX
} },
3258 { "(bad)", { XX
} },
3259 { "(bad)", { XX
} },
3260 { "(bad)", { XX
} },
3261 { "(bad)", { XX
} },
3262 { "(bad)", { XX
} },
3263 { "(bad)", { XX
} },
3265 { "(bad)", { XX
} },
3266 { "(bad)", { XX
} },
3267 { "(bad)", { XX
} },
3268 { "(bad)", { XX
} },
3269 { "(bad)", { XX
} },
3270 { "(bad)", { XX
} },
3271 { "(bad)", { XX
} },
3272 { "(bad)", { XX
} },
3274 { "(bad)", { XX
} },
3275 { "(bad)", { XX
} },
3276 { "(bad)", { XX
} },
3277 { "(bad)", { XX
} },
3278 { "(bad)", { XX
} },
3279 { "(bad)", { XX
} },
3280 { "(bad)", { XX
} },
3281 { "(bad)", { XX
} },
3283 { "(bad)", { XX
} },
3284 { "(bad)", { XX
} },
3285 { "(bad)", { XX
} },
3286 { "(bad)", { XX
} },
3287 { "(bad)", { XX
} },
3288 { "(bad)", { XX
} },
3289 { "(bad)", { XX
} },
3290 { "(bad)", { XX
} },
3292 { "(bad)", { XX
} },
3293 { "(bad)", { XX
} },
3294 { "(bad)", { XX
} },
3295 { "(bad)", { XX
} },
3296 { "(bad)", { XX
} },
3297 { "(bad)", { XX
} },
3298 { "(bad)", { XX
} },
3299 { "(bad)", { XX
} },
3301 { "(bad)", { XX
} },
3302 { "(bad)", { XX
} },
3303 { "(bad)", { XX
} },
3304 { "(bad)", { XX
} },
3305 { "(bad)", { XX
} },
3306 { "(bad)", { XX
} },
3307 { "(bad)", { XX
} },
3308 { "(bad)", { XX
} },
3310 { "(bad)", { XX
} },
3311 { "(bad)", { XX
} },
3312 { "(bad)", { XX
} },
3313 { "(bad)", { XX
} },
3314 { "(bad)", { XX
} },
3315 { "(bad)", { XX
} },
3316 { "(bad)", { XX
} },
3317 { "(bad)", { XX
} },
3319 { "(bad)", { XX
} },
3320 { "(bad)", { XX
} },
3321 { "(bad)", { XX
} },
3322 { "(bad)", { XX
} },
3323 { "(bad)", { XX
} },
3324 { "(bad)", { XX
} },
3325 { "(bad)", { XX
} },
3326 { "(bad)", { XX
} },
3328 { "(bad)", { XX
} },
3329 { "(bad)", { XX
} },
3330 { "(bad)", { XX
} },
3331 { "(bad)", { XX
} },
3332 { "(bad)", { XX
} },
3333 { "(bad)", { XX
} },
3334 { "(bad)", { XX
} },
3335 { "(bad)", { XX
} },
3337 { "(bad)", { XX
} },
3338 { "(bad)", { XX
} },
3339 { "(bad)", { XX
} },
3340 { "(bad)", { XX
} },
3341 { "(bad)", { XX
} },
3342 { "(bad)", { XX
} },
3343 { "(bad)", { XX
} },
3344 { "(bad)", { XX
} },
3346 { "(bad)", { XX
} },
3347 { "(bad)", { XX
} },
3348 { "(bad)", { XX
} },
3349 { "(bad)", { XX
} },
3350 { "(bad)", { XX
} },
3351 { "(bad)", { XX
} },
3352 { "(bad)", { XX
} },
3353 { "(bad)", { XX
} },
3355 { "(bad)", { XX
} },
3356 { "(bad)", { XX
} },
3357 { "(bad)", { XX
} },
3358 { "(bad)", { XX
} },
3359 { "(bad)", { XX
} },
3360 { "(bad)", { XX
} },
3361 { "(bad)", { XX
} },
3362 { "(bad)", { XX
} },
3364 { "(bad)", { XX
} },
3365 { "(bad)", { XX
} },
3366 { "(bad)", { XX
} },
3367 { "(bad)", { XX
} },
3368 { "(bad)", { XX
} },
3369 { "(bad)", { XX
} },
3370 { "(bad)", { XX
} },
3373 { "(bad)", { XX
} },
3374 { "(bad)", { XX
} },
3375 { "(bad)", { XX
} },
3376 { "(bad)", { XX
} },
3377 { "(bad)", { XX
} },
3378 { "(bad)", { XX
} },
3379 { "(bad)", { XX
} },
3380 { "(bad)", { XX
} },
3382 { "(bad)", { XX
} },
3383 { "(bad)", { XX
} },
3384 { "(bad)", { XX
} },
3385 { "(bad)", { XX
} },
3386 { "(bad)", { XX
} },
3387 { "(bad)", { XX
} },
3388 { "(bad)", { XX
} },
3389 { "(bad)", { XX
} },
3391 { "(bad)", { XX
} },
3392 { "(bad)", { XX
} },
3393 { "(bad)", { XX
} },
3394 { "(bad)", { XX
} },
3395 { "(bad)", { XX
} },
3396 { "(bad)", { XX
} },
3397 { "(bad)", { XX
} },
3398 { "(bad)", { XX
} },
3400 { "(bad)", { XX
} },
3401 { "(bad)", { XX
} },
3402 { "(bad)", { XX
} },
3403 { "(bad)", { XX
} },
3404 { "(bad)", { XX
} },
3405 { "(bad)", { XX
} },
3406 { "(bad)", { XX
} },
3407 { "(bad)", { XX
} },
3411 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3423 fetch_data(the_info
, codep
+ 1);
3427 /* REX prefixes family. */
3444 if (address_mode
== mode_64bit
)
3450 prefixes
|= PREFIX_REPZ
;
3453 prefixes
|= PREFIX_REPNZ
;
3456 prefixes
|= PREFIX_LOCK
;
3459 prefixes
|= PREFIX_CS
;
3462 prefixes
|= PREFIX_SS
;
3465 prefixes
|= PREFIX_DS
;
3468 prefixes
|= PREFIX_ES
;
3471 prefixes
|= PREFIX_FS
;
3474 prefixes
|= PREFIX_GS
;
3477 prefixes
|= PREFIX_DATA
;
3480 prefixes
|= PREFIX_ADDR
;
3483 /* fwait is really an instruction. If there are prefixes
3484 before the fwait, they belong to the fwait, *not* to the
3485 following instruction. */
3486 if (prefixes
|| rex
)
3488 prefixes
|= PREFIX_FWAIT
;
3492 prefixes
= PREFIX_FWAIT
;
3497 /* Rex is ignored when followed by another prefix. */
3511 int op
, vex2
, vex3
, newrex
= 0, newpfx
= prefixes
;
3513 if (address_mode
== mode_16bit
) {
3517 fetch_data(the_info
, codep
+ 1);
3520 if (op
!= 0xc4 && op
!= 0xc5) {
3524 fetch_data(the_info
, codep
+ 2);
3527 if (address_mode
== mode_32bit
&& (vex2
& 0xc0) != 0xc0) {
3532 /* Three byte VEX prefix. */
3533 fetch_data(the_info
, codep
+ 3);
3536 newrex
|= (vex2
& 0x80 ? 0 : REX_R
);
3537 newrex
|= (vex2
& 0x40 ? 0 : REX_X
);
3538 newrex
|= (vex2
& 0x20 ? 0 : REX_B
);
3539 newrex
|= (vex3
& 0x80 ? REX_W
: 0);
3540 switch (vex2
& 0x1f) { /* VEX.m-mmmm */
3542 newpfx
|= PREFIX_VEX_0F
;
3545 newpfx
|= PREFIX_VEX_0F
| PREFIX_VEX_0F38
;
3548 newpfx
|= PREFIX_VEX_0F
| PREFIX_VEX_0F3A
;
3554 /* Two byte VEX prefix. */
3555 newrex
|= (vex2
& 0x80 ? 0 : REX_R
);
3559 vex_reg
= (~vex2
>> 3) & 15; /* VEX.vvvv */
3560 switch (vex2
& 3) { /* VEX.pp */
3562 newpfx
|= PREFIX_DATA
; /* 0x66 */
3565 newpfx
|= PREFIX_REPZ
; /* 0xf3 */
3568 newpfx
|= PREFIX_REPNZ
; /* 0xf2 */
3576 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3580 prefix_name (int pref
, int sizeflag
)
3582 static const char * const rexes
[16] =
3587 "rex.XB", /* 0x43 */
3589 "rex.RB", /* 0x45 */
3590 "rex.RX", /* 0x46 */
3591 "rex.RXB", /* 0x47 */
3593 "rex.WB", /* 0x49 */
3594 "rex.WX", /* 0x4a */
3595 "rex.WXB", /* 0x4b */
3596 "rex.WR", /* 0x4c */
3597 "rex.WRB", /* 0x4d */
3598 "rex.WRX", /* 0x4e */
3599 "rex.WRXB", /* 0x4f */
3604 /* REX prefixes family. */
3621 return rexes
[pref
- 0x40];
3641 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3643 if (address_mode
== mode_64bit
)
3644 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3646 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3654 static char op_out
[MAX_OPERANDS
][100];
3655 static int op_ad
, op_index
[MAX_OPERANDS
];
3656 static int two_source_ops
;
3657 static bfd_vma op_address
[MAX_OPERANDS
];
3658 static bfd_vma op_riprel
[MAX_OPERANDS
];
3659 static bfd_vma start_pc
;
3662 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3663 * (see topic "Redundant prefixes" in the "Differences from 8086"
3664 * section of the "Virtual 8086 Mode" chapter.)
3665 * 'pc' should be the address of this instruction, it will
3666 * be used to print the target address if this is a relative jump or call
3667 * The function returns the length of this instruction in bytes.
3670 static char intel_syntax
;
3671 static char open_char
;
3672 static char close_char
;
3673 static char separator_char
;
3674 static char scale_char
;
3677 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3681 return print_insn (pc
, info
);
3685 print_insn (bfd_vma pc
, disassemble_info
*info
)
3687 const struct dis386
*dp
;
3689 char *op_txt
[MAX_OPERANDS
];
3691 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
3692 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
3695 struct dis_private priv
;
3697 unsigned char threebyte
;
3699 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3700 || info
->mach
== bfd_mach_x86_64
)
3701 address_mode
= mode_64bit
;
3703 address_mode
= mode_32bit
;
3705 if (intel_syntax
== (char) -1)
3706 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3707 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3709 if (info
->mach
== bfd_mach_i386_i386
3710 || info
->mach
== bfd_mach_x86_64
3711 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3712 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3713 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3714 else if (info
->mach
== bfd_mach_i386_i8086
)
3715 priv
.orig_sizeflag
= 0;
3719 for (p
= info
->disassembler_options
; p
!= NULL
; )
3721 if (strncmp (p
, "x86-64", 6) == 0)
3723 address_mode
= mode_64bit
;
3724 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3726 else if (strncmp (p
, "i386", 4) == 0)
3728 address_mode
= mode_32bit
;
3729 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3731 else if (strncmp (p
, "i8086", 5) == 0)
3733 address_mode
= mode_16bit
;
3734 priv
.orig_sizeflag
= 0;
3736 else if (strncmp (p
, "intel", 5) == 0)
3740 else if (strncmp (p
, "att", 3) == 0)
3744 else if (strncmp (p
, "addr", 4) == 0)
3746 if (address_mode
== mode_64bit
)
3748 if (p
[4] == '3' && p
[5] == '2')
3749 priv
.orig_sizeflag
&= ~AFLAG
;
3750 else if (p
[4] == '6' && p
[5] == '4')
3751 priv
.orig_sizeflag
|= AFLAG
;
3755 if (p
[4] == '1' && p
[5] == '6')
3756 priv
.orig_sizeflag
&= ~AFLAG
;
3757 else if (p
[4] == '3' && p
[5] == '2')
3758 priv
.orig_sizeflag
|= AFLAG
;
3761 else if (strncmp (p
, "data", 4) == 0)
3763 if (p
[4] == '1' && p
[5] == '6')
3764 priv
.orig_sizeflag
&= ~DFLAG
;
3765 else if (p
[4] == '3' && p
[5] == '2')
3766 priv
.orig_sizeflag
|= DFLAG
;
3768 else if (strncmp (p
, "suffix", 6) == 0)
3769 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3771 p
= strchr (p
, ',');
3778 names64
= intel_names64
;
3779 names32
= intel_names32
;
3780 names16
= intel_names16
;
3781 names8
= intel_names8
;
3782 names8rex
= intel_names8rex
;
3783 names_seg
= intel_names_seg
;
3784 index16
= intel_index16
;
3787 separator_char
= '+';
3792 names64
= att_names64
;
3793 names32
= att_names32
;
3794 names16
= att_names16
;
3795 names8
= att_names8
;
3796 names8rex
= att_names8rex
;
3797 names_seg
= att_names_seg
;
3798 index16
= att_index16
;
3801 separator_char
= ',';
3805 /* The output looks better if we put 7 bytes on a line, since that
3806 puts most long word instructions on a single line. */
3807 info
->bytes_per_line
= 7;
3809 info
->private_data
= &priv
;
3810 priv
.max_fetched
= priv
.the_buffer
;
3811 priv
.insn_start
= pc
;
3814 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3822 start_codep
= priv
.the_buffer
;
3823 codep
= priv
.the_buffer
;
3825 if (sigsetjmp(priv
.bailout
, 0) != 0)
3829 /* Getting here means we tried for data but didn't get it. That
3830 means we have an incomplete instruction of some sort. Just
3831 print the first byte as a prefix or a .byte pseudo-op. */
3832 if (codep
> priv
.the_buffer
)
3834 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3836 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3839 /* Just print the first byte as a .byte instruction. */
3840 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3841 (unsigned int) priv
.the_buffer
[0]);
3855 sizeflag
= priv
.orig_sizeflag
;
3857 fetch_data(info
, codep
+ 1);
3858 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3860 if (((prefixes
& PREFIX_FWAIT
)
3861 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3862 || (rex
&& rex_used
))
3866 /* fwait not followed by floating point instruction, or rex followed
3867 by other prefixes. Print the first prefix. */
3868 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3870 name
= INTERNAL_DISASSEMBLER_ERROR
;
3871 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3876 if (prefixes
& PREFIX_VEX_0F
)
3878 used_prefixes
|= PREFIX_VEX_0F
| PREFIX_VEX_0F38
| PREFIX_VEX_0F3A
;
3879 if (prefixes
& PREFIX_VEX_0F38
)
3881 else if (prefixes
& PREFIX_VEX_0F3A
)
3884 threebyte
= *codep
++;
3889 fetch_data(info
, codep
+ 2);
3890 threebyte
= codep
[1];
3893 dp
= &dis386_twobyte
[threebyte
];
3894 need_modrm
= twobyte_has_modrm
[threebyte
];
3895 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[threebyte
];
3896 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[threebyte
];
3897 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[threebyte
];
3898 uses_LOCK_prefix
= (threebyte
& ~0x02) == 0x20;
3899 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3901 fetch_data(info
, codep
+ 2);
3906 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3907 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3908 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3911 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3912 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3913 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3922 dp
= &dis386
[*codep
];
3923 need_modrm
= onebyte_has_modrm
[*codep
];
3924 uses_DATA_prefix
= 0;
3925 uses_REPNZ_prefix
= 0;
3926 /* pause is 0xf3 0x90. */
3927 uses_REPZ_prefix
= *codep
== 0x90;
3928 uses_LOCK_prefix
= 0;
3932 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3935 used_prefixes
|= PREFIX_REPZ
;
3937 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3940 used_prefixes
|= PREFIX_REPNZ
;
3943 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3946 used_prefixes
|= PREFIX_LOCK
;
3949 if (prefixes
& PREFIX_ADDR
)
3952 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3954 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3955 oappend ("addr32 ");
3957 oappend ("addr16 ");
3958 used_prefixes
|= PREFIX_ADDR
;
3962 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3965 if (dp
->op
[2].bytemode
== cond_jump_mode
3966 && dp
->op
[0].bytemode
== v_mode
3969 if (sizeflag
& DFLAG
)
3970 oappend ("data32 ");
3972 oappend ("data16 ");
3973 used_prefixes
|= PREFIX_DATA
;
3977 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3979 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3980 modrm
.mod
= (*codep
>> 6) & 3;
3981 modrm
.reg
= (*codep
>> 3) & 7;
3982 modrm
.rm
= *codep
& 7;
3984 else if (need_modrm
)
3986 fetch_data(info
, codep
+ 1);
3987 modrm
.mod
= (*codep
>> 6) & 3;
3988 modrm
.reg
= (*codep
>> 3) & 7;
3989 modrm
.rm
= *codep
& 7;
3992 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3999 if (dp
->name
== NULL
)
4001 switch (dp
->op
[0].bytemode
)
4004 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
4007 case USE_PREFIX_USER_TABLE
:
4009 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4010 if (prefixes
& PREFIX_REPZ
)
4014 /* We should check PREFIX_REPNZ and PREFIX_REPZ
4015 before PREFIX_DATA. */
4016 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
4017 if (prefixes
& PREFIX_REPNZ
)
4021 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4022 if (prefixes
& PREFIX_DATA
)
4026 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
4029 case X86_64_SPECIAL
:
4030 index
= address_mode
== mode_64bit
? 1 : 0;
4031 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
4035 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4040 if (putop (dp
->name
, sizeflag
) == 0)
4042 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4045 op_ad
= MAX_OPERANDS
- 1 - i
;
4047 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
4052 /* See if any prefixes were not used. If so, print the first one
4053 separately. If we don't do this, we'll wind up printing an
4054 instruction stream which does not precisely correspond to the
4055 bytes we are disassembling. */
4056 if ((prefixes
& ~used_prefixes
) != 0)
4060 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
4062 name
= INTERNAL_DISASSEMBLER_ERROR
;
4063 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
4066 if (rex
& ~rex_used
)
4069 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
4071 name
= INTERNAL_DISASSEMBLER_ERROR
;
4072 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
4075 obufp
= obuf
+ strlen (obuf
);
4076 for (i
= strlen (obuf
); i
< 6; i
++)
4079 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
4081 /* The enter and bound instructions are printed with operands in the same
4082 order as the intel book; everything else is printed in reverse order. */
4083 if (intel_syntax
|| two_source_ops
)
4087 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4088 op_txt
[i
] = op_out
[i
];
4090 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
4092 op_ad
= op_index
[i
];
4093 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
4094 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
4095 riprel
= op_riprel
[i
];
4096 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
4097 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
4102 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4103 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
4107 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4111 (*info
->fprintf_func
) (info
->stream
, ",");
4112 if (op_index
[i
] != -1 && !op_riprel
[i
])
4113 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
4115 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
4119 for (i
= 0; i
< MAX_OPERANDS
; i
++)
4120 if (op_index
[i
] != -1 && op_riprel
[i
])
4122 (*info
->fprintf_func
) (info
->stream
, " # ");
4123 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
4124 + op_address
[op_index
[i
]]), info
);
4127 return codep
- priv
.the_buffer
;
4130 static const char *float_mem
[] = {
4205 static const unsigned char float_mem_mode
[] = {
4280 #define ST { OP_ST, 0 }
4281 #define STi { OP_STi, 0 }
4283 #define FGRPd9_2 NULL, { { NULL, 0 } }
4284 #define FGRPd9_4 NULL, { { NULL, 1 } }
4285 #define FGRPd9_5 NULL, { { NULL, 2 } }
4286 #define FGRPd9_6 NULL, { { NULL, 3 } }
4287 #define FGRPd9_7 NULL, { { NULL, 4 } }
4288 #define FGRPda_5 NULL, { { NULL, 5 } }
4289 #define FGRPdb_4 NULL, { { NULL, 6 } }
4290 #define FGRPde_3 NULL, { { NULL, 7 } }
4291 #define FGRPdf_4 NULL, { { NULL, 8 } }
4293 static const struct dis386 float_reg
[][8] = {
4296 { "fadd", { ST
, STi
} },
4297 { "fmul", { ST
, STi
} },
4298 { "fcom", { STi
} },
4299 { "fcomp", { STi
} },
4300 { "fsub", { ST
, STi
} },
4301 { "fsubr", { ST
, STi
} },
4302 { "fdiv", { ST
, STi
} },
4303 { "fdivr", { ST
, STi
} },
4308 { "fxch", { STi
} },
4310 { "(bad)", { XX
} },
4318 { "fcmovb", { ST
, STi
} },
4319 { "fcmove", { ST
, STi
} },
4320 { "fcmovbe",{ ST
, STi
} },
4321 { "fcmovu", { ST
, STi
} },
4322 { "(bad)", { XX
} },
4324 { "(bad)", { XX
} },
4325 { "(bad)", { XX
} },
4329 { "fcmovnb",{ ST
, STi
} },
4330 { "fcmovne",{ ST
, STi
} },
4331 { "fcmovnbe",{ ST
, STi
} },
4332 { "fcmovnu",{ ST
, STi
} },
4334 { "fucomi", { ST
, STi
} },
4335 { "fcomi", { ST
, STi
} },
4336 { "(bad)", { XX
} },
4340 { "fadd", { STi
, ST
} },
4341 { "fmul", { STi
, ST
} },
4342 { "(bad)", { XX
} },
4343 { "(bad)", { XX
} },
4345 { "fsub", { STi
, ST
} },
4346 { "fsubr", { STi
, ST
} },
4347 { "fdiv", { STi
, ST
} },
4348 { "fdivr", { STi
, ST
} },
4350 { "fsubr", { STi
, ST
} },
4351 { "fsub", { STi
, ST
} },
4352 { "fdivr", { STi
, ST
} },
4353 { "fdiv", { STi
, ST
} },
4358 { "ffree", { STi
} },
4359 { "(bad)", { XX
} },
4361 { "fstp", { STi
} },
4362 { "fucom", { STi
} },
4363 { "fucomp", { STi
} },
4364 { "(bad)", { XX
} },
4365 { "(bad)", { XX
} },
4369 { "faddp", { STi
, ST
} },
4370 { "fmulp", { STi
, ST
} },
4371 { "(bad)", { XX
} },
4374 { "fsubp", { STi
, ST
} },
4375 { "fsubrp", { STi
, ST
} },
4376 { "fdivp", { STi
, ST
} },
4377 { "fdivrp", { STi
, ST
} },
4379 { "fsubrp", { STi
, ST
} },
4380 { "fsubp", { STi
, ST
} },
4381 { "fdivrp", { STi
, ST
} },
4382 { "fdivp", { STi
, ST
} },
4387 { "ffreep", { STi
} },
4388 { "(bad)", { XX
} },
4389 { "(bad)", { XX
} },
4390 { "(bad)", { XX
} },
4392 { "fucomip", { ST
, STi
} },
4393 { "fcomip", { ST
, STi
} },
4394 { "(bad)", { XX
} },
4398 static const char *fgrps
[][8] = {
4401 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4406 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4411 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4416 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4421 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4426 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4431 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4432 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4437 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4442 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4447 dofloat (int sizeflag
)
4449 const struct dis386
*dp
;
4450 unsigned char floatop
;
4452 floatop
= codep
[-1];
4456 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4458 putop (float_mem
[fp_indx
], sizeflag
);
4461 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4464 /* Skip mod/rm byte. */
4468 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4469 if (dp
->name
== NULL
)
4471 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4473 /* Instruction fnstsw is only one with strange arg. */
4474 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4475 pstrcpy (op_out
[0], sizeof(op_out
[0]), names16
[0]);
4479 putop (dp
->name
, sizeflag
);
4484 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4489 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4494 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4496 oappend ("%st" + intel_syntax
);
4500 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4502 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%st(%d)", modrm
.rm
);
4503 oappend (scratchbuf
+ intel_syntax
);
4506 /* Capital letters in template are macros. */
4508 putop (const char *template, int sizeflag
)
4513 for (p
= template; *p
; p
++)
4524 if (address_mode
== mode_64bit
)
4532 /* Alternative not valid. */
4533 pstrcpy (obuf
, sizeof(obuf
), "(bad)");
4537 else if (*p
== '\0')
4558 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4564 if (sizeflag
& SUFFIX_ALWAYS
)
4568 if (intel_syntax
&& !alt
)
4570 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4572 if (sizeflag
& DFLAG
)
4573 *obufp
++ = intel_syntax
? 'd' : 'l';
4575 *obufp
++ = intel_syntax
? 'w' : 's';
4576 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4580 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4587 else if (sizeflag
& DFLAG
)
4588 *obufp
++ = intel_syntax
? 'd' : 'l';
4591 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4596 case 'E': /* For jcxz/jecxz */
4597 if (address_mode
== mode_64bit
)
4599 if (sizeflag
& AFLAG
)
4605 if (sizeflag
& AFLAG
)
4607 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4612 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4614 if (sizeflag
& AFLAG
)
4615 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4617 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4618 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4622 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4624 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4629 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4634 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4635 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4637 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4640 if (prefixes
& PREFIX_DS
)
4661 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4670 if (sizeflag
& SUFFIX_ALWAYS
)
4674 if ((prefixes
& PREFIX_FWAIT
) == 0)
4677 used_prefixes
|= PREFIX_FWAIT
;
4683 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4688 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4693 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4702 if ((prefixes
& PREFIX_DATA
)
4704 || (sizeflag
& SUFFIX_ALWAYS
))
4711 if (sizeflag
& DFLAG
)
4716 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4722 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4724 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4730 if (intel_syntax
&& !alt
)
4733 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4739 if (sizeflag
& DFLAG
)
4740 *obufp
++ = intel_syntax
? 'd' : 'l';
4744 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4751 else if (sizeflag
& DFLAG
)
4760 if (intel_syntax
&& !p
[1]
4761 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4764 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4769 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4771 if (sizeflag
& SUFFIX_ALWAYS
)
4779 if (sizeflag
& SUFFIX_ALWAYS
)
4785 if (sizeflag
& DFLAG
)
4789 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4794 if (prefixes
& PREFIX_DATA
)
4798 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4809 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4811 /* operand size flag for cwtl, cbtw */
4820 else if (sizeflag
& DFLAG
)
4825 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4835 oappend (const char *s
)
4838 obufp
+= strlen (s
);
4844 if (prefixes
& PREFIX_CS
)
4846 used_prefixes
|= PREFIX_CS
;
4847 oappend ("%cs:" + intel_syntax
);
4849 if (prefixes
& PREFIX_DS
)
4851 used_prefixes
|= PREFIX_DS
;
4852 oappend ("%ds:" + intel_syntax
);
4854 if (prefixes
& PREFIX_SS
)
4856 used_prefixes
|= PREFIX_SS
;
4857 oappend ("%ss:" + intel_syntax
);
4859 if (prefixes
& PREFIX_ES
)
4861 used_prefixes
|= PREFIX_ES
;
4862 oappend ("%es:" + intel_syntax
);
4864 if (prefixes
& PREFIX_FS
)
4866 used_prefixes
|= PREFIX_FS
;
4867 oappend ("%fs:" + intel_syntax
);
4869 if (prefixes
& PREFIX_GS
)
4871 used_prefixes
|= PREFIX_GS
;
4872 oappend ("%gs:" + intel_syntax
);
4877 OP_indirE (int bytemode
, int sizeflag
)
4881 OP_E (bytemode
, sizeflag
);
4885 print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
)
4887 if (address_mode
== mode_64bit
)
4895 snprintf_vma (tmp
, sizeof(tmp
), disp
);
4896 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++) {
4898 pstrcpy (buf
+ 2, bufsize
- 2, tmp
+ i
);
4902 bfd_signed_vma v
= disp
;
4909 /* Check for possible overflow on 0x8000000000000000. */
4912 pstrcpy (buf
, bufsize
, "9223372036854775808");
4918 pstrcpy (buf
, bufsize
, "0");
4926 tmp
[28 - i
] = (v
% 10) + '0';
4930 pstrcpy (buf
, bufsize
, tmp
+ 29 - i
);
4936 snprintf (buf
, bufsize
, "0x%x", (unsigned int) disp
);
4938 snprintf (buf
, bufsize
, "%d", (int) disp
);
4942 /* Put DISP in BUF as signed hex number. */
4945 print_displacement (char *buf
, bfd_vma disp
)
4947 bfd_signed_vma val
= disp
;
4956 /* Check for possible overflow. */
4959 switch (address_mode
)
4962 strcpy (buf
+ j
, "0x8000000000000000");
4965 strcpy (buf
+ j
, "0x80000000");
4968 strcpy (buf
+ j
, "0x8000");
4978 snprintf_vma (tmp
, sizeof(tmp
), val
);
4979 for (i
= 0; tmp
[i
] == '0'; i
++)
4983 strcpy (buf
+ j
, tmp
+ i
);
4987 intel_operand_size (int bytemode
, int sizeflag
)
4993 oappend ("BYTE PTR ");
4997 oappend ("WORD PTR ");
5000 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5002 oappend ("QWORD PTR ");
5003 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5011 oappend ("QWORD PTR ");
5012 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
5013 oappend ("DWORD PTR ");
5015 oappend ("WORD PTR ");
5016 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5019 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5021 oappend ("WORD PTR ");
5023 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5027 oappend ("DWORD PTR ");
5030 oappend ("QWORD PTR ");
5033 if (address_mode
== mode_64bit
)
5034 oappend ("QWORD PTR ");
5036 oappend ("DWORD PTR ");
5039 if (sizeflag
& DFLAG
)
5040 oappend ("FWORD PTR ");
5042 oappend ("DWORD PTR ");
5043 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5046 oappend ("TBYTE PTR ");
5049 oappend ("XMMWORD PTR ");
5052 oappend ("OWORD PTR ");
5060 OP_E (int bytemode
, int sizeflag
)
5069 /* Skip mod/rm byte. */
5080 oappend (names8rex
[modrm
.rm
+ add
]);
5082 oappend (names8
[modrm
.rm
+ add
]);
5085 oappend (names16
[modrm
.rm
+ add
]);
5088 oappend (names32
[modrm
.rm
+ add
]);
5091 oappend (names64
[modrm
.rm
+ add
]);
5094 if (address_mode
== mode_64bit
)
5095 oappend (names64
[modrm
.rm
+ add
]);
5097 oappend (names32
[modrm
.rm
+ add
]);
5100 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5102 oappend (names64
[modrm
.rm
+ add
]);
5103 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5115 oappend (names64
[modrm
.rm
+ add
]);
5116 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5117 oappend (names32
[modrm
.rm
+ add
]);
5119 oappend (names16
[modrm
.rm
+ add
]);
5120 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5125 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5133 intel_operand_size (bytemode
, sizeflag
);
5136 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5138 /* 32/64 bit address mode */
5153 fetch_data(the_info
, codep
+ 1);
5154 index
= (*codep
>> 3) & 7;
5155 if (address_mode
== mode_64bit
|| index
!= 0x4)
5156 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5157 scale
= (*codep
>> 6) & 3;
5169 if ((base
& 7) == 5)
5172 if (address_mode
== mode_64bit
&& !havesib
)
5178 fetch_data (the_info
, codep
+ 1);
5180 if ((disp
& 0x80) != 0)
5188 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
5191 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5193 if (havedisp
|| riprel
)
5194 print_displacement (scratchbuf
, disp
);
5196 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5197 oappend (scratchbuf
);
5205 if (havedisp
|| (intel_syntax
&& riprel
))
5207 *obufp
++ = open_char
;
5208 if (intel_syntax
&& riprel
)
5215 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5216 ? names64
[base
] : names32
[base
]);
5221 if (!intel_syntax
|| havebase
)
5223 *obufp
++ = separator_char
;
5226 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5227 ? names64
[index
] : names32
[index
]);
5229 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
5231 *obufp
++ = scale_char
;
5233 snprintf (scratchbuf
, sizeof(scratchbuf
), "%d", 1 << scale
);
5234 oappend (scratchbuf
);
5238 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
5240 if ((bfd_signed_vma
) disp
>= 0)
5245 else if (modrm
.mod
!= 1)
5249 disp
= - (bfd_signed_vma
) disp
;
5252 print_displacement (scratchbuf
, disp
);
5253 oappend (scratchbuf
);
5256 *obufp
++ = close_char
;
5259 else if (intel_syntax
)
5261 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5263 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5264 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5268 oappend (names_seg
[ds_reg
- es_reg
]);
5271 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5272 oappend (scratchbuf
);
5277 { /* 16 bit address mode */
5284 if ((disp
& 0x8000) != 0)
5289 fetch_data(the_info
, codep
+ 1);
5291 if ((disp
& 0x80) != 0)
5296 if ((disp
& 0x8000) != 0)
5302 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5304 print_displacement (scratchbuf
, disp
);
5305 oappend (scratchbuf
);
5308 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5310 *obufp
++ = open_char
;
5312 oappend (index16
[modrm
.rm
]);
5314 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5316 if ((bfd_signed_vma
) disp
>= 0)
5321 else if (modrm
.mod
!= 1)
5325 disp
= - (bfd_signed_vma
) disp
;
5328 print_displacement (scratchbuf
, disp
);
5329 oappend (scratchbuf
);
5332 *obufp
++ = close_char
;
5335 else if (intel_syntax
)
5337 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5338 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5342 oappend (names_seg
[ds_reg
- es_reg
]);
5345 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1,
5347 oappend (scratchbuf
);
5353 OP_G (int bytemode
, int sizeflag
)
5364 oappend (names8rex
[modrm
.reg
+ add
]);
5366 oappend (names8
[modrm
.reg
+ add
]);
5369 oappend (names16
[modrm
.reg
+ add
]);
5372 oappend (names32
[modrm
.reg
+ add
]);
5375 oappend (names64
[modrm
.reg
+ add
]);
5384 oappend (names64
[modrm
.reg
+ add
]);
5385 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5386 oappend (names32
[modrm
.reg
+ add
]);
5388 oappend (names16
[modrm
.reg
+ add
]);
5389 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5392 if (address_mode
== mode_64bit
)
5393 oappend (names64
[modrm
.reg
+ add
]);
5395 oappend (names32
[modrm
.reg
+ add
]);
5398 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5404 OP_vvvv (int bytemode
, int sizeflags
)
5408 oappend(names64
[vex_reg
]);
5410 oappend(names32
[vex_reg
]);
5422 fetch_data(the_info
, codep
+ 8);
5423 a
= *codep
++ & 0xff;
5424 a
|= (*codep
++ & 0xff) << 8;
5425 a
|= (*codep
++ & 0xff) << 16;
5426 a
|= (*codep
++ & 0xff) << 24;
5427 b
= *codep
++ & 0xff;
5428 b
|= (*codep
++ & 0xff) << 8;
5429 b
|= (*codep
++ & 0xff) << 16;
5430 b
|= (*codep
++ & 0xff) << 24;
5431 x
= a
+ ((bfd_vma
) b
<< 32);
5439 static bfd_signed_vma
5442 bfd_signed_vma x
= 0;
5444 fetch_data(the_info
, codep
+ 4);
5445 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5446 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5447 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5448 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5452 static bfd_signed_vma
5455 bfd_signed_vma x
= 0;
5457 fetch_data(the_info
, codep
+ 4);
5458 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5459 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5460 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5461 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5463 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5473 fetch_data(the_info
, codep
+ 2);
5474 x
= *codep
++ & 0xff;
5475 x
|= (*codep
++ & 0xff) << 8;
5480 set_op (bfd_vma op
, int riprel
)
5482 op_index
[op_ad
] = op_ad
;
5483 if (address_mode
== mode_64bit
)
5485 op_address
[op_ad
] = op
;
5486 op_riprel
[op_ad
] = riprel
;
5490 /* Mask to get a 32-bit address. */
5491 op_address
[op_ad
] = op
& 0xffffffff;
5492 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5497 OP_REG (int code
, int sizeflag
)
5507 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5508 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5509 s
= names16
[code
- ax_reg
+ add
];
5511 case es_reg
: case ss_reg
: case cs_reg
:
5512 case ds_reg
: case fs_reg
: case gs_reg
:
5513 s
= names_seg
[code
- es_reg
+ add
];
5515 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5516 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5519 s
= names8rex
[code
- al_reg
+ add
];
5521 s
= names8
[code
- al_reg
];
5523 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5524 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5525 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5527 s
= names64
[code
- rAX_reg
+ add
];
5530 code
+= eAX_reg
- rAX_reg
;
5532 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5533 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5536 s
= names64
[code
- eAX_reg
+ add
];
5537 else if (sizeflag
& DFLAG
)
5538 s
= names32
[code
- eAX_reg
+ add
];
5540 s
= names16
[code
- eAX_reg
+ add
];
5541 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5544 s
= INTERNAL_DISASSEMBLER_ERROR
;
5551 OP_IMREG (int code
, int sizeflag
)
5563 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5564 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5565 s
= names16
[code
- ax_reg
];
5567 case es_reg
: case ss_reg
: case cs_reg
:
5568 case ds_reg
: case fs_reg
: case gs_reg
:
5569 s
= names_seg
[code
- es_reg
];
5571 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5572 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5575 s
= names8rex
[code
- al_reg
];
5577 s
= names8
[code
- al_reg
];
5579 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5580 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5583 s
= names64
[code
- eAX_reg
];
5584 else if (sizeflag
& DFLAG
)
5585 s
= names32
[code
- eAX_reg
];
5587 s
= names16
[code
- eAX_reg
];
5588 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5591 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5596 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5599 s
= INTERNAL_DISASSEMBLER_ERROR
;
5606 OP_I (int bytemode
, int sizeflag
)
5609 bfd_signed_vma mask
= -1;
5614 fetch_data(the_info
, codep
+ 1);
5619 if (address_mode
== mode_64bit
)
5629 else if (sizeflag
& DFLAG
)
5639 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5650 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5655 scratchbuf
[0] = '$';
5656 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5657 oappend (scratchbuf
+ intel_syntax
);
5658 scratchbuf
[0] = '\0';
5662 OP_I64 (int bytemode
, int sizeflag
)
5665 bfd_signed_vma mask
= -1;
5667 if (address_mode
!= mode_64bit
)
5669 OP_I (bytemode
, sizeflag
);
5676 fetch_data(the_info
, codep
+ 1);
5684 else if (sizeflag
& DFLAG
)
5694 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5701 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5706 scratchbuf
[0] = '$';
5707 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5708 oappend (scratchbuf
+ intel_syntax
);
5709 scratchbuf
[0] = '\0';
5713 OP_sI (int bytemode
, int sizeflag
)
5720 fetch_data(the_info
, codep
+ 1);
5722 if ((op
& 0x80) != 0)
5729 else if (sizeflag
& DFLAG
)
5736 if ((op
& 0x8000) != 0)
5739 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5743 if ((op
& 0x8000) != 0)
5747 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5751 scratchbuf
[0] = '$';
5752 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5753 oappend (scratchbuf
+ intel_syntax
);
5757 OP_J (int bytemode
, int sizeflag
)
5761 bfd_vma segment
= 0;
5766 fetch_data(the_info
, codep
+ 1);
5768 if ((disp
& 0x80) != 0)
5772 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5777 if ((disp
& 0x8000) != 0)
5779 /* In 16bit mode, address is wrapped around at 64k within
5780 the same segment. Otherwise, a data16 prefix on a jump
5781 instruction means that the pc is masked to 16 bits after
5782 the displacement is added! */
5784 if ((prefixes
& PREFIX_DATA
) == 0)
5785 segment
= ((start_pc
+ codep
- start_codep
)
5786 & ~((bfd_vma
) 0xffff));
5788 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5791 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5794 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5796 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5797 oappend (scratchbuf
);
5801 OP_SEG (int bytemode
, int sizeflag
)
5803 if (bytemode
== w_mode
)
5804 oappend (names_seg
[modrm
.reg
]);
5806 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5810 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5814 if (sizeflag
& DFLAG
)
5824 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5826 snprintf (scratchbuf
, sizeof(scratchbuf
), "0x%x:0x%x", seg
, offset
);
5828 snprintf (scratchbuf
, sizeof(scratchbuf
), "$0x%x,$0x%x", seg
, offset
);
5829 oappend (scratchbuf
);
5833 OP_OFF (int bytemode
, int sizeflag
)
5837 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5838 intel_operand_size (bytemode
, sizeflag
);
5841 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5848 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5849 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5851 oappend (names_seg
[ds_reg
- es_reg
]);
5855 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, off
);
5856 oappend (scratchbuf
);
5860 OP_OFF64 (int bytemode
, int sizeflag
)
5864 if (address_mode
!= mode_64bit
5865 || (prefixes
& PREFIX_ADDR
))
5867 OP_OFF (bytemode
, sizeflag
);
5871 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5872 intel_operand_size (bytemode
, sizeflag
);
5879 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5880 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5882 oappend (names_seg
[ds_reg
- es_reg
]);
5886 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, off
);
5887 oappend (scratchbuf
);
5891 ptr_reg (int code
, int sizeflag
)
5895 *obufp
++ = open_char
;
5896 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5897 if (address_mode
== mode_64bit
)
5899 if (!(sizeflag
& AFLAG
))
5900 s
= names32
[code
- eAX_reg
];
5902 s
= names64
[code
- eAX_reg
];
5904 else if (sizeflag
& AFLAG
)
5905 s
= names32
[code
- eAX_reg
];
5907 s
= names16
[code
- eAX_reg
];
5909 *obufp
++ = close_char
;
5914 OP_ESreg (int code
, int sizeflag
)
5920 case 0x6d: /* insw/insl */
5921 intel_operand_size (z_mode
, sizeflag
);
5923 case 0xa5: /* movsw/movsl/movsq */
5924 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5925 case 0xab: /* stosw/stosl */
5926 case 0xaf: /* scasw/scasl */
5927 intel_operand_size (v_mode
, sizeflag
);
5930 intel_operand_size (b_mode
, sizeflag
);
5933 oappend ("%es:" + intel_syntax
);
5934 ptr_reg (code
, sizeflag
);
5938 OP_DSreg (int code
, int sizeflag
)
5944 case 0x6f: /* outsw/outsl */
5945 intel_operand_size (z_mode
, sizeflag
);
5947 case 0xa5: /* movsw/movsl/movsq */
5948 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5949 case 0xad: /* lodsw/lodsl/lodsq */
5950 intel_operand_size (v_mode
, sizeflag
);
5953 intel_operand_size (b_mode
, sizeflag
);
5963 prefixes
|= PREFIX_DS
;
5965 ptr_reg (code
, sizeflag
);
5969 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5977 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5979 used_prefixes
|= PREFIX_LOCK
;
5982 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%cr%d", modrm
.reg
+ add
);
5983 oappend (scratchbuf
+ intel_syntax
);
5987 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5994 snprintf (scratchbuf
, sizeof(scratchbuf
), "db%d", modrm
.reg
+ add
);
5996 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%db%d", modrm
.reg
+ add
);
5997 oappend (scratchbuf
);
6001 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6003 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%tr%d", modrm
.reg
);
6004 oappend (scratchbuf
+ intel_syntax
);
6008 OP_R (int bytemode
, int sizeflag
)
6011 OP_E (bytemode
, sizeflag
);
6017 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6019 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6020 if (prefixes
& PREFIX_DATA
)
6026 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.reg
+ add
);
6029 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.reg
);
6030 oappend (scratchbuf
+ intel_syntax
);
6034 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6040 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.reg
+ add
);
6041 oappend (scratchbuf
+ intel_syntax
);
6045 OP_EM (int bytemode
, int sizeflag
)
6049 if (intel_syntax
&& bytemode
== v_mode
)
6051 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
6052 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6054 OP_E (bytemode
, sizeflag
);
6058 /* Skip mod/rm byte. */
6061 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6062 if (prefixes
& PREFIX_DATA
)
6069 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.rm
+ add
);
6072 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.rm
);
6073 oappend (scratchbuf
+ intel_syntax
);
6076 /* cvt* are the only instructions in sse2 which have
6077 both SSE and MMX operands and also have 0x66 prefix
6078 in their opcode. 0x66 was originally used to differentiate
6079 between SSE and MMX instruction(operands). So we have to handle the
6080 cvt* separately using OP_EMC and OP_MXC */
6082 OP_EMC (int bytemode
, int sizeflag
)
6086 if (intel_syntax
&& bytemode
== v_mode
)
6088 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
6089 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6091 OP_E (bytemode
, sizeflag
);
6095 /* Skip mod/rm byte. */
6098 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6099 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.rm
);
6100 oappend (scratchbuf
+ intel_syntax
);
6104 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6106 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6107 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.reg
);
6108 oappend (scratchbuf
+ intel_syntax
);
6112 OP_EX (int bytemode
, int sizeflag
)
6117 OP_E (bytemode
, sizeflag
);
6124 /* Skip mod/rm byte. */
6127 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.rm
+ add
);
6128 oappend (scratchbuf
+ intel_syntax
);
6132 OP_MS (int bytemode
, int sizeflag
)
6135 OP_EM (bytemode
, sizeflag
);
6141 OP_XS (int bytemode
, int sizeflag
)
6144 OP_EX (bytemode
, sizeflag
);
6150 OP_M (int bytemode
, int sizeflag
)
6153 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6156 OP_E (bytemode
, sizeflag
);
6160 OP_0f07 (int bytemode
, int sizeflag
)
6162 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
6165 OP_E (bytemode
, sizeflag
);
6169 OP_0fae (int bytemode
, int sizeflag
)
6174 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
6176 if (modrm
.reg
< 5 || modrm
.rm
!= 0)
6178 BadOp (); /* bad sfence, mfence, or lfence */
6182 else if (modrm
.reg
!= 7)
6184 BadOp (); /* bad clflush */
6188 OP_E (bytemode
, sizeflag
);
6191 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6192 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6195 NOP_Fixup1 (int bytemode
, int sizeflag
)
6197 if ((prefixes
& PREFIX_DATA
) != 0
6200 && address_mode
== mode_64bit
))
6201 OP_REG (bytemode
, sizeflag
);
6203 strcpy (obuf
, "nop");
6207 NOP_Fixup2 (int bytemode
, int sizeflag
)
6209 if ((prefixes
& PREFIX_DATA
) != 0
6212 && address_mode
== mode_64bit
))
6213 OP_IMREG (bytemode
, sizeflag
);
6216 static const char *Suffix3DNow
[] = {
6217 /* 00 */ NULL
, NULL
, NULL
, NULL
,
6218 /* 04 */ NULL
, NULL
, NULL
, NULL
,
6219 /* 08 */ NULL
, NULL
, NULL
, NULL
,
6220 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
6221 /* 10 */ NULL
, NULL
, NULL
, NULL
,
6222 /* 14 */ NULL
, NULL
, NULL
, NULL
,
6223 /* 18 */ NULL
, NULL
, NULL
, NULL
,
6224 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
6225 /* 20 */ NULL
, NULL
, NULL
, NULL
,
6226 /* 24 */ NULL
, NULL
, NULL
, NULL
,
6227 /* 28 */ NULL
, NULL
, NULL
, NULL
,
6228 /* 2C */ NULL
, NULL
, NULL
, NULL
,
6229 /* 30 */ NULL
, NULL
, NULL
, NULL
,
6230 /* 34 */ NULL
, NULL
, NULL
, NULL
,
6231 /* 38 */ NULL
, NULL
, NULL
, NULL
,
6232 /* 3C */ NULL
, NULL
, NULL
, NULL
,
6233 /* 40 */ NULL
, NULL
, NULL
, NULL
,
6234 /* 44 */ NULL
, NULL
, NULL
, NULL
,
6235 /* 48 */ NULL
, NULL
, NULL
, NULL
,
6236 /* 4C */ NULL
, NULL
, NULL
, NULL
,
6237 /* 50 */ NULL
, NULL
, NULL
, NULL
,
6238 /* 54 */ NULL
, NULL
, NULL
, NULL
,
6239 /* 58 */ NULL
, NULL
, NULL
, NULL
,
6240 /* 5C */ NULL
, NULL
, NULL
, NULL
,
6241 /* 60 */ NULL
, NULL
, NULL
, NULL
,
6242 /* 64 */ NULL
, NULL
, NULL
, NULL
,
6243 /* 68 */ NULL
, NULL
, NULL
, NULL
,
6244 /* 6C */ NULL
, NULL
, NULL
, NULL
,
6245 /* 70 */ NULL
, NULL
, NULL
, NULL
,
6246 /* 74 */ NULL
, NULL
, NULL
, NULL
,
6247 /* 78 */ NULL
, NULL
, NULL
, NULL
,
6248 /* 7C */ NULL
, NULL
, NULL
, NULL
,
6249 /* 80 */ NULL
, NULL
, NULL
, NULL
,
6250 /* 84 */ NULL
, NULL
, NULL
, NULL
,
6251 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
6252 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
6253 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
6254 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
6255 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
6256 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
6257 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
6258 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
6259 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
6260 /* AC */ NULL
, NULL
, "pfacc", NULL
,
6261 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
6262 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
6263 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
6264 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
6265 /* C0 */ NULL
, NULL
, NULL
, NULL
,
6266 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6267 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6268 /* CC */ NULL
, NULL
, NULL
, NULL
,
6269 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6270 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6271 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6272 /* DC */ NULL
, NULL
, NULL
, NULL
,
6273 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6274 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6275 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6276 /* EC */ NULL
, NULL
, NULL
, NULL
,
6277 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6278 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6279 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6280 /* FC */ NULL
, NULL
, NULL
, NULL
,
6284 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6286 const char *mnemonic
;
6288 fetch_data(the_info
, codep
+ 1);
6289 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6290 place where an 8-bit immediate would normally go. ie. the last
6291 byte of the instruction. */
6292 obufp
= obuf
+ strlen (obuf
);
6293 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6298 /* Since a variable sized modrm/sib chunk is between the start
6299 of the opcode (0x0f0f) and the opcode suffix, we need to do
6300 all the modrm processing first, and don't know until now that
6301 we have a bad opcode. This necessitates some cleaning up. */
6302 op_out
[0][0] = '\0';
6303 op_out
[1][0] = '\0';
6308 static const char *simd_cmp_op
[] = {
6320 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6322 unsigned int cmp_type
;
6324 fetch_data(the_info
, codep
+ 1);
6325 obufp
= obuf
+ strlen (obuf
);
6326 cmp_type
= *codep
++ & 0xff;
6329 char suffix1
= 'p', suffix2
= 's';
6330 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6331 if (prefixes
& PREFIX_REPZ
)
6335 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6336 if (prefixes
& PREFIX_DATA
)
6340 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6341 if (prefixes
& PREFIX_REPNZ
)
6342 suffix1
= 's', suffix2
= 'd';
6345 snprintf (scratchbuf
, sizeof(scratchbuf
), "cmp%s%c%c",
6346 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6347 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6348 oappend (scratchbuf
);
6352 /* We have a bad extension byte. Clean up. */
6353 op_out
[0][0] = '\0';
6354 op_out
[1][0] = '\0';
6360 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6362 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6363 forms of these instructions. */
6366 char *p
= obuf
+ strlen (obuf
);
6369 *(p
- 1) = *(p
- 2);
6370 *(p
- 2) = *(p
- 3);
6371 *(p
- 3) = extrachar
;
6376 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6378 if (modrm
.mod
== 3 && modrm
.reg
== 1 && modrm
.rm
<= 1)
6380 /* Override "sidt". */
6381 size_t olen
= strlen (obuf
);
6382 char *p
= obuf
+ olen
- 4;
6383 const char * const *names
= (address_mode
== mode_64bit
6384 ? names64
: names32
);
6386 /* We might have a suffix when disassembling with -Msuffix. */
6390 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6392 && (prefixes
& PREFIX_ADDR
)
6395 && strncmp (p
- 7, "addr", 4) == 0
6396 && (strncmp (p
- 3, "16", 2) == 0
6397 || strncmp (p
- 3, "32", 2) == 0))
6402 /* mwait %eax,%ecx */
6403 strcpy (p
, "mwait");
6405 strcpy (op_out
[0], names
[0]);
6409 /* monitor %eax,%ecx,%edx" */
6410 strcpy (p
, "monitor");
6413 const char * const *op1_names
;
6414 if (!(prefixes
& PREFIX_ADDR
))
6415 op1_names
= (address_mode
== mode_16bit
6419 op1_names
= (address_mode
!= mode_32bit
6420 ? names32
: names16
);
6421 used_prefixes
|= PREFIX_ADDR
;
6423 strcpy (op_out
[0], op1_names
[0]);
6424 strcpy (op_out
[2], names
[2]);
6429 strcpy (op_out
[1], names
[1]);
6440 SVME_Fixup (int bytemode
, int sizeflag
)
6472 OP_M (bytemode
, sizeflag
);
6475 /* Override "lidt". */
6476 p
= obuf
+ strlen (obuf
) - 4;
6477 /* We might have a suffix. */
6481 if (!(prefixes
& PREFIX_ADDR
))
6486 used_prefixes
|= PREFIX_ADDR
;
6490 strcpy (op_out
[1], names32
[1]);
6496 *obufp
++ = open_char
;
6497 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6501 strcpy (obufp
, alt
);
6502 obufp
+= strlen (alt
);
6503 *obufp
++ = close_char
;
6510 INVLPG_Fixup (int bytemode
, int sizeflag
)
6523 OP_M (bytemode
, sizeflag
);
6526 /* Override "invlpg". */
6527 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6534 /* Throw away prefixes and 1st. opcode byte. */
6535 codep
= insn_codep
+ 1;
6540 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6547 /* Override "sgdt". */
6548 char *p
= obuf
+ strlen (obuf
) - 4;
6550 /* We might have a suffix when disassembling with -Msuffix. */
6557 strcpy (p
, "vmcall");
6560 strcpy (p
, "vmlaunch");
6563 strcpy (p
, "vmresume");
6566 strcpy (p
, "vmxoff");
6577 OP_VMX (int bytemode
, int sizeflag
)
6579 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
6580 if (prefixes
& PREFIX_DATA
)
6581 strcpy (obuf
, "vmclear");
6582 else if (prefixes
& PREFIX_REPZ
)
6583 strcpy (obuf
, "vmxon");
6585 strcpy (obuf
, "vmptrld");
6586 OP_E (bytemode
, sizeflag
);
6590 REP_Fixup (int bytemode
, int sizeflag
)
6592 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6596 if (prefixes
& PREFIX_REPZ
)
6597 switch (*insn_codep
)
6599 case 0x6e: /* outsb */
6600 case 0x6f: /* outsw/outsl */
6601 case 0xa4: /* movsb */
6602 case 0xa5: /* movsw/movsl/movsq */
6608 case 0xaa: /* stosb */
6609 case 0xab: /* stosw/stosl/stosq */
6610 case 0xac: /* lodsb */
6611 case 0xad: /* lodsw/lodsl/lodsq */
6612 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
6617 case 0x6c: /* insb */
6618 case 0x6d: /* insl/insw */
6634 olen
= strlen (obuf
);
6635 p
= obuf
+ olen
- ilen
- 1 - 4;
6636 /* Handle "repz [addr16|addr32]". */
6637 if ((prefixes
& PREFIX_ADDR
))
6640 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
6648 OP_IMREG (bytemode
, sizeflag
);
6651 OP_ESreg (bytemode
, sizeflag
);
6654 OP_DSreg (bytemode
, sizeflag
);
6663 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6668 /* Change cmpxchg8b to cmpxchg16b. */
6669 char *p
= obuf
+ strlen (obuf
) - 2;
6673 OP_M (bytemode
, sizeflag
);
6677 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6679 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", reg
);
6680 oappend (scratchbuf
+ intel_syntax
);
6684 CRC32_Fixup (int bytemode
, int sizeflag
)
6686 /* Add proper suffix to "crc32". */
6687 char *p
= obuf
+ strlen (obuf
);
6704 else if (sizeflag
& DFLAG
)
6708 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6711 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6720 /* Skip mod/rm byte. */
6725 add
= (rex
& REX_B
) ? 8 : 0;
6726 if (bytemode
== b_mode
)
6730 oappend (names8rex
[modrm
.rm
+ add
]);
6732 oappend (names8
[modrm
.rm
+ add
]);
6738 oappend (names64
[modrm
.rm
+ add
]);
6739 else if ((prefixes
& PREFIX_DATA
))
6740 oappend (names16
[modrm
.rm
+ add
]);
6742 oappend (names32
[modrm
.rm
+ add
]);
6746 OP_E (bytemode
, sizeflag
);