tests/qtest/cxl-test.c

   1 /*
   2  * QTest testcase for CXL
   3  *
   4  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   5  * See the COPYING file in the top-level directory.
   6  */
   7
   8 #include "qemu/osdep.h"
   9 #include "libqtest-single.h"
  10
  11 #define QEMU_PXB_CMD "-machine q35,cxl=on " \
  12                      "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 "  \
  13                      "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.size=4G "
  14
  15 #define QEMU_2PXB_CMD "-machine q35,cxl=on "                            \
  16                       "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 "  \
  17                       "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \
  18                       "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=4G "
  19
  20 #define QEMU_RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 "
  21
  22 /* Dual ports on first pxb */
  23 #define QEMU_2RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " \
  24                  "-device cxl-rp,id=rp1,bus=cxl.0,chassis=0,slot=1 "
  25
  26 /* Dual ports on each of the pxb instances */
  27 #define QEMU_4RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " \
  28                  "-device cxl-rp,id=rp1,bus=cxl.0,chassis=0,slot=1 " \
  29                  "-device cxl-rp,id=rp2,bus=cxl.1,chassis=0,slot=2 " \
  30                  "-device cxl-rp,id=rp3,bus=cxl.1,chassis=0,slot=3 "
  31
  32 #define QEMU_T3D "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \
  33                  "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M "    \
  34                  "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 "
  35
  36 #define QEMU_2T3D "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M "    \
  37                   "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M "    \
  38                   "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 " \
  39                   "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M "    \
  40                   "-object memory-backend-file,id=lsa1,mem-path=%s,size=256M "    \
  41                   "-device cxl-type3,bus=rp1,memdev=cxl-mem1,lsa=lsa1,id=cxl-pmem1 "
  42
  43 #define QEMU_4T3D "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \
  44                   "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M "    \
  45                   "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 " \
  46                   "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M "    \
  47                   "-object memory-backend-file,id=lsa1,mem-path=%s,size=256M "    \
  48                   "-device cxl-type3,bus=rp1,memdev=cxl-mem1,lsa=lsa1,id=cxl-pmem1 " \
  49                   "-object memory-backend-file,id=cxl-mem2,mem-path=%s,size=256M "    \
  50                   "-object memory-backend-file,id=lsa2,mem-path=%s,size=256M "    \
  51                   "-device cxl-type3,bus=rp2,memdev=cxl-mem2,lsa=lsa2,id=cxl-pmem2 " \
  52                   "-object memory-backend-file,id=cxl-mem3,mem-path=%s,size=256M "    \
  53                   "-object memory-backend-file,id=lsa3,mem-path=%s,size=256M "    \
  54                   "-device cxl-type3,bus=rp3,memdev=cxl-mem3,lsa=lsa3,id=cxl-pmem3 "
  55
  56 static void cxl_basic_hb(void)
  57 {
  58     qtest_start("-machine q35,cxl=on");
  59     qtest_end();
  60 }
  61
  62 static void cxl_basic_pxb(void)
  63 {
  64     qtest_start("-machine q35,cxl=on -device pxb-cxl,bus=pcie.0");
  65     qtest_end();
  66 }
  67
  68 static void cxl_pxb_with_window(void)
  69 {
  70     qtest_start(QEMU_PXB_CMD);
  71     qtest_end();
  72 }
  73
  74 static void cxl_2pxb_with_window(void)
  75 {
  76     qtest_start(QEMU_2PXB_CMD);
  77     qtest_end();
  78 }
  79
  80 static void cxl_root_port(void)
  81 {
  82     qtest_start(QEMU_PXB_CMD QEMU_RP);
  83     qtest_end();
  84 }
  85
  86 static void cxl_2root_port(void)
  87 {
  88     qtest_start(QEMU_PXB_CMD QEMU_2RP);
  89     qtest_end();
  90 }
  91
  92 #ifdef CONFIG_POSIX
  93 static void cxl_t3d(void)
  94 {
  95     g_autoptr(GString) cmdline = g_string_new(NULL);
  96     g_autofree const char *tmpfs = NULL;
  97
  98     tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL);
  99
 100     g_string_printf(cmdline, QEMU_PXB_CMD QEMU_RP QEMU_T3D, tmpfs, tmpfs);
 101
 102     qtest_start(cmdline->str);
 103     qtest_end();
 104     rmdir(tmpfs);
 105 }
 106
 107 static void cxl_1pxb_2rp_2t3d(void)
 108 {
 109     g_autoptr(GString) cmdline = g_string_new(NULL);
 110     g_autofree const char *tmpfs = NULL;
 111
 112     tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL);
 113
 114     g_string_printf(cmdline, QEMU_PXB_CMD QEMU_2RP QEMU_2T3D,
 115                     tmpfs, tmpfs, tmpfs, tmpfs);
 116
 117     qtest_start(cmdline->str);
 118     qtest_end();
 119     rmdir(tmpfs);
 120 }
 121
 122 static void cxl_2pxb_4rp_4t3d(void)
 123 {
 124     g_autoptr(GString) cmdline = g_string_new(NULL);
 125     g_autofree const char *tmpfs = NULL;
 126
 127     tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL);
 128
 129     g_string_printf(cmdline, QEMU_2PXB_CMD QEMU_4RP QEMU_4T3D,
 130                     tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, tmpfs,
 131                     tmpfs, tmpfs);
 132
 133     qtest_start(cmdline->str);
 134     qtest_end();
 135     rmdir(tmpfs);
 136 }
 137 #endif /* CONFIG_POSIX */
 138
 139 int main(int argc, char **argv)
 140 {
 141     g_test_init(&argc, &argv, NULL);
 142
 143     qtest_add_func("/pci/cxl/basic_hostbridge", cxl_basic_hb);
 144     qtest_add_func("/pci/cxl/basic_pxb", cxl_basic_pxb);
 145     qtest_add_func("/pci/cxl/pxb_with_window", cxl_pxb_with_window);
 146     qtest_add_func("/pci/cxl/pxb_x2_with_window", cxl_2pxb_with_window);
 147     qtest_add_func("/pci/cxl/rp", cxl_root_port);
 148     qtest_add_func("/pci/cxl/rp_x2", cxl_2root_port);
 149 #ifdef CONFIG_POSIX
 150     qtest_add_func("/pci/cxl/type3_device", cxl_t3d);
 151     qtest_add_func("/pci/cxl/rp_x2_type3_x2", cxl_1pxb_2rp_2t3d);
 152     qtest_add_func("/pci/cxl/pxb_x2_root_port_x4_type3_x4", cxl_2pxb_4rp_4t3d);
 153 #endif
 154     return g_test_run();
 155 }