2 * Generic Loongson-3 Platform support
4 * Copyright (c) 2018-2020 Huacai Chen (chenhc@lemote.com)
5 * Copyright (c) 2018-2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <https://www.gnu.org/licenses/>.
22 * Generic virtualized PC Platform based on Loongson-3 CPU (MIPS64R2 with
23 * extensions, 800~2000MHz)
26 #include "qemu/osdep.h"
27 #include "qemu/units.h"
28 #include "qemu/cutils.h"
29 #include "qemu/datadir.h"
30 #include "qapi/error.h"
32 #include "hw/char/serial.h"
33 #include "hw/intc/loongson_liointc.h"
34 #include "hw/mips/mips.h"
35 #include "hw/mips/fw_cfg.h"
36 #include "hw/mips/loongson3_bootp.h"
37 #include "hw/misc/unimp.h"
38 #include "hw/intc/i8259.h"
39 #include "hw/loader.h"
40 #include "hw/isa/superio.h"
41 #include "hw/pci/msi.h"
42 #include "hw/pci/pci.h"
43 #include "hw/pci/pci_host.h"
44 #include "hw/pci-host/gpex.h"
47 #include "sysemu/kvm.h"
48 #include "sysemu/qtest.h"
49 #include "sysemu/reset.h"
50 #include "sysemu/runstate.h"
51 #include "qemu/error-report.h"
53 #define PM_CNTL_MODE 0x10
55 #define LOONGSON_MAX_VCPUS 16
58 * Loongson-3's virtual machine BIOS can be obtained here:
59 * 1, https://github.com/loongson-community/firmware-nonfree
60 * 2, http://dev.lemote.com:8000/files/firmware/UEFI/KVM/bios_loongson3.bin
62 #define LOONGSON3_BIOSNAME "bios_loongson3.bin"
66 #define PCIE_IRQ_BASE 2
68 const MemMapEntry virt_memmap
[] = {
69 [VIRT_LOWMEM
] = { 0x00000000, 0x10000000 },
70 [VIRT_PM
] = { 0x10080000, 0x100 },
71 [VIRT_FW_CFG
] = { 0x10080100, 0x100 },
72 [VIRT_RTC
] = { 0x10081000, 0x1000 },
73 [VIRT_PCIE_PIO
] = { 0x18000000, 0x80000 },
74 [VIRT_PCIE_ECAM
] = { 0x1a000000, 0x2000000 },
75 [VIRT_BIOS_ROM
] = { 0x1fc00000, 0x200000 },
76 [VIRT_UART
] = { 0x1fe001e0, 0x8 },
77 [VIRT_LIOINTC
] = { 0x3ff01400, 0x64 },
78 [VIRT_PCIE_MMIO
] = { 0x40000000, 0x40000000 },
79 [VIRT_HIGHMEM
] = { 0x80000000, 0x0 }, /* Variable */
82 static const MemMapEntry loader_memmap
[] = {
83 [LOADER_KERNEL
] = { 0x00000000, 0x4000000 },
84 [LOADER_INITRD
] = { 0x04000000, 0x0 }, /* Variable */
85 [LOADER_CMDLINE
] = { 0x0ff00000, 0x100000 },
88 static const MemMapEntry loader_rommap
[] = {
89 [LOADER_BOOTROM
] = { 0x1fc00000, 0x1000 },
90 [LOADER_PARAM
] = { 0x1fc01000, 0x10000 },
93 struct LoongsonMachineState
{
94 MachineState parent_obj
;
95 MemoryRegion
*pio_alias
;
96 MemoryRegion
*mmio_alias
;
97 MemoryRegion
*ecam_alias
;
99 typedef struct LoongsonMachineState LoongsonMachineState
;
101 #define TYPE_LOONGSON_MACHINE MACHINE_TYPE_NAME("loongson3-virt")
102 DECLARE_INSTANCE_CHECKER(LoongsonMachineState
, LOONGSON_MACHINE
, TYPE_LOONGSON_MACHINE
)
104 static struct _loaderparams
{
107 const char *kernel_cmdline
;
108 const char *kernel_filename
;
109 const char *initrd_filename
;
110 uint64_t kernel_entry
;
114 static uint64_t loongson3_pm_read(void *opaque
, hwaddr addr
, unsigned size
)
119 static void loongson3_pm_write(void *opaque
, hwaddr addr
,
120 uint64_t val
, unsigned size
)
122 if (addr
!= PM_CNTL_MODE
) {
128 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET
);
131 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN
);
138 static const MemoryRegionOps loongson3_pm_ops
= {
139 .read
= loongson3_pm_read
,
140 .write
= loongson3_pm_write
,
141 .endianness
= DEVICE_NATIVE_ENDIAN
,
143 .min_access_size
= 1,
148 #define DEF_LOONGSON3_FREQ (800 * 1000 * 1000)
150 static uint64_t get_cpu_freq_hz(void)
155 struct kvm_one_reg freq_reg
= {
156 .id
= KVM_REG_MIPS_COUNT_HZ
,
157 .addr
= (uintptr_t)(&freq
)
161 ret
= kvm_vcpu_ioctl(first_cpu
, KVM_GET_ONE_REG
, &freq_reg
);
167 return DEF_LOONGSON3_FREQ
;
170 static void init_boot_param(void)
173 struct boot_params
*bp
;
175 p
= g_malloc0(loader_rommap
[LOADER_PARAM
].size
);
178 bp
->efi
.smbios
.vers
= cpu_to_le16(1);
179 init_reset_system(&(bp
->reset_system
));
180 p
+= ROUND_UP(sizeof(struct boot_params
), 64);
181 init_loongson_params(&(bp
->efi
.smbios
.lp
), p
,
182 loaderparams
.cpu_freq
, loaderparams
.ram_size
);
184 rom_add_blob_fixed("params_rom", bp
,
185 loader_rommap
[LOADER_PARAM
].size
,
186 loader_rommap
[LOADER_PARAM
].base
);
190 loaderparams
.a2
= cpu_mips_phys_to_kseg0(NULL
,
191 loader_rommap
[LOADER_PARAM
].base
);
194 static void init_boot_rom(void)
196 const unsigned int boot_code
[] = {
197 0x40086000, /* mfc0 t0, CP0_STATUS */
198 0x240900E4, /* li t1, 0xe4 #set kx, sx, ux, erl */
199 0x01094025, /* or t0, t0, t1 */
200 0x3C090040, /* lui t1, 0x40 #set bev */
201 0x01094025, /* or t0, t0, t1 */
202 0x40886000, /* mtc0 t0, CP0_STATUS */
204 0x40806800, /* mtc0 zero, CP0_CAUSE */
206 0x400A7801, /* mfc0 t2, $15, 1 */
207 0x314A00FF, /* andi t2, 0x0ff */
208 0x3C089000, /* dli t0, 0x900000003ff01000 */
213 0x314B0003, /* andi t3, t2, 0x3 #local cpuid */
214 0x000B5A00, /* sll t3, 8 */
215 0x010B4025, /* or t0, t0, t3 */
216 0x314C000C, /* andi t4, t2, 0xc #node id */
217 0x000C62BC, /* dsll t4, 42 */
218 0x010C4025, /* or t0, t0, t4 */
220 0xDD020020, /* ld v0, FN_OFF(t0) #FN_OFF 0x020 */
221 0x1040FFFE, /* beqz v0, WaitForInit */
222 0x00000000, /* nop */
223 0xDD1D0028, /* ld sp, SP_OFF(t0) #FN_OFF 0x028 */
224 0xDD1C0030, /* ld gp, GP_OFF(t0) #FN_OFF 0x030 */
225 0xDD050038, /* ld a1, A1_OFF(t0) #FN_OFF 0x038 */
226 0x00400008, /* jr v0 #byebye */
227 0x00000000, /* nop */
228 0x1000FFFF, /* 1: b 1b */
229 0x00000000, /* nop */
232 0x3C0C9000, /* dli t0, 0x9000000010080010 */
238 0x240D0000, /* li t1, 0x00 */
239 0xA18D0000, /* sb t1, (t0) */
240 0x1000FFFF, /* 1: b 1b */
241 0x00000000, /* nop */
244 0x3C0C9000, /* dli t0, 0x9000000010080010 */
250 0x240D00FF, /* li t1, 0xff */
251 0xA18D0000, /* sb t1, (t0) */
252 0x1000FFFF, /* 1: b 1b */
256 rom_add_blob_fixed("boot_rom", boot_code
, sizeof(boot_code
),
257 loader_rommap
[LOADER_BOOTROM
].base
);
260 static void fw_cfg_boot_set(void *opaque
, const char *boot_device
,
263 fw_cfg_modify_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
266 static void fw_conf_init(unsigned long ram_size
)
269 hwaddr cfg_addr
= virt_memmap
[VIRT_FW_CFG
].base
;
271 fw_cfg
= fw_cfg_init_mem_wide(cfg_addr
, cfg_addr
+ 8, 8, 0, NULL
);
272 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, (uint16_t)current_machine
->smp
.cpus
);
273 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)current_machine
->smp
.max_cpus
);
274 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
275 fw_cfg_add_i32(fw_cfg
, FW_CFG_MACHINE_VERSION
, 1);
276 fw_cfg_add_i64(fw_cfg
, FW_CFG_CPU_FREQ
, get_cpu_freq_hz());
277 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
280 static int set_prom_cmdline(ram_addr_t initrd_offset
, long initrd_size
)
284 hwaddr cmdline_vaddr
;
285 unsigned int *parg_env
;
287 /* Allocate cmdline_buf for command line. */
288 cmdline_buf
= g_malloc0(loader_memmap
[LOADER_CMDLINE
].size
);
289 cmdline_vaddr
= cpu_mips_phys_to_kseg0(NULL
,
290 loader_memmap
[LOADER_CMDLINE
].base
);
293 * Layout of cmdline_buf looks like this:
294 * argv[0], argv[1], 0, env[0], env[1], ... env[i], 0,
295 * argv[0]'s data, argv[1]'s data, env[0]'data, ..., env[i]'s data, 0
297 parg_env
= (void *)cmdline_buf
;
300 *parg_env
++ = cmdline_vaddr
+ ret
;
301 ret
+= (1 + snprintf(cmdline_buf
+ ret
, 256 - ret
, "g"));
304 *parg_env
++ = cmdline_vaddr
+ ret
;
306 ret
+= (1 + snprintf(cmdline_buf
+ ret
, 256 - ret
,
307 "rd_start=0x" TARGET_FMT_lx
" rd_size=%li %s",
308 cpu_mips_phys_to_kseg0(NULL
, initrd_offset
),
309 initrd_size
, loaderparams
.kernel_cmdline
));
311 ret
+= (1 + snprintf(cmdline_buf
+ ret
, 256 - ret
, "%s",
312 loaderparams
.kernel_cmdline
));
315 *parg_env
++ = cmdline_vaddr
+ 4 * ret
;
317 rom_add_blob_fixed("cmdline", cmdline_buf
,
318 loader_memmap
[LOADER_CMDLINE
].size
,
319 loader_memmap
[LOADER_CMDLINE
].base
);
324 loaderparams
.a1
= cmdline_vaddr
;
329 static uint64_t load_kernel(CPUMIPSState
*env
)
332 ram_addr_t initrd_offset
;
333 uint64_t kernel_entry
, kernel_low
, kernel_high
, initrd_size
;
335 kernel_size
= load_elf(loaderparams
.kernel_filename
, NULL
,
336 cpu_mips_kseg0_to_phys
, NULL
,
337 (uint64_t *)&kernel_entry
,
338 (uint64_t *)&kernel_low
, (uint64_t *)&kernel_high
,
339 NULL
, 0, EM_MIPS
, 1, 0);
340 if (kernel_size
< 0) {
341 error_report("could not load kernel '%s': %s",
342 loaderparams
.kernel_filename
,
343 load_elf_strerror(kernel_size
));
350 if (loaderparams
.initrd_filename
) {
351 initrd_size
= get_image_size(loaderparams
.initrd_filename
);
352 if (initrd_size
> 0) {
353 initrd_offset
= MAX(loader_memmap
[LOADER_INITRD
].base
,
354 ROUND_UP(kernel_high
, INITRD_PAGE_SIZE
));
356 if (initrd_offset
+ initrd_size
> loaderparams
.ram_size
) {
357 error_report("memory too small for initial ram disk '%s'",
358 loaderparams
.initrd_filename
);
362 initrd_size
= load_image_targphys(loaderparams
.initrd_filename
,
364 loaderparams
.ram_size
- initrd_offset
);
367 if (initrd_size
== (target_ulong
) -1) {
368 error_report("could not load initial ram disk '%s'",
369 loaderparams
.initrd_filename
);
374 /* Setup prom cmdline. */
375 set_prom_cmdline(initrd_offset
, initrd_size
);
380 static void main_cpu_reset(void *opaque
)
382 MIPSCPU
*cpu
= opaque
;
383 CPUMIPSState
*env
= &cpu
->env
;
387 /* Loongson-3 reset stuff */
388 if (loaderparams
.kernel_filename
) {
389 if (cpu
== MIPS_CPU(first_cpu
)) {
390 env
->active_tc
.gpr
[4] = loaderparams
.a0
;
391 env
->active_tc
.gpr
[5] = loaderparams
.a1
;
392 env
->active_tc
.gpr
[6] = loaderparams
.a2
;
393 env
->active_tc
.PC
= loaderparams
.kernel_entry
;
395 env
->CP0_Status
&= ~((1 << CP0St_BEV
) | (1 << CP0St_ERL
));
399 static inline void loongson3_virt_devices_init(MachineState
*machine
,
406 MemoryRegion
*mmio_reg
, *ecam_reg
;
407 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
408 LoongsonMachineState
*s
= LOONGSON_MACHINE(machine
);
410 dev
= qdev_new(TYPE_GPEX_HOST
);
411 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
412 pci_bus
= PCI_HOST_BRIDGE(dev
)->bus
;
414 s
->ecam_alias
= g_new0(MemoryRegion
, 1);
415 ecam_reg
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
416 memory_region_init_alias(s
->ecam_alias
, OBJECT(dev
), "pcie-ecam",
417 ecam_reg
, 0, virt_memmap
[VIRT_PCIE_ECAM
].size
);
418 memory_region_add_subregion(get_system_memory(),
419 virt_memmap
[VIRT_PCIE_ECAM
].base
,
422 s
->mmio_alias
= g_new0(MemoryRegion
, 1);
423 mmio_reg
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 1);
424 memory_region_init_alias(s
->mmio_alias
, OBJECT(dev
), "pcie-mmio",
425 mmio_reg
, virt_memmap
[VIRT_PCIE_MMIO
].base
,
426 virt_memmap
[VIRT_PCIE_MMIO
].size
);
427 memory_region_add_subregion(get_system_memory(),
428 virt_memmap
[VIRT_PCIE_MMIO
].base
,
431 s
->pio_alias
= g_new0(MemoryRegion
, 1);
432 memory_region_init_alias(s
->pio_alias
, OBJECT(dev
), "pcie-pio",
434 virt_memmap
[VIRT_PCIE_PIO
].size
);
435 memory_region_add_subregion(get_system_memory(),
436 virt_memmap
[VIRT_PCIE_PIO
].base
, s
->pio_alias
);
437 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 2, virt_memmap
[VIRT_PCIE_PIO
].base
);
439 for (i
= 0; i
< GPEX_NUM_IRQS
; i
++) {
440 irq
= qdev_get_gpio_in(pic
, PCIE_IRQ_BASE
+ i
);
441 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), i
, irq
);
442 gpex_set_irq_num(GPEX_HOST(dev
), i
, PCIE_IRQ_BASE
+ i
);
444 msi_nonbroken
= true;
446 pci_vga_init(pci_bus
);
448 if (defaults_enabled() && object_class_by_name("pci-ohci")) {
449 pci_create_simple(pci_bus
, -1, "pci-ohci");
450 usb_create_simple(usb_bus_find(-1), "usb-kbd");
451 usb_create_simple(usb_bus_find(-1), "usb-tablet");
454 for (i
= 0; i
< nb_nics
; i
++) {
455 pci_nic_init_nofail(&nd_table
[i
], pci_bus
, mc
->default_nic
, NULL
);
459 static void mips_loongson3_virt_init(MachineState
*machine
)
466 DeviceState
*liointc
;
468 const char *kernel_cmdline
= machine
->kernel_cmdline
;
469 const char *kernel_filename
= machine
->kernel_filename
;
470 const char *initrd_filename
= machine
->initrd_filename
;
471 ram_addr_t ram_size
= machine
->ram_size
;
472 MemoryRegion
*address_space_mem
= get_system_memory();
473 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
474 MemoryRegion
*bios
= g_new(MemoryRegion
, 1);
475 MemoryRegion
*iomem
= g_new(MemoryRegion
, 1);
477 /* TODO: TCG will support all CPU types */
478 if (!kvm_enabled()) {
479 if (!machine
->cpu_type
) {
480 machine
->cpu_type
= MIPS_CPU_TYPE_NAME("Loongson-3A1000");
482 if (!cpu_type_supports_isa(machine
->cpu_type
, INSN_LOONGSON3A
)) {
483 error_report("Loongson-3/TCG needs a Loongson-3 series cpu");
487 if (!machine
->cpu_type
) {
488 machine
->cpu_type
= MIPS_CPU_TYPE_NAME("Loongson-3A4000");
490 if (!strstr(machine
->cpu_type
, "Loongson-3A4000")) {
491 error_report("Loongson-3/KVM needs cpu type Loongson-3A4000");
496 if (ram_size
< 512 * MiB
) {
497 error_report("Loongson-3 machine needs at least 512MB memory");
502 * The whole MMIO range among configure registers doesn't generate
503 * exception when accessing invalid memory. Create some unimplememted
504 * devices to emulate this feature.
506 create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB
);
507 create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB
);
509 liointc
= qdev_new("loongson.liointc");
510 sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc
), &error_fatal
);
512 sysbus_mmio_map(SYS_BUS_DEVICE(liointc
), 0, virt_memmap
[VIRT_LIOINTC
].base
);
514 serial_mm_init(address_space_mem
, virt_memmap
[VIRT_UART
].base
, 0,
515 qdev_get_gpio_in(liointc
, UART_IRQ
), 115200, serial_hd(0),
516 DEVICE_NATIVE_ENDIAN
);
518 sysbus_create_simple("goldfish_rtc", virt_memmap
[VIRT_RTC
].base
,
519 qdev_get_gpio_in(liointc
, RTC_IRQ
));
521 cpuclk
= clock_new(OBJECT(machine
), "cpu-refclk");
522 clock_set_hz(cpuclk
, DEF_LOONGSON3_FREQ
);
524 for (i
= 0; i
< machine
->smp
.cpus
; i
++) {
528 cpu
= mips_cpu_create_with_clock(machine
->cpu_type
, cpuclk
);
530 /* Init internal devices */
531 cpu_mips_irq_init_cpu(cpu
);
532 cpu_mips_clock_init(cpu
);
533 qemu_register_reset(main_cpu_reset
, cpu
);
536 continue; /* Only node-0 can be connected to LIOINTC */
539 for (ip
= 0; ip
< 4 ; ip
++) {
540 int pin
= i
* 4 + ip
;
541 sysbus_connect_irq(SYS_BUS_DEVICE(liointc
),
542 pin
, cpu
->env
.irq
[ip
+ 2]);
545 env
= &MIPS_CPU(first_cpu
)->env
;
547 /* Allocate RAM/BIOS, 0x00000000~0x10000000 is alias of 0x80000000~0x90000000 */
548 memory_region_init_rom(bios
, NULL
, "loongson3.bios",
549 virt_memmap
[VIRT_BIOS_ROM
].size
, &error_fatal
);
550 memory_region_init_alias(ram
, NULL
, "loongson3.lowmem",
551 machine
->ram
, 0, virt_memmap
[VIRT_LOWMEM
].size
);
552 memory_region_init_io(iomem
, NULL
, &loongson3_pm_ops
,
553 NULL
, "loongson3_pm", virt_memmap
[VIRT_PM
].size
);
555 memory_region_add_subregion(address_space_mem
,
556 virt_memmap
[VIRT_LOWMEM
].base
, ram
);
557 memory_region_add_subregion(address_space_mem
,
558 virt_memmap
[VIRT_BIOS_ROM
].base
, bios
);
559 memory_region_add_subregion(address_space_mem
,
560 virt_memmap
[VIRT_HIGHMEM
].base
, machine
->ram
);
561 memory_region_add_subregion(address_space_mem
,
562 virt_memmap
[VIRT_PM
].base
, iomem
);
565 * We do not support flash operation, just loading bios.bin as raw BIOS.
566 * Please use -L to set the BIOS path and -bios to set bios name.
569 if (kernel_filename
) {
570 loaderparams
.cpu_freq
= get_cpu_freq_hz();
571 loaderparams
.ram_size
= ram_size
;
572 loaderparams
.kernel_filename
= kernel_filename
;
573 loaderparams
.kernel_cmdline
= kernel_cmdline
;
574 loaderparams
.initrd_filename
= initrd_filename
;
575 loaderparams
.kernel_entry
= load_kernel(env
);
580 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
,
581 machine
->firmware
?: LOONGSON3_BIOSNAME
);
583 bios_size
= load_image_targphys(filename
,
584 virt_memmap
[VIRT_BIOS_ROM
].base
,
585 virt_memmap
[VIRT_BIOS_ROM
].size
);
591 if ((bios_size
< 0 || bios_size
> virt_memmap
[VIRT_BIOS_ROM
].size
) &&
592 !kernel_filename
&& !qtest_enabled()) {
593 error_report("Could not load MIPS bios '%s'", machine
->firmware
);
597 fw_conf_init(ram_size
);
600 loongson3_virt_devices_init(machine
, liointc
);
603 static void loongson3v_machine_class_init(ObjectClass
*oc
, void *data
)
605 MachineClass
*mc
= MACHINE_CLASS(oc
);
607 mc
->desc
= "Loongson-3 Virtualization Platform";
608 mc
->init
= mips_loongson3_virt_init
;
609 mc
->block_default_type
= IF_IDE
;
610 mc
->max_cpus
= LOONGSON_MAX_VCPUS
;
611 mc
->default_ram_id
= "loongson3.highram";
612 mc
->default_ram_size
= 1600 * MiB
;
613 mc
->minimum_page_bits
= 14;
614 mc
->default_nic
= "virtio-net-pci";
617 static const TypeInfo loongson3_machine_types
[] = {
619 .name
= TYPE_LOONGSON_MACHINE
,
620 .parent
= TYPE_MACHINE
,
621 .instance_size
= sizeof(LoongsonMachineState
),
622 .class_init
= loongson3v_machine_class_init
,
626 DEFINE_TYPES(loongson3_machine_types
)