2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/numa.h"
33 #include "hw/fw-path-provider.h"
36 #include "sysemu/device_tree.h"
37 #include "sysemu/block-backend.h"
38 #include "sysemu/cpus.h"
39 #include "sysemu/kvm.h"
40 #include "sysemu/device_tree.h"
42 #include "migration/migration.h"
43 #include "mmu-hash64.h"
46 #include "hw/boards.h"
47 #include "hw/ppc/ppc.h"
48 #include "hw/loader.h"
50 #include "hw/ppc/fdt.h"
51 #include "hw/ppc/spapr.h"
52 #include "hw/ppc/spapr_vio.h"
53 #include "hw/pci-host/spapr.h"
54 #include "hw/ppc/xics.h"
55 #include "hw/pci/msi.h"
57 #include "hw/pci/pci.h"
58 #include "hw/scsi/scsi.h"
59 #include "hw/virtio/virtio-scsi.h"
61 #include "exec/address-spaces.h"
63 #include "qemu/config-file.h"
64 #include "qemu/error-report.h"
68 #include "hw/compat.h"
69 #include "qemu/cutils.h"
70 #include "hw/ppc/spapr_cpu_core.h"
71 #include "qmp-commands.h"
75 /* SLOF memory layout:
77 * SLOF raw image loaded at 0, copies its romfs right below the flat
78 * device-tree, then position SLOF itself 31M below that
80 * So we set FW_OVERHEAD to 40MB which should account for all of that
83 * We load our kernel at 4M, leaving space for SLOF initial image
85 #define FDT_MAX_SIZE 0x100000
86 #define RTAS_MAX_SIZE 0x10000
87 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
88 #define FW_MAX_SIZE 0x400000
89 #define FW_FILE_NAME "slof.bin"
90 #define FW_OVERHEAD 0x2800000
91 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
93 #define MIN_RMA_SLOF 128UL
95 #define PHANDLE_XICP 0x00001111
97 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
99 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
100 int nr_irqs
, Error
**errp
)
105 dev
= qdev_create(NULL
, type
);
106 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
107 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
108 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
110 error_propagate(errp
, err
);
111 object_unparent(OBJECT(dev
));
114 return XICS_COMMON(dev
);
117 static XICSState
*xics_system_init(MachineState
*machine
,
118 int nr_servers
, int nr_irqs
, Error
**errp
)
120 XICSState
*xics
= NULL
;
125 if (machine_kernel_irqchip_allowed(machine
)) {
126 xics
= try_create_xics(TYPE_XICS_SPAPR_KVM
, nr_servers
, nr_irqs
,
129 if (machine_kernel_irqchip_required(machine
) && !xics
) {
130 error_reportf_err(err
,
131 "kernel_irqchip requested but unavailable: ");
138 xics
= try_create_xics(TYPE_XICS_SPAPR
, nr_servers
, nr_irqs
, errp
);
144 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
148 uint32_t servers_prop
[smt_threads
];
149 uint32_t gservers_prop
[smt_threads
* 2];
150 int index
= ppc_get_vcpu_dt_id(cpu
);
152 if (cpu
->cpu_version
) {
153 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
159 /* Build interrupt servers and gservers properties */
160 for (i
= 0; i
< smt_threads
; i
++) {
161 servers_prop
[i
] = cpu_to_be32(index
+ i
);
162 /* Hack, direct the group queues back to cpu 0 */
163 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
164 gservers_prop
[i
*2 + 1] = 0;
166 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
167 servers_prop
, sizeof(servers_prop
));
171 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
172 gservers_prop
, sizeof(gservers_prop
));
177 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, CPUState
*cs
)
180 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
181 int index
= ppc_get_vcpu_dt_id(cpu
);
182 uint32_t associativity
[] = {cpu_to_be32(0x5),
186 cpu_to_be32(cs
->numa_node
),
189 /* Advertise NUMA via ibm,associativity */
190 if (nb_numa_nodes
> 1) {
191 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
192 sizeof(associativity
));
198 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
200 int ret
= 0, offset
, cpus_offset
;
203 int smt
= kvmppc_smt_threads();
204 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
207 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
208 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
209 int index
= ppc_get_vcpu_dt_id(cpu
);
211 if ((index
% smt
) != 0) {
215 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
217 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
218 if (cpus_offset
< 0) {
219 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
221 if (cpus_offset
< 0) {
225 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
227 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
233 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
234 pft_size_prop
, sizeof(pft_size_prop
));
239 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
);
244 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
245 ppc_get_compat_smt_threads(cpu
));
254 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
257 size_t maxcells
= maxsize
/ sizeof(uint32_t);
261 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
262 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
264 if (!sps
->page_shift
) {
267 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
268 if (sps
->enc
[count
].page_shift
== 0) {
272 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
275 *(p
++) = cpu_to_be32(sps
->page_shift
);
276 *(p
++) = cpu_to_be32(sps
->slb_enc
);
277 *(p
++) = cpu_to_be32(count
);
278 for (j
= 0; j
< count
; j
++) {
279 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
280 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
284 return (p
- prop
) * sizeof(uint32_t);
287 static hwaddr
spapr_node0_size(void)
289 MachineState
*machine
= MACHINE(qdev_get_machine());
293 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
294 if (numa_info
[i
].node_mem
) {
295 return MIN(pow2floor(numa_info
[i
].node_mem
),
300 return machine
->ram_size
;
303 static void add_str(GString
*s
, const gchar
*s1
)
305 g_string_append_len(s
, s1
, strlen(s1
) + 1);
308 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
312 const char *kernel_cmdline
,
316 uint32_t start_prop
= cpu_to_be32(initrd_base
);
317 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
318 GString
*hypertas
= g_string_sized_new(256);
319 GString
*qemu_hypertas
= g_string_sized_new(256);
320 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
321 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(max_cpus
)};
322 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
325 add_str(hypertas
, "hcall-pft");
326 add_str(hypertas
, "hcall-term");
327 add_str(hypertas
, "hcall-dabr");
328 add_str(hypertas
, "hcall-interrupt");
329 add_str(hypertas
, "hcall-tce");
330 add_str(hypertas
, "hcall-vio");
331 add_str(hypertas
, "hcall-splpar");
332 add_str(hypertas
, "hcall-bulk");
333 add_str(hypertas
, "hcall-set-mode");
334 add_str(hypertas
, "hcall-sprg0");
335 add_str(hypertas
, "hcall-copy");
336 add_str(hypertas
, "hcall-debug");
337 add_str(qemu_hypertas
, "hcall-memop1");
339 fdt
= g_malloc0(FDT_MAX_SIZE
);
340 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
343 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
346 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
348 _FDT((fdt_finish_reservemap(fdt
)));
351 _FDT((fdt_begin_node(fdt
, "")));
352 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
353 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
354 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
357 * Add info to guest to indentify which host is it being run on
358 * and what is the uuid of the guest
360 if (kvmppc_get_host_model(&buf
)) {
361 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
364 if (kvmppc_get_host_serial(&buf
)) {
365 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
369 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
370 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
371 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
372 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
373 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
374 qemu_uuid
[14], qemu_uuid
[15]);
376 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
378 _FDT((fdt_property_string(fdt
, "system-id", buf
)));
382 if (qemu_get_vm_name()) {
383 _FDT((fdt_property_string(fdt
, "ibm,partition-name",
384 qemu_get_vm_name())));
387 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
388 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
391 _FDT((fdt_begin_node(fdt
, "chosen")));
393 /* Set Form1_affinity */
394 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
396 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
397 _FDT((fdt_property(fdt
, "linux,initrd-start",
398 &start_prop
, sizeof(start_prop
))));
399 _FDT((fdt_property(fdt
, "linux,initrd-end",
400 &end_prop
, sizeof(end_prop
))));
402 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
403 cpu_to_be64(kernel_size
) };
405 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
407 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
411 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
413 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
414 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
415 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
417 _FDT((fdt_end_node(fdt
)));
420 _FDT((fdt_begin_node(fdt
, "rtas")));
422 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
423 add_str(hypertas
, "hcall-multi-tce");
425 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
427 g_string_free(hypertas
, TRUE
);
428 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
429 qemu_hypertas
->len
)));
430 g_string_free(qemu_hypertas
, TRUE
);
432 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
433 refpoints
, sizeof(refpoints
))));
435 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
436 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
437 RTAS_EVENT_SCAN_RATE
)));
440 _FDT((fdt_property(fdt
, "ibm,change-msix-capable", NULL
, 0)));
444 * According to PAPR, rtas ibm,os-term does not guarantee a return
445 * back to the guest cpu.
447 * While an additional ibm,extended-os-term property indicates that
448 * rtas call return will always occur. Set this property.
450 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
452 _FDT((fdt_end_node(fdt
)));
454 /* interrupt controller */
455 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
457 _FDT((fdt_property_string(fdt
, "device_type",
458 "PowerPC-External-Interrupt-Presentation")));
459 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
460 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
461 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
462 interrupt_server_ranges_prop
,
463 sizeof(interrupt_server_ranges_prop
))));
464 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
465 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
466 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
468 _FDT((fdt_end_node(fdt
)));
471 _FDT((fdt_begin_node(fdt
, "vdevice")));
473 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
474 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
475 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
476 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
477 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
478 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
480 _FDT((fdt_end_node(fdt
)));
483 spapr_events_fdt_skel(fdt
, epow_irq
);
485 /* /hypervisor node */
487 uint8_t hypercall
[16];
489 /* indicate KVM hypercall interface */
490 _FDT((fdt_begin_node(fdt
, "hypervisor")));
491 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
492 if (kvmppc_has_cap_fixup_hcalls()) {
494 * Older KVM versions with older guest kernels were broken with the
495 * magic page, don't allow the guest to map it.
497 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
498 sizeof(hypercall
))) {
499 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
500 sizeof(hypercall
))));
503 _FDT((fdt_end_node(fdt
)));
506 _FDT((fdt_end_node(fdt
))); /* close root node */
507 _FDT((fdt_finish(fdt
)));
512 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
515 uint32_t associativity
[] = {
516 cpu_to_be32(0x4), /* length */
517 cpu_to_be32(0x0), cpu_to_be32(0x0),
518 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
521 uint64_t mem_reg_property
[2];
524 mem_reg_property
[0] = cpu_to_be64(start
);
525 mem_reg_property
[1] = cpu_to_be64(size
);
527 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
528 off
= fdt_add_subnode(fdt
, 0, mem_name
);
530 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
531 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
532 sizeof(mem_reg_property
))));
533 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
534 sizeof(associativity
))));
538 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
540 MachineState
*machine
= MACHINE(spapr
);
541 hwaddr mem_start
, node_size
;
542 int i
, nb_nodes
= nb_numa_nodes
;
543 NodeInfo
*nodes
= numa_info
;
546 /* No NUMA nodes, assume there is just one node with whole RAM */
547 if (!nb_numa_nodes
) {
549 ramnode
.node_mem
= machine
->ram_size
;
553 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
554 if (!nodes
[i
].node_mem
) {
557 if (mem_start
>= machine
->ram_size
) {
560 node_size
= nodes
[i
].node_mem
;
561 if (node_size
> machine
->ram_size
- mem_start
) {
562 node_size
= machine
->ram_size
- mem_start
;
566 /* ppc_spapr_init() checks for rma_size <= node0_size already */
567 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
568 mem_start
+= spapr
->rma_size
;
569 node_size
-= spapr
->rma_size
;
571 for ( ; node_size
; ) {
572 hwaddr sizetmp
= pow2floor(node_size
);
574 /* mem_start != 0 here */
575 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
576 sizetmp
= 1ULL << ctzl(mem_start
);
579 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
580 node_size
-= sizetmp
;
581 mem_start
+= sizetmp
;
588 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
589 sPAPRMachineState
*spapr
)
591 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
592 CPUPPCState
*env
= &cpu
->env
;
593 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
594 int index
= ppc_get_vcpu_dt_id(cpu
);
595 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
596 0xffffffff, 0xffffffff};
597 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
598 : SPAPR_TIMEBASE_FREQ
;
599 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
600 uint32_t page_sizes_prop
[64];
601 size_t page_sizes_prop_size
;
602 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
603 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
604 sPAPRDRConnector
*drc
;
605 sPAPRDRConnectorClass
*drck
;
608 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU
, index
);
610 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
611 drc_index
= drck
->get_index(drc
);
612 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
615 /* Note: we keep CI large pages off for now because a 64K capable guest
616 * provisioned with large pages might otherwise try to map a qemu
617 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
618 * even if that qemu runs on a 4k host.
620 * We can later add this bit back when we are confident this is not
621 * an issue (!HV KVM or 64K host)
623 uint8_t pa_features_206
[] = { 6, 0,
624 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
625 uint8_t pa_features_207
[] = { 24, 0,
626 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
627 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
628 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
629 0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
630 uint8_t *pa_features
;
633 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
634 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
636 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
637 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
638 env
->dcache_line_size
)));
639 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
640 env
->dcache_line_size
)));
641 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
642 env
->icache_line_size
)));
643 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
644 env
->icache_line_size
)));
646 if (pcc
->l1_dcache_size
) {
647 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
648 pcc
->l1_dcache_size
)));
650 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
652 if (pcc
->l1_icache_size
) {
653 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
654 pcc
->l1_icache_size
)));
656 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
659 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
660 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
661 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
662 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
663 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
664 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
666 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
667 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
670 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
671 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
672 segs
, sizeof(segs
))));
675 /* Advertise VMX/VSX (vector extensions) if available
676 * 0 / no property == no vector extensions
677 * 1 == VMX / Altivec available
678 * 2 == VSX available */
679 if (env
->insns_flags
& PPC_ALTIVEC
) {
680 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
682 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
685 /* Advertise DFP (Decimal Floating Point) if available
686 * 0 / no property == no DFP
687 * 1 == DFP available */
688 if (env
->insns_flags2
& PPC2_DFP
) {
689 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
692 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
693 sizeof(page_sizes_prop
));
694 if (page_sizes_prop_size
) {
695 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
696 page_sizes_prop
, page_sizes_prop_size
)));
699 /* Do the ibm,pa-features property, adjust it for ci-large-pages */
700 if (env
->mmu_model
== POWERPC_MMU_2_06
) {
701 pa_features
= pa_features_206
;
702 pa_size
= sizeof(pa_features_206
);
703 } else /* env->mmu_model == POWERPC_MMU_2_07 */ {
704 pa_features
= pa_features_207
;
705 pa_size
= sizeof(pa_features_207
);
707 if (env
->ci_large_pages
) {
708 pa_features
[3] |= 0x20;
710 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
712 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
713 cs
->cpu_index
/ vcpus_per_socket
)));
715 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
716 pft_size_prop
, sizeof(pft_size_prop
))));
718 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
));
720 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
721 ppc_get_compat_smt_threads(cpu
)));
724 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
729 int smt
= kvmppc_smt_threads();
731 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
733 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
734 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
737 * We walk the CPUs in reverse order to ensure that CPU DT nodes
738 * created by fdt_add_subnode() end up in the right order in FDT
739 * for the guest kernel the enumerate the CPUs correctly.
741 CPU_FOREACH_REVERSE(cs
) {
742 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
743 int index
= ppc_get_vcpu_dt_id(cpu
);
744 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
747 if ((index
% smt
) != 0) {
751 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
752 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
755 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
761 * Adds ibm,dynamic-reconfiguration-memory node.
762 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
763 * of this device tree node.
765 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
767 MachineState
*machine
= MACHINE(spapr
);
769 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
770 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
771 uint32_t hotplug_lmb_start
= spapr
->hotplug_memory
.base
/ lmb_size
;
772 uint32_t nr_lmbs
= (spapr
->hotplug_memory
.base
+
773 memory_region_size(&spapr
->hotplug_memory
.mr
)) /
775 uint32_t *int_buf
, *cur_index
, buf_len
;
776 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
779 * Don't create the node if there is no hotpluggable memory
781 if (machine
->ram_size
== machine
->maxram_size
) {
786 * Allocate enough buffer size to fit in ibm,dynamic-memory
787 * or ibm,associativity-lookup-arrays
789 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
791 cur_index
= int_buf
= g_malloc0(buf_len
);
793 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
795 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
796 sizeof(prop_lmb_size
));
801 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
806 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
811 /* ibm,dynamic-memory */
812 int_buf
[0] = cpu_to_be32(nr_lmbs
);
814 for (i
= 0; i
< nr_lmbs
; i
++) {
815 uint64_t addr
= i
* lmb_size
;
816 uint32_t *dynamic_memory
= cur_index
;
818 if (i
>= hotplug_lmb_start
) {
819 sPAPRDRConnector
*drc
;
820 sPAPRDRConnectorClass
*drck
;
822 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
, i
);
824 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
826 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
827 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
828 dynamic_memory
[2] = cpu_to_be32(drck
->get_index(drc
));
829 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
830 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
831 if (memory_region_present(get_system_memory(), addr
)) {
832 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
834 dynamic_memory
[5] = cpu_to_be32(0);
838 * LMB information for RMA, boot time RAM and gap b/n RAM and
839 * hotplug memory region -- all these are marked as reserved
840 * and as having no valid DRC.
842 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
843 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
844 dynamic_memory
[2] = cpu_to_be32(0);
845 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
846 dynamic_memory
[4] = cpu_to_be32(-1);
847 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
848 SPAPR_LMB_FLAGS_DRC_INVALID
);
851 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
853 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
858 /* ibm,associativity-lookup-arrays */
860 int_buf
[0] = cpu_to_be32(nr_nodes
);
861 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
863 for (i
= 0; i
< nr_nodes
; i
++) {
864 uint32_t associativity
[] = {
870 memcpy(cur_index
, associativity
, sizeof(associativity
));
873 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
874 (cur_index
- int_buf
) * sizeof(uint32_t));
880 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
881 target_ulong addr
, target_ulong size
,
882 bool cpu_update
, bool memory_update
)
884 void *fdt
, *fdt_skel
;
885 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
886 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
890 /* Create sceleton */
891 fdt_skel
= g_malloc0(size
);
892 _FDT((fdt_create(fdt_skel
, size
)));
893 _FDT((fdt_begin_node(fdt_skel
, "")));
894 _FDT((fdt_end_node(fdt_skel
)));
895 _FDT((fdt_finish(fdt_skel
)));
896 fdt
= g_malloc0(size
);
897 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
900 /* Fixup cpu nodes */
902 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
905 /* Generate ibm,dynamic-reconfiguration-memory node if required */
906 if (memory_update
&& smc
->dr_lmb_enabled
) {
907 _FDT((spapr_populate_drconf_memory(spapr
, fdt
)));
910 /* Pack resulting tree */
911 _FDT((fdt_pack(fdt
)));
913 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
914 trace_spapr_cas_failed(size
);
918 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
919 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
920 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
926 static void spapr_finalize_fdt(sPAPRMachineState
*spapr
,
931 MachineState
*machine
= MACHINE(qdev_get_machine());
932 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
933 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
934 const char *boot_device
= machine
->boot_order
;
941 fdt
= g_malloc(FDT_MAX_SIZE
);
943 /* open out the base tree into a temp buffer for the final tweaks */
944 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
946 ret
= spapr_populate_memory(spapr
, fdt
);
948 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
952 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
954 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
958 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
959 ret
= spapr_rng_populate_dt(fdt
);
961 fprintf(stderr
, "could not set up rng device in the fdt\n");
966 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
967 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
969 error_report("couldn't setup PCI devices in fdt");
975 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
977 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
981 spapr_populate_cpus_dt_node(fdt
, spapr
);
983 bootlist
= get_boot_devices_list(&cb
, true);
984 if (cb
&& bootlist
) {
985 int offset
= fdt_path_offset(fdt
, "/chosen");
989 for (i
= 0; i
< cb
; i
++) {
990 if (bootlist
[i
] == '\n') {
995 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
998 if (boot_device
&& strlen(boot_device
)) {
999 int offset
= fdt_path_offset(fdt
, "/chosen");
1004 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
1007 if (!spapr
->has_graphics
) {
1008 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
1011 if (smc
->dr_lmb_enabled
) {
1012 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
1015 if (mc
->query_hotpluggable_cpus
) {
1016 int offset
= fdt_path_offset(fdt
, "/cpus");
1017 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
1018 SPAPR_DR_CONNECTOR_TYPE_CPU
);
1020 error_report("Couldn't set up CPU DR device tree properties");
1025 _FDT((fdt_pack(fdt
)));
1027 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1028 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1029 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1033 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1034 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1040 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1042 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1045 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
1047 CPUPPCState
*env
= &cpu
->env
;
1050 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1051 env
->gpr
[3] = H_PRIVILEGE
;
1053 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1057 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1058 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1059 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1060 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1061 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1064 * Get the fd to access the kernel htab, re-opening it if necessary
1066 static int get_htab_fd(sPAPRMachineState
*spapr
)
1068 if (spapr
->htab_fd
>= 0) {
1069 return spapr
->htab_fd
;
1072 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1073 if (spapr
->htab_fd
< 0) {
1074 error_report("Unable to open fd for reading hash table from KVM: %s",
1078 return spapr
->htab_fd
;
1081 static void close_htab_fd(sPAPRMachineState
*spapr
)
1083 if (spapr
->htab_fd
>= 0) {
1084 close(spapr
->htab_fd
);
1086 spapr
->htab_fd
= -1;
1089 static int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1093 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1094 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1095 * that's much more than is needed for Linux guests */
1096 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1097 shift
= MAX(shift
, 18); /* Minimum architected size */
1098 shift
= MIN(shift
, 46); /* Maximum architected size */
1102 static void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1107 /* Clean up any HPT info from a previous boot */
1108 g_free(spapr
->htab
);
1110 spapr
->htab_shift
= 0;
1111 close_htab_fd(spapr
);
1113 rc
= kvmppc_reset_htab(shift
);
1115 /* kernel-side HPT needed, but couldn't allocate one */
1116 error_setg_errno(errp
, errno
,
1117 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1119 /* This is almost certainly fatal, but if the caller really
1120 * wants to carry on with shift == 0, it's welcome to try */
1121 } else if (rc
> 0) {
1122 /* kernel-side HPT allocated */
1125 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1129 spapr
->htab_shift
= shift
;
1132 /* kernel-side HPT not needed, allocate in userspace instead */
1133 size_t size
= 1ULL << shift
;
1136 spapr
->htab
= qemu_memalign(size
, size
);
1138 error_setg_errno(errp
, errno
,
1139 "Could not allocate HPT of order %d", shift
);
1143 memset(spapr
->htab
, 0, size
);
1144 spapr
->htab_shift
= shift
;
1146 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1147 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1152 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1154 bool matched
= false;
1156 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1161 error_report("Device %s is not supported by this machine yet.",
1162 qdev_fw_name(DEVICE(sbdev
)));
1169 static void ppc_spapr_reset(void)
1171 MachineState
*machine
= MACHINE(qdev_get_machine());
1172 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1173 PowerPCCPU
*first_ppc_cpu
;
1174 uint32_t rtas_limit
;
1176 /* Check for unknown sysbus devices */
1177 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1179 /* Allocate and/or reset the hash page table */
1180 spapr_reallocate_hpt(spapr
,
1181 spapr_hpt_shift_for_ramsize(machine
->maxram_size
),
1184 /* Update the RMA size if necessary */
1185 if (spapr
->vrma_adjust
) {
1186 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
1190 qemu_devices_reset();
1193 * We place the device tree and RTAS just below either the top of the RMA,
1194 * or just below 2GB, whichever is lowere, so that it can be
1195 * processed with 32-bit real mode code if necessary
1197 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1198 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1199 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1202 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
1205 /* Copy RTAS over */
1206 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
1209 /* Set up the entry state */
1210 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1211 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
1212 first_ppc_cpu
->env
.gpr
[5] = 0;
1213 first_cpu
->halted
= 0;
1214 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1218 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1220 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1221 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1224 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1228 qdev_init_nofail(dev
);
1230 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1233 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1235 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1237 qdev_init_nofail(dev
);
1240 object_property_add_alias(qdev_get_machine(), "rtc-time",
1241 OBJECT(spapr
->rtc
), "date", NULL
);
1244 /* Returns whether we want to use VGA or not */
1245 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1247 switch (vga_interface_type
) {
1254 return pci_vga_init(pci_bus
) != NULL
;
1257 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1262 static int spapr_post_load(void *opaque
, int version_id
)
1264 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1267 /* In earlier versions, there was no separate qdev for the PAPR
1268 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1269 * So when migrating from those versions, poke the incoming offset
1270 * value into the RTC device */
1271 if (version_id
< 3) {
1272 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1278 static bool version_before_3(void *opaque
, int version_id
)
1280 return version_id
< 3;
1283 static const VMStateDescription vmstate_spapr
= {
1286 .minimum_version_id
= 1,
1287 .post_load
= spapr_post_load
,
1288 .fields
= (VMStateField
[]) {
1289 /* used to be @next_irq */
1290 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1293 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1295 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1296 VMSTATE_END_OF_LIST()
1300 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1302 sPAPRMachineState
*spapr
= opaque
;
1304 /* "Iteration" header */
1305 qemu_put_be32(f
, spapr
->htab_shift
);
1308 spapr
->htab_save_index
= 0;
1309 spapr
->htab_first_pass
= true;
1311 assert(kvm_enabled());
1318 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1321 bool has_timeout
= max_ns
!= -1;
1322 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1323 int index
= spapr
->htab_save_index
;
1324 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1326 assert(spapr
->htab_first_pass
);
1331 /* Consume invalid HPTEs */
1332 while ((index
< htabslots
)
1333 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1335 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1338 /* Consume valid HPTEs */
1340 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1341 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1343 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1346 if (index
> chunkstart
) {
1347 int n_valid
= index
- chunkstart
;
1349 qemu_put_be32(f
, chunkstart
);
1350 qemu_put_be16(f
, n_valid
);
1351 qemu_put_be16(f
, 0);
1352 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1353 HASH_PTE_SIZE_64
* n_valid
);
1356 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1360 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1362 if (index
>= htabslots
) {
1363 assert(index
== htabslots
);
1365 spapr
->htab_first_pass
= false;
1367 spapr
->htab_save_index
= index
;
1370 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1373 bool final
= max_ns
< 0;
1374 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1375 int examined
= 0, sent
= 0;
1376 int index
= spapr
->htab_save_index
;
1377 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1379 assert(!spapr
->htab_first_pass
);
1382 int chunkstart
, invalidstart
;
1384 /* Consume non-dirty HPTEs */
1385 while ((index
< htabslots
)
1386 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1392 /* Consume valid dirty HPTEs */
1393 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1394 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1395 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1396 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1401 invalidstart
= index
;
1402 /* Consume invalid dirty HPTEs */
1403 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1404 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1405 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1406 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1411 if (index
> chunkstart
) {
1412 int n_valid
= invalidstart
- chunkstart
;
1413 int n_invalid
= index
- invalidstart
;
1415 qemu_put_be32(f
, chunkstart
);
1416 qemu_put_be16(f
, n_valid
);
1417 qemu_put_be16(f
, n_invalid
);
1418 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1419 HASH_PTE_SIZE_64
* n_valid
);
1420 sent
+= index
- chunkstart
;
1422 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1427 if (examined
>= htabslots
) {
1431 if (index
>= htabslots
) {
1432 assert(index
== htabslots
);
1435 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1437 if (index
>= htabslots
) {
1438 assert(index
== htabslots
);
1442 spapr
->htab_save_index
= index
;
1444 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1447 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1448 #define MAX_KVM_BUF_SIZE 2048
1450 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1452 sPAPRMachineState
*spapr
= opaque
;
1456 /* Iteration header */
1457 qemu_put_be32(f
, 0);
1460 assert(kvm_enabled());
1462 fd
= get_htab_fd(spapr
);
1467 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1471 } else if (spapr
->htab_first_pass
) {
1472 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1474 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1478 qemu_put_be32(f
, 0);
1479 qemu_put_be16(f
, 0);
1480 qemu_put_be16(f
, 0);
1485 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1487 sPAPRMachineState
*spapr
= opaque
;
1490 /* Iteration header */
1491 qemu_put_be32(f
, 0);
1496 assert(kvm_enabled());
1498 fd
= get_htab_fd(spapr
);
1503 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
1508 if (spapr
->htab_first_pass
) {
1509 htab_save_first_pass(f
, spapr
, -1);
1511 htab_save_later_pass(f
, spapr
, -1);
1515 qemu_put_be32(f
, 0);
1516 qemu_put_be16(f
, 0);
1517 qemu_put_be16(f
, 0);
1522 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1524 sPAPRMachineState
*spapr
= opaque
;
1525 uint32_t section_hdr
;
1528 if (version_id
< 1 || version_id
> 1) {
1529 error_report("htab_load() bad version");
1533 section_hdr
= qemu_get_be32(f
);
1536 Error
*local_err
= NULL
;
1538 /* First section gives the htab size */
1539 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
1541 error_report_err(local_err
);
1548 assert(kvm_enabled());
1550 fd
= kvmppc_get_htab_fd(true);
1552 error_report("Unable to open fd to restore KVM hash table: %s",
1559 uint16_t n_valid
, n_invalid
;
1561 index
= qemu_get_be32(f
);
1562 n_valid
= qemu_get_be16(f
);
1563 n_invalid
= qemu_get_be16(f
);
1565 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1570 if ((index
+ n_valid
+ n_invalid
) >
1571 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1572 /* Bad index in stream */
1574 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
1575 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
1581 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1582 HASH_PTE_SIZE_64
* n_valid
);
1585 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1586 HASH_PTE_SIZE_64
* n_invalid
);
1593 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1608 static void htab_cleanup(void *opaque
)
1610 sPAPRMachineState
*spapr
= opaque
;
1612 close_htab_fd(spapr
);
1615 static SaveVMHandlers savevm_htab_handlers
= {
1616 .save_live_setup
= htab_save_setup
,
1617 .save_live_iterate
= htab_save_iterate
,
1618 .save_live_complete_precopy
= htab_save_complete
,
1619 .cleanup
= htab_cleanup
,
1620 .load_state
= htab_load
,
1623 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1626 MachineState
*machine
= MACHINE(qdev_get_machine());
1627 machine
->boot_order
= g_strdup(boot_device
);
1631 * Reset routine for LMB DR devices.
1633 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
1634 * routine. Reset for PCI DR devices will be handled by PHB reset routine
1635 * when it walks all its children devices. LMB devices reset occurs
1636 * as part of spapr_ppc_reset().
1638 static void spapr_drc_reset(void *opaque
)
1640 sPAPRDRConnector
*drc
= opaque
;
1641 DeviceState
*d
= DEVICE(drc
);
1648 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
1650 MachineState
*machine
= MACHINE(spapr
);
1651 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
1652 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
1655 for (i
= 0; i
< nr_lmbs
; i
++) {
1656 sPAPRDRConnector
*drc
;
1659 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
1660 drc
= spapr_dr_connector_new(OBJECT(spapr
), SPAPR_DR_CONNECTOR_TYPE_LMB
,
1662 qemu_register_reset(spapr_drc_reset
, drc
);
1667 * If RAM size, maxmem size and individual node mem sizes aren't aligned
1668 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
1669 * since we can't support such unaligned sizes with DRCONF_MEMORY.
1671 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
1675 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1676 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
1677 " is not aligned to %llu MiB",
1679 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1683 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1684 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
1685 " is not aligned to %llu MiB",
1687 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1691 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1692 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
1694 "Node %d memory size 0x%" PRIx64
1695 " is not aligned to %llu MiB",
1696 i
, numa_info
[i
].node_mem
,
1697 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1703 /* pSeries LPAR / sPAPR hardware init */
1704 static void ppc_spapr_init(MachineState
*machine
)
1706 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1707 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1708 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1709 const char *kernel_filename
= machine
->kernel_filename
;
1710 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1711 const char *initrd_filename
= machine
->initrd_filename
;
1714 MemoryRegion
*sysmem
= get_system_memory();
1715 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1716 MemoryRegion
*rma_region
;
1718 hwaddr rma_alloc_size
;
1719 hwaddr node0_size
= spapr_node0_size();
1720 uint32_t initrd_base
= 0;
1721 long kernel_size
= 0, initrd_size
= 0;
1722 long load_limit
, fw_size
;
1723 bool kernel_le
= false;
1725 int smt
= kvmppc_smt_threads();
1726 int spapr_cores
= smp_cpus
/ smp_threads
;
1727 int spapr_max_cores
= max_cpus
/ smp_threads
;
1729 if (mc
->query_hotpluggable_cpus
) {
1730 if (smp_cpus
% smp_threads
) {
1731 error_report("smp_cpus (%u) must be multiple of threads (%u)",
1732 smp_cpus
, smp_threads
);
1735 if (max_cpus
% smp_threads
) {
1736 error_report("max_cpus (%u) must be multiple of threads (%u)",
1737 max_cpus
, smp_threads
);
1742 msi_nonbroken
= true;
1744 QLIST_INIT(&spapr
->phbs
);
1746 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1748 /* Allocate RMA if necessary */
1749 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1751 if (rma_alloc_size
== -1) {
1752 error_report("Unable to create RMA");
1756 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1757 spapr
->rma_size
= rma_alloc_size
;
1759 spapr
->rma_size
= node0_size
;
1761 /* With KVM, we don't actually know whether KVM supports an
1762 * unbounded RMA (PR KVM) or is limited by the hash table size
1763 * (HV KVM using VRMA), so we always assume the latter
1765 * In that case, we also limit the initial allocations for RTAS
1766 * etc... to 256M since we have no way to know what the VRMA size
1767 * is going to be as it depends on the size of the hash table
1768 * isn't determined yet.
1770 if (kvm_enabled()) {
1771 spapr
->vrma_adjust
= 1;
1772 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1775 /* Actually we don't support unbounded RMA anymore since we
1776 * added proper emulation of HV mode. The max we can get is
1777 * 16G which also happens to be what we configure for PAPR
1778 * mode so make sure we don't do anything bigger than that
1780 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x400000000ull
);
1783 if (spapr
->rma_size
> node0_size
) {
1784 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
1789 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1790 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1792 /* Set up Interrupt Controller before we create the VCPUs */
1793 spapr
->xics
= xics_system_init(machine
,
1794 DIV_ROUND_UP(max_cpus
* smt
, smp_threads
),
1795 XICS_IRQS_SPAPR
, &error_fatal
);
1797 if (smc
->dr_lmb_enabled
) {
1798 spapr_validate_node_memory(machine
, &error_fatal
);
1802 if (machine
->cpu_model
== NULL
) {
1803 machine
->cpu_model
= kvm_enabled() ? "host" : "POWER7";
1806 ppc_cpu_parse_features(machine
->cpu_model
);
1808 if (mc
->query_hotpluggable_cpus
) {
1809 char *type
= spapr_get_cpu_core_type(machine
->cpu_model
);
1812 error_report("Unable to find sPAPR CPU Core definition");
1816 spapr
->cores
= g_new0(Object
*, spapr_max_cores
);
1817 for (i
= 0; i
< spapr_max_cores
; i
++) {
1818 int core_id
= i
* smp_threads
;
1819 sPAPRDRConnector
*drc
=
1820 spapr_dr_connector_new(OBJECT(spapr
),
1821 SPAPR_DR_CONNECTOR_TYPE_CPU
,
1822 (core_id
/ smp_threads
) * smt
);
1824 qemu_register_reset(spapr_drc_reset
, drc
);
1826 if (i
< spapr_cores
) {
1827 Object
*core
= object_new(type
);
1828 object_property_set_int(core
, smp_threads
, "nr-threads",
1830 object_property_set_int(core
, core_id
, CPU_CORE_PROP_CORE_ID
,
1832 object_property_set_bool(core
, true, "realized", &error_fatal
);
1837 for (i
= 0; i
< smp_cpus
; i
++) {
1838 PowerPCCPU
*cpu
= cpu_ppc_init(machine
->cpu_model
);
1840 error_report("Unable to find PowerPC CPU definition");
1843 spapr_cpu_init(spapr
, cpu
, &error_fatal
);
1847 if (kvm_enabled()) {
1848 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1849 kvmppc_enable_logical_ci_hcalls();
1850 kvmppc_enable_set_mode_hcall();
1854 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1856 memory_region_add_subregion(sysmem
, 0, ram
);
1858 if (rma_alloc_size
&& rma
) {
1859 rma_region
= g_new(MemoryRegion
, 1);
1860 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1861 rma_alloc_size
, rma
);
1862 vmstate_register_ram_global(rma_region
);
1863 memory_region_add_subregion(sysmem
, 0, rma_region
);
1866 /* initialize hotplug memory address space */
1867 if (machine
->ram_size
< machine
->maxram_size
) {
1868 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
1870 * Limit the number of hotpluggable memory slots to half the number
1871 * slots that KVM supports, leaving the other half for PCI and other
1872 * devices. However ensure that number of slots doesn't drop below 32.
1874 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
1875 SPAPR_MAX_RAM_SLOTS
;
1877 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
1878 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
1880 if (machine
->ram_slots
> max_memslots
) {
1881 error_report("Specified number of memory slots %"
1882 PRIu64
" exceeds max supported %d",
1883 machine
->ram_slots
, max_memslots
);
1887 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
1888 SPAPR_HOTPLUG_MEM_ALIGN
);
1889 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
1890 "hotplug-memory", hotplug_mem_size
);
1891 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
1892 &spapr
->hotplug_memory
.mr
);
1895 if (smc
->dr_lmb_enabled
) {
1896 spapr_create_lmb_dr_connectors(spapr
);
1899 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1901 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1904 spapr
->rtas_size
= get_image_size(filename
);
1905 if (spapr
->rtas_size
< 0) {
1906 error_report("Could not get size of LPAR rtas '%s'", filename
);
1909 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1910 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1911 error_report("Could not load LPAR rtas '%s'", filename
);
1914 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1915 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1916 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1921 /* Set up EPOW events infrastructure */
1922 spapr_events_init(spapr
);
1924 /* Set up the RTC RTAS interfaces */
1925 spapr_rtc_create(spapr
);
1927 /* Set up VIO bus */
1928 spapr
->vio_bus
= spapr_vio_bus_init();
1930 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1931 if (serial_hds
[i
]) {
1932 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1936 /* We always have at least the nvram device on VIO */
1937 spapr_create_nvram(spapr
);
1940 spapr_pci_rtas_init();
1942 phb
= spapr_create_phb(spapr
, 0);
1944 for (i
= 0; i
< nb_nics
; i
++) {
1945 NICInfo
*nd
= &nd_table
[i
];
1948 nd
->model
= g_strdup("ibmveth");
1951 if (strcmp(nd
->model
, "ibmveth") == 0) {
1952 spapr_vlan_create(spapr
->vio_bus
, nd
);
1954 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1958 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1959 spapr_vscsi_create(spapr
->vio_bus
);
1963 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
1964 spapr
->has_graphics
= true;
1965 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1969 if (smc
->use_ohci_by_default
) {
1970 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1972 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
1975 if (spapr
->has_graphics
) {
1976 USBBus
*usb_bus
= usb_bus_find(-1);
1978 usb_create_simple(usb_bus
, "usb-kbd");
1979 usb_create_simple(usb_bus
, "usb-mouse");
1983 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1985 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
1990 if (kernel_filename
) {
1991 uint64_t lowaddr
= 0;
1993 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1994 NULL
, &lowaddr
, NULL
, 1, PPC_ELF_MACHINE
,
1996 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1997 kernel_size
= load_elf(kernel_filename
,
1998 translate_kernel_address
, NULL
,
1999 NULL
, &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
2001 kernel_le
= kernel_size
> 0;
2003 if (kernel_size
< 0) {
2004 error_report("error loading %s: %s",
2005 kernel_filename
, load_elf_strerror(kernel_size
));
2010 if (initrd_filename
) {
2011 /* Try to locate the initrd in the gap between the kernel
2012 * and the firmware. Add a bit of space just in case
2014 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
2015 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
2016 load_limit
- initrd_base
);
2017 if (initrd_size
< 0) {
2018 error_report("could not load initial ram disk '%s'",
2028 if (bios_name
== NULL
) {
2029 bios_name
= FW_FILE_NAME
;
2031 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2033 error_report("Could not find LPAR firmware '%s'", bios_name
);
2036 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2038 error_report("Could not load LPAR firmware '%s'", filename
);
2043 /* FIXME: Should register things through the MachineState's qdev
2044 * interface, this is a legacy from the sPAPREnvironment structure
2045 * which predated MachineState but had a similar function */
2046 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2047 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2048 &savevm_htab_handlers
, spapr
);
2050 /* Prepare the device tree */
2051 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
2052 kernel_size
, kernel_le
,
2054 spapr
->check_exception_irq
);
2055 assert(spapr
->fdt_skel
!= NULL
);
2058 QTAILQ_INIT(&spapr
->ccs_list
);
2059 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
2061 qemu_register_boot_set(spapr_boot_set
, spapr
);
2064 static int spapr_kvm_type(const char *vm_type
)
2070 if (!strcmp(vm_type
, "HV")) {
2074 if (!strcmp(vm_type
, "PR")) {
2078 error_report("Unknown kvm-type specified '%s'", vm_type
);
2083 * Implementation of an interface to adjust firmware path
2084 * for the bootindex property handling.
2086 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2089 #define CAST(type, obj, name) \
2090 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2091 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2092 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2095 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2096 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2097 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2101 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2102 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2103 * in the top 16 bits of the 64-bit LUN
2105 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2106 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2107 (uint64_t)id
<< 48);
2108 } else if (virtio
) {
2110 * We use SRP luns of the form 01000000 | (target << 8) | lun
2111 * in the top 32 bits of the 64-bit LUN
2112 * Note: the quote above is from SLOF and it is wrong,
2113 * the actual binding is:
2114 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2116 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2117 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2118 (uint64_t)id
<< 32);
2121 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2122 * in the top 32 bits of the 64-bit LUN
2124 unsigned usb_port
= atoi(usb
->port
->path
);
2125 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2126 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2127 (uint64_t)id
<< 32);
2132 /* Replace "pci" with "pci@800000020000000" */
2133 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2139 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2141 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2143 return g_strdup(spapr
->kvm_type
);
2146 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2148 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2150 g_free(spapr
->kvm_type
);
2151 spapr
->kvm_type
= g_strdup(value
);
2154 static void spapr_machine_initfn(Object
*obj
)
2156 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2158 spapr
->htab_fd
= -1;
2159 object_property_add_str(obj
, "kvm-type",
2160 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2161 object_property_set_description(obj
, "kvm-type",
2162 "Specifies the KVM virtualization mode (HV, PR)",
2166 static void spapr_machine_finalizefn(Object
*obj
)
2168 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2170 g_free(spapr
->kvm_type
);
2173 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
2177 cpu_synchronize_state(cs
);
2178 ppc_cpu_do_system_reset(cs
);
2181 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2186 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
2190 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr
, uint64_t size
,
2191 uint32_t node
, Error
**errp
)
2193 sPAPRDRConnector
*drc
;
2194 sPAPRDRConnectorClass
*drck
;
2195 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2196 int i
, fdt_offset
, fdt_size
;
2199 for (i
= 0; i
< nr_lmbs
; i
++) {
2200 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2201 addr
/SPAPR_MEMORY_BLOCK_SIZE
);
2204 fdt
= create_device_tree(&fdt_size
);
2205 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2206 SPAPR_MEMORY_BLOCK_SIZE
);
2208 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
2209 drck
->attach(drc
, dev
, fdt
, fdt_offset
, !dev
->hotplugged
, errp
);
2210 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2212 /* send hotplug notification to the
2213 * guest only in case of hotplugged memory
2215 if (dev
->hotplugged
) {
2216 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
, nr_lmbs
);
2220 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2221 uint32_t node
, Error
**errp
)
2223 Error
*local_err
= NULL
;
2224 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2225 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2226 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2227 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
2228 uint64_t align
= memory_region_get_alignment(mr
);
2229 uint64_t size
= memory_region_size(mr
);
2232 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2233 error_setg(&local_err
, "Hotplugged memory size must be a multiple of "
2234 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
2238 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2243 addr
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
, &local_err
);
2245 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2249 spapr_add_lmbs(dev
, addr
, size
, node
, &error_abort
);
2252 error_propagate(errp
, local_err
);
2255 void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
2256 sPAPRMachineState
*spapr
)
2258 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
2259 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
2260 int id
= ppc_get_vcpu_dt_id(cpu
);
2262 int offset
, fdt_size
;
2265 fdt
= create_device_tree(&fdt_size
);
2266 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
2267 offset
= fdt_add_subnode(fdt
, 0, nodename
);
2269 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
2272 *fdt_offset
= offset
;
2276 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
2277 DeviceState
*dev
, Error
**errp
)
2279 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
2281 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2284 if (!smc
->dr_lmb_enabled
) {
2285 error_setg(errp
, "Memory hotplug not supported for this machine");
2288 node
= object_property_get_int(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
2292 if (node
< 0 || node
>= MAX_NODES
) {
2293 error_setg(errp
, "Invaild node %d", node
);
2298 * Currently PowerPC kernel doesn't allow hot-adding memory to
2299 * memory-less node, but instead will silently add the memory
2300 * to the first node that has some memory. This causes two
2301 * unexpected behaviours for the user.
2303 * - Memory gets hotplugged to a different node than what the user
2305 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
2306 * to memory-less node, a reboot will set things accordingly
2307 * and the previously hotplugged memory now ends in the right node.
2308 * This appears as if some memory moved from one node to another.
2310 * So until kernel starts supporting memory hotplug to memory-less
2311 * nodes, just prevent such attempts upfront in QEMU.
2313 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
2314 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
2319 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
2320 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2321 spapr_core_plug(hotplug_dev
, dev
, errp
);
2325 static void spapr_machine_device_unplug(HotplugHandler
*hotplug_dev
,
2326 DeviceState
*dev
, Error
**errp
)
2328 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
2330 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2331 error_setg(errp
, "Memory hot unplug not supported by sPAPR");
2332 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2333 if (!mc
->query_hotpluggable_cpus
) {
2334 error_setg(errp
, "CPU hot unplug not supported on this machine");
2337 spapr_core_unplug(hotplug_dev
, dev
, errp
);
2341 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
2342 DeviceState
*dev
, Error
**errp
)
2344 if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2345 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
2349 static HotplugHandler
*spapr_get_hotpug_handler(MachineState
*machine
,
2352 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
2353 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2354 return HOTPLUG_HANDLER(machine
);
2359 static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index
)
2361 /* Allocate to NUMA nodes on a "socket" basis (not that concept of
2362 * socket means much for the paravirtualized PAPR platform) */
2363 return cpu_index
/ smp_threads
/ smp_cores
;
2366 static HotpluggableCPUList
*spapr_query_hotpluggable_cpus(MachineState
*machine
)
2369 HotpluggableCPUList
*head
= NULL
;
2370 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2371 int spapr_max_cores
= max_cpus
/ smp_threads
;
2373 for (i
= 0; i
< spapr_max_cores
; i
++) {
2374 HotpluggableCPUList
*list_item
= g_new0(typeof(*list_item
), 1);
2375 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
2376 CpuInstanceProperties
*cpu_props
= g_new0(typeof(*cpu_props
), 1);
2378 cpu_item
->type
= spapr_get_cpu_core_type(machine
->cpu_model
);
2379 cpu_item
->vcpus_count
= smp_threads
;
2380 cpu_props
->has_core_id
= true;
2381 cpu_props
->core_id
= i
* smp_threads
;
2382 /* TODO: add 'has_node/node' here to describe
2383 to which node core belongs */
2385 cpu_item
->props
= cpu_props
;
2386 if (spapr
->cores
[i
]) {
2387 cpu_item
->has_qom_path
= true;
2388 cpu_item
->qom_path
= object_get_canonical_path(spapr
->cores
[i
]);
2390 list_item
->value
= cpu_item
;
2391 list_item
->next
= head
;
2397 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
2399 MachineClass
*mc
= MACHINE_CLASS(oc
);
2400 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
2401 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
2402 NMIClass
*nc
= NMI_CLASS(oc
);
2403 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
2405 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
2408 * We set up the default / latest behaviour here. The class_init
2409 * functions for the specific versioned machine types can override
2410 * these details for backwards compatibility
2412 mc
->init
= ppc_spapr_init
;
2413 mc
->reset
= ppc_spapr_reset
;
2414 mc
->block_default_type
= IF_SCSI
;
2415 mc
->max_cpus
= MAX_CPUMASK_BITS
;
2416 mc
->no_parallel
= 1;
2417 mc
->default_boot_order
= "";
2418 mc
->default_ram_size
= 512 * M_BYTE
;
2419 mc
->kvm_type
= spapr_kvm_type
;
2420 mc
->has_dynamic_sysbus
= true;
2421 mc
->pci_allow_0_address
= true;
2422 mc
->get_hotplug_handler
= spapr_get_hotpug_handler
;
2423 hc
->pre_plug
= spapr_machine_device_pre_plug
;
2424 hc
->plug
= spapr_machine_device_plug
;
2425 hc
->unplug
= spapr_machine_device_unplug
;
2426 mc
->cpu_index_to_socket_id
= spapr_cpu_index_to_socket_id
;
2428 smc
->dr_lmb_enabled
= true;
2429 mc
->query_hotpluggable_cpus
= spapr_query_hotpluggable_cpus
;
2430 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
2431 nc
->nmi_monitor_handler
= spapr_nmi
;
2434 static const TypeInfo spapr_machine_info
= {
2435 .name
= TYPE_SPAPR_MACHINE
,
2436 .parent
= TYPE_MACHINE
,
2438 .instance_size
= sizeof(sPAPRMachineState
),
2439 .instance_init
= spapr_machine_initfn
,
2440 .instance_finalize
= spapr_machine_finalizefn
,
2441 .class_size
= sizeof(sPAPRMachineClass
),
2442 .class_init
= spapr_machine_class_init
,
2443 .interfaces
= (InterfaceInfo
[]) {
2444 { TYPE_FW_PATH_PROVIDER
},
2446 { TYPE_HOTPLUG_HANDLER
},
2451 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
2452 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
2455 MachineClass *mc = MACHINE_CLASS(oc); \
2456 spapr_machine_##suffix##_class_options(mc); \
2458 mc->alias = "pseries"; \
2459 mc->is_default = 1; \
2462 static void spapr_machine_##suffix##_instance_init(Object *obj) \
2464 MachineState *machine = MACHINE(obj); \
2465 spapr_machine_##suffix##_instance_options(machine); \
2467 static const TypeInfo spapr_machine_##suffix##_info = { \
2468 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
2469 .parent = TYPE_SPAPR_MACHINE, \
2470 .class_init = spapr_machine_##suffix##_class_init, \
2471 .instance_init = spapr_machine_##suffix##_instance_init, \
2473 static void spapr_machine_register_##suffix(void) \
2475 type_register(&spapr_machine_##suffix##_info); \
2477 type_init(spapr_machine_register_##suffix)
2482 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
2486 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
2488 /* Defaults for the latest behaviour inherited from the base class */
2491 DEFINE_SPAPR_MACHINE(2_7
, "2.7", true);
2496 #define SPAPR_COMPAT_2_6 \
2499 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2501 .value = stringify(off),\
2504 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
2508 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
2510 spapr_machine_2_7_class_options(mc
);
2511 mc
->query_hotpluggable_cpus
= NULL
;
2512 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
2515 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
2520 #define SPAPR_COMPAT_2_5 \
2523 .driver = "spapr-vlan", \
2524 .property = "use-rx-buffer-pools", \
2528 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
2532 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
2534 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2536 spapr_machine_2_6_class_options(mc
);
2537 smc
->use_ohci_by_default
= true;
2538 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
2541 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
2546 #define SPAPR_COMPAT_2_4 \
2549 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
2551 spapr_machine_2_5_instance_options(machine
);
2554 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
2556 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2558 spapr_machine_2_5_class_options(mc
);
2559 smc
->dr_lmb_enabled
= false;
2560 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
2563 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
2568 #define SPAPR_COMPAT_2_3 \
2571 .driver = "spapr-pci-host-bridge",\
2572 .property = "dynamic-reconfiguration",\
2576 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
2578 spapr_machine_2_4_instance_options(machine
);
2579 savevm_skip_section_footers();
2580 global_state_set_optional();
2581 savevm_skip_configuration();
2584 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
2586 spapr_machine_2_4_class_options(mc
);
2587 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
2589 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
2595 #define SPAPR_COMPAT_2_2 \
2598 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2599 .property = "mem_win_size",\
2600 .value = "0x20000000",\
2603 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
2605 spapr_machine_2_3_instance_options(machine
);
2606 machine
->suppress_vmdesc
= true;
2609 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
2611 spapr_machine_2_3_class_options(mc
);
2612 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
2614 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
2619 #define SPAPR_COMPAT_2_1 \
2622 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
2624 spapr_machine_2_2_instance_options(machine
);
2627 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
2629 spapr_machine_2_2_class_options(mc
);
2630 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
2632 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
2634 static void spapr_machine_register_types(void)
2636 type_register_static(&spapr_machine_info
);
2639 type_init(spapr_machine_register_types
)