2 * RAM allocation and memory access
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "exec/page-vary.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
25 #include "qemu/cacheflush.h"
26 #include "qemu/hbitmap.h"
27 #include "qemu/madvise.h"
30 #include "hw/core/tcg-cpu-ops.h"
31 #endif /* CONFIG_TCG */
33 #include "exec/exec-all.h"
34 #include "exec/target_page.h"
35 #include "hw/qdev-core.h"
36 #include "hw/qdev-properties.h"
37 #include "hw/boards.h"
38 #include "hw/xen/xen.h"
39 #include "sysemu/kvm.h"
40 #include "sysemu/tcg.h"
41 #include "sysemu/qtest.h"
42 #include "qemu/timer.h"
43 #include "qemu/config-file.h"
44 #include "qemu/error-report.h"
45 #include "qemu/qemu-print.h"
47 #include "qemu/memalign.h"
48 #include "exec/memory.h"
49 #include "exec/ioport.h"
50 #include "sysemu/dma.h"
51 #include "sysemu/hostmem.h"
52 #include "sysemu/hw_accel.h"
53 #include "sysemu/xen-mapcache.h"
54 #include "trace/trace-root.h"
56 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
57 #include <linux/falloc.h>
60 #include "qemu/rcu_queue.h"
61 #include "qemu/main-loop.h"
62 #include "exec/translate-all.h"
63 #include "sysemu/replay.h"
65 #include "exec/memory-internal.h"
66 #include "exec/ram_addr.h"
68 #include "qemu/pmem.h"
70 #include "migration/vmstate.h"
72 #include "qemu/range.h"
74 #include "qemu/mmap-alloc.h"
77 #include "monitor/monitor.h"
79 #ifdef CONFIG_LIBDAXCTL
80 #include <daxctl/libdaxctl.h>
83 //#define DEBUG_SUBPAGE
85 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
86 * are protected by the ramlist lock.
88 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
90 static MemoryRegion
*system_memory
;
91 static MemoryRegion
*system_io
;
93 AddressSpace address_space_io
;
94 AddressSpace address_space_memory
;
96 static MemoryRegion io_mem_unassigned
;
98 typedef struct PhysPageEntry PhysPageEntry
;
100 struct PhysPageEntry
{
101 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
103 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
107 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
109 /* Size of the L2 (and L3, etc) page tables. */
110 #define ADDR_SPACE_BITS 64
113 #define P_L2_SIZE (1 << P_L2_BITS)
115 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
117 typedef PhysPageEntry Node
[P_L2_SIZE
];
119 typedef struct PhysPageMap
{
122 unsigned sections_nb
;
123 unsigned sections_nb_alloc
;
125 unsigned nodes_nb_alloc
;
127 MemoryRegionSection
*sections
;
130 struct AddressSpaceDispatch
{
131 MemoryRegionSection
*mru_section
;
132 /* This is a multi-level map on the physical address space.
133 * The bottom level has pointers to MemoryRegionSections.
135 PhysPageEntry phys_map
;
139 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
140 typedef struct subpage_t
{
144 uint16_t sub_section
[];
147 #define PHYS_SECTION_UNASSIGNED 0
149 static void io_mem_init(void);
150 static void memory_map_init(void);
151 static void tcg_log_global_after_sync(MemoryListener
*listener
);
152 static void tcg_commit(MemoryListener
*listener
);
155 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
156 * @cpu: the CPU whose AddressSpace this is
157 * @as: the AddressSpace itself
158 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
159 * @tcg_as_listener: listener for tracking changes to the AddressSpace
161 struct CPUAddressSpace
{
164 struct AddressSpaceDispatch
*memory_dispatch
;
165 MemoryListener tcg_as_listener
;
168 struct DirtyBitmapSnapshot
{
171 unsigned long dirty
[];
174 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
176 static unsigned alloc_hint
= 16;
177 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
178 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
179 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
180 alloc_hint
= map
->nodes_nb_alloc
;
184 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
191 ret
= map
->nodes_nb
++;
193 assert(ret
!= PHYS_MAP_NODE_NIL
);
194 assert(ret
!= map
->nodes_nb_alloc
);
196 e
.skip
= leaf
? 0 : 1;
197 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
198 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
199 memcpy(&p
[i
], &e
, sizeof(e
));
204 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
205 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
209 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
211 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
212 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
214 p
= map
->nodes
[lp
->ptr
];
215 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
217 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
218 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
224 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
230 static void phys_page_set(AddressSpaceDispatch
*d
,
231 hwaddr index
, uint64_t nb
,
234 /* Wildly overreserve - it doesn't matter much. */
235 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
237 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
240 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
241 * and update our entry so we can skip it and go directly to the destination.
243 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
245 unsigned valid_ptr
= P_L2_SIZE
;
250 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
255 for (i
= 0; i
< P_L2_SIZE
; i
++) {
256 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
263 phys_page_compact(&p
[i
], nodes
);
267 /* We can only compress if there's only one child. */
272 assert(valid_ptr
< P_L2_SIZE
);
274 /* Don't compress if it won't fit in the # of bits we have. */
275 if (P_L2_LEVELS
>= (1 << 6) &&
276 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
280 lp
->ptr
= p
[valid_ptr
].ptr
;
281 if (!p
[valid_ptr
].skip
) {
282 /* If our only child is a leaf, make this a leaf. */
283 /* By design, we should have made this node a leaf to begin with so we
284 * should never reach here.
285 * But since it's so simple to handle this, let's do it just in case we
290 lp
->skip
+= p
[valid_ptr
].skip
;
294 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
296 if (d
->phys_map
.skip
) {
297 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
301 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
304 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
305 * the section must cover the entire address space.
307 return int128_gethi(section
->size
) ||
308 range_covers_byte(section
->offset_within_address_space
,
309 int128_getlo(section
->size
), addr
);
312 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
314 PhysPageEntry lp
= d
->phys_map
, *p
;
315 Node
*nodes
= d
->map
.nodes
;
316 MemoryRegionSection
*sections
= d
->map
.sections
;
317 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
320 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
321 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
322 return §ions
[PHYS_SECTION_UNASSIGNED
];
325 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
328 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
329 return §ions
[lp
.ptr
];
331 return §ions
[PHYS_SECTION_UNASSIGNED
];
335 /* Called from RCU critical section */
336 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
338 bool resolve_subpage
)
340 MemoryRegionSection
*section
= qatomic_read(&d
->mru_section
);
343 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
344 !section_covers_addr(section
, addr
)) {
345 section
= phys_page_find(d
, addr
);
346 qatomic_set(&d
->mru_section
, section
);
348 if (resolve_subpage
&& section
->mr
->subpage
) {
349 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
350 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
355 /* Called from RCU critical section */
356 static MemoryRegionSection
*
357 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
358 hwaddr
*plen
, bool resolve_subpage
)
360 MemoryRegionSection
*section
;
364 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
365 /* Compute offset within MemoryRegionSection */
366 addr
-= section
->offset_within_address_space
;
368 /* Compute offset within MemoryRegion */
369 *xlat
= addr
+ section
->offset_within_region
;
373 /* MMIO registers can be expected to perform full-width accesses based only
374 * on their address, without considering adjacent registers that could
375 * decode to completely different MemoryRegions. When such registers
376 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
377 * regions overlap wildly. For this reason we cannot clamp the accesses
380 * If the length is small (as is the case for address_space_ldl/stl),
381 * everything works fine. If the incoming length is large, however,
382 * the caller really has to do the clamping through memory_access_size.
384 if (memory_region_is_ram(mr
)) {
385 diff
= int128_sub(section
->size
, int128_make64(addr
));
386 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
392 * address_space_translate_iommu - translate an address through an IOMMU
393 * memory region and then through the target address space.
395 * @iommu_mr: the IOMMU memory region that we start the translation from
396 * @addr: the address to be translated through the MMU
397 * @xlat: the translated address offset within the destination memory region.
398 * It cannot be %NULL.
399 * @plen_out: valid read/write length of the translated address. It
401 * @page_mask_out: page mask for the translated address. This
402 * should only be meaningful for IOMMU translated
403 * addresses, since there may be huge pages that this bit
404 * would tell. It can be %NULL if we don't care about it.
405 * @is_write: whether the translation operation is for write
406 * @is_mmio: whether this can be MMIO, set true if it can
407 * @target_as: the address space targeted by the IOMMU
408 * @attrs: transaction attributes
410 * This function is called from RCU critical section. It is the common
411 * part of flatview_do_translate and address_space_translate_cached.
413 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
416 hwaddr
*page_mask_out
,
419 AddressSpace
**target_as
,
422 MemoryRegionSection
*section
;
423 hwaddr page_mask
= (hwaddr
)-1;
427 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
431 if (imrc
->attrs_to_index
) {
432 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
435 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
436 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
438 if (!(iotlb
.perm
& (1 << is_write
))) {
442 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
443 | (addr
& iotlb
.addr_mask
));
444 page_mask
&= iotlb
.addr_mask
;
445 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
446 *target_as
= iotlb
.target_as
;
448 section
= address_space_translate_internal(
449 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
452 iommu_mr
= memory_region_get_iommu(section
->mr
);
453 } while (unlikely(iommu_mr
));
456 *page_mask_out
= page_mask
;
461 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
465 * flatview_do_translate - translate an address in FlatView
467 * @fv: the flat view that we want to translate on
468 * @addr: the address to be translated in above address space
469 * @xlat: the translated address offset within memory region. It
471 * @plen_out: valid read/write length of the translated address. It
472 * can be @NULL when we don't care about it.
473 * @page_mask_out: page mask for the translated address. This
474 * should only be meaningful for IOMMU translated
475 * addresses, since there may be huge pages that this bit
476 * would tell. It can be @NULL if we don't care about it.
477 * @is_write: whether the translation operation is for write
478 * @is_mmio: whether this can be MMIO, set true if it can
479 * @target_as: the address space targeted by the IOMMU
480 * @attrs: memory transaction attributes
482 * This function is called from RCU critical section
484 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
488 hwaddr
*page_mask_out
,
491 AddressSpace
**target_as
,
494 MemoryRegionSection
*section
;
495 IOMMUMemoryRegion
*iommu_mr
;
496 hwaddr plen
= (hwaddr
)(-1);
502 section
= address_space_translate_internal(
503 flatview_to_dispatch(fv
), addr
, xlat
,
506 iommu_mr
= memory_region_get_iommu(section
->mr
);
507 if (unlikely(iommu_mr
)) {
508 return address_space_translate_iommu(iommu_mr
, xlat
,
509 plen_out
, page_mask_out
,
514 /* Not behind an IOMMU, use default page size. */
515 *page_mask_out
= ~TARGET_PAGE_MASK
;
521 /* Called from RCU critical section */
522 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
523 bool is_write
, MemTxAttrs attrs
)
525 MemoryRegionSection section
;
526 hwaddr xlat
, page_mask
;
529 * This can never be MMIO, and we don't really care about plen,
532 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
533 NULL
, &page_mask
, is_write
, false, &as
,
536 /* Illegal translation */
537 if (section
.mr
== &io_mem_unassigned
) {
541 /* Convert memory region offset into address space offset */
542 xlat
+= section
.offset_within_address_space
-
543 section
.offset_within_region
;
545 return (IOMMUTLBEntry
) {
547 .iova
= addr
& ~page_mask
,
548 .translated_addr
= xlat
& ~page_mask
,
549 .addr_mask
= page_mask
,
550 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
555 return (IOMMUTLBEntry
) {0};
558 /* Called from RCU critical section */
559 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
560 hwaddr
*plen
, bool is_write
,
564 MemoryRegionSection section
;
565 AddressSpace
*as
= NULL
;
567 /* This can be MMIO, so setup MMIO bit. */
568 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
569 is_write
, true, &as
, attrs
);
572 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
573 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
574 *plen
= MIN(page
, *plen
);
580 typedef struct TCGIOMMUNotifier
{
588 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
590 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
592 if (!notifier
->active
) {
595 tlb_flush(notifier
->cpu
);
596 notifier
->active
= false;
597 /* We leave the notifier struct on the list to avoid reallocating it later.
598 * Generally the number of IOMMUs a CPU deals with will be small.
599 * In any case we can't unregister the iommu notifier from a notify
604 static void tcg_register_iommu_notifier(CPUState
*cpu
,
605 IOMMUMemoryRegion
*iommu_mr
,
608 /* Make sure this CPU has an IOMMU notifier registered for this
609 * IOMMU/IOMMU index combination, so that we can flush its TLB
610 * when the IOMMU tells us the mappings we've cached have changed.
612 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
613 TCGIOMMUNotifier
*notifier
= NULL
;
616 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
617 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
618 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
622 if (i
== cpu
->iommu_notifiers
->len
) {
623 /* Not found, add a new entry at the end of the array */
624 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
625 notifier
= g_new0(TCGIOMMUNotifier
, 1);
626 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
629 notifier
->iommu_idx
= iommu_idx
;
631 /* Rather than trying to register interest in the specific part
632 * of the iommu's address space that we've accessed and then
633 * expand it later as subsequent accesses touch more of it, we
634 * just register interest in the whole thing, on the assumption
635 * that iommu reconfiguration will be rare.
637 iommu_notifier_init(¬ifier
->n
,
638 tcg_iommu_unmap_notify
,
639 IOMMU_NOTIFIER_UNMAP
,
643 memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
647 if (!notifier
->active
) {
648 notifier
->active
= true;
652 void tcg_iommu_free_notifier_list(CPUState
*cpu
)
654 /* Destroy the CPU's notifier list */
656 TCGIOMMUNotifier
*notifier
;
658 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
659 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
660 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
663 g_array_free(cpu
->iommu_notifiers
, true);
666 void tcg_iommu_init_notifier_list(CPUState
*cpu
)
668 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
671 /* Called from RCU critical section */
672 MemoryRegionSection
*
673 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr orig_addr
,
674 hwaddr
*xlat
, hwaddr
*plen
,
675 MemTxAttrs attrs
, int *prot
)
677 MemoryRegionSection
*section
;
678 IOMMUMemoryRegion
*iommu_mr
;
679 IOMMUMemoryRegionClass
*imrc
;
682 hwaddr addr
= orig_addr
;
683 AddressSpaceDispatch
*d
=
684 qatomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
687 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
689 iommu_mr
= memory_region_get_iommu(section
->mr
);
694 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
696 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
697 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
698 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
699 * doesn't short-cut its translation table walk.
701 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
702 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
703 | (addr
& iotlb
.addr_mask
));
704 /* Update the caller's prot bits to remove permissions the IOMMU
705 * is giving us a failure response for. If we get down to no
706 * permissions left at all we can give up now.
708 if (!(iotlb
.perm
& IOMMU_RO
)) {
709 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
711 if (!(iotlb
.perm
& IOMMU_WO
)) {
712 *prot
&= ~PAGE_WRITE
;
719 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
722 assert(!memory_region_is_iommu(section
->mr
));
728 * We should be given a page-aligned address -- certainly
729 * tlb_set_page_with_attrs() does so. The page offset of xlat
730 * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0.
731 * The page portion of xlat will be logged by memory_region_access_valid()
732 * when this memory access is rejected, so use the original untranslated
735 assert((orig_addr
& ~TARGET_PAGE_MASK
) == 0);
737 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
740 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
741 const char *prefix
, MemoryRegion
*mr
)
743 CPUAddressSpace
*newas
;
744 AddressSpace
*as
= g_new0(AddressSpace
, 1);
748 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
749 address_space_init(as
, mr
, as_name
);
752 /* Target code should have set num_ases before calling us */
753 assert(asidx
< cpu
->num_ases
);
756 /* address space 0 gets the convenience alias */
760 /* KVM cannot currently support multiple address spaces. */
761 assert(asidx
== 0 || !kvm_enabled());
763 if (!cpu
->cpu_ases
) {
764 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
767 newas
= &cpu
->cpu_ases
[asidx
];
771 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
772 newas
->tcg_as_listener
.commit
= tcg_commit
;
773 newas
->tcg_as_listener
.name
= "tcg";
774 memory_listener_register(&newas
->tcg_as_listener
, as
);
778 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
780 /* Return the AddressSpace corresponding to the specified index */
781 return cpu
->cpu_ases
[asidx
].as
;
784 /* Called from RCU critical section */
785 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
789 block
= qatomic_rcu_read(&ram_list
.mru_block
);
790 if (block
&& addr
- block
->offset
< block
->max_length
) {
793 RAMBLOCK_FOREACH(block
) {
794 if (addr
- block
->offset
< block
->max_length
) {
799 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
803 /* It is safe to write mru_block outside the iothread lock. This
808 * xxx removed from list
812 * call_rcu(reclaim_ramblock, xxx);
815 * qatomic_rcu_set is not needed here. The block was already published
816 * when it was placed into the list. Here we're just making an extra
817 * copy of the pointer.
819 ram_list
.mru_block
= block
;
823 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
830 assert(tcg_enabled());
831 end
= TARGET_PAGE_ALIGN(start
+ length
);
832 start
&= TARGET_PAGE_MASK
;
834 RCU_READ_LOCK_GUARD();
835 block
= qemu_get_ram_block(start
);
836 assert(block
== qemu_get_ram_block(end
- 1));
837 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
839 tlb_reset_dirty(cpu
, start1
, length
);
843 /* Note: start and end must be within the same ram block. */
844 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
848 DirtyMemoryBlocks
*blocks
;
849 unsigned long end
, page
, start_page
;
852 uint64_t mr_offset
, mr_size
;
858 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
859 start_page
= start
>> TARGET_PAGE_BITS
;
862 WITH_RCU_READ_LOCK_GUARD() {
863 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
864 ramblock
= qemu_get_ram_block(start
);
865 /* Range sanity check on the ramblock */
866 assert(start
>= ramblock
->offset
&&
867 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
870 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
871 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
872 unsigned long num
= MIN(end
- page
,
873 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
875 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
880 mr_offset
= (ram_addr_t
)(start_page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
881 mr_size
= (end
- start_page
) << TARGET_PAGE_BITS
;
882 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
885 if (dirty
&& tcg_enabled()) {
886 tlb_reset_dirty_range_all(start
, length
);
892 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
893 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
895 DirtyMemoryBlocks
*blocks
;
896 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
897 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
898 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
899 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
900 DirtyBitmapSnapshot
*snap
;
901 unsigned long page
, end
, dest
;
903 snap
= g_malloc0(sizeof(*snap
) +
904 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
908 page
= first
>> TARGET_PAGE_BITS
;
909 end
= last
>> TARGET_PAGE_BITS
;
912 WITH_RCU_READ_LOCK_GUARD() {
913 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
916 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
917 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
918 unsigned long num
= MIN(end
- page
,
919 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
921 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
922 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
923 offset
>>= BITS_PER_LEVEL
;
925 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
926 blocks
->blocks
[idx
] + offset
,
929 dest
+= num
>> BITS_PER_LEVEL
;
934 tlb_reset_dirty_range_all(start
, length
);
937 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
942 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
946 unsigned long page
, end
;
948 assert(start
>= snap
->start
);
949 assert(start
+ length
<= snap
->end
);
951 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
952 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
955 if (test_bit(page
, snap
->dirty
)) {
963 /* Called from RCU critical section */
964 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
965 MemoryRegionSection
*section
)
967 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
968 return section
- d
->map
.sections
;
971 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
973 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
975 static uint16_t phys_section_add(PhysPageMap
*map
,
976 MemoryRegionSection
*section
)
978 /* The physical section number is ORed with a page-aligned
979 * pointer to produce the iotlb entries. Thus it should
980 * never overflow into the page-aligned value.
982 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
984 if (map
->sections_nb
== map
->sections_nb_alloc
) {
985 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
986 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
987 map
->sections_nb_alloc
);
989 map
->sections
[map
->sections_nb
] = *section
;
990 memory_region_ref(section
->mr
);
991 return map
->sections_nb
++;
994 static void phys_section_destroy(MemoryRegion
*mr
)
996 bool have_sub_page
= mr
->subpage
;
998 memory_region_unref(mr
);
1000 if (have_sub_page
) {
1001 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1002 object_unref(OBJECT(&subpage
->iomem
));
1007 static void phys_sections_free(PhysPageMap
*map
)
1009 while (map
->sections_nb
> 0) {
1010 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1011 phys_section_destroy(section
->mr
);
1013 g_free(map
->sections
);
1017 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1019 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1021 hwaddr base
= section
->offset_within_address_space
1023 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1024 MemoryRegionSection subsection
= {
1025 .offset_within_address_space
= base
,
1026 .size
= int128_make64(TARGET_PAGE_SIZE
),
1030 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1032 if (!(existing
->mr
->subpage
)) {
1033 subpage
= subpage_init(fv
, base
);
1035 subsection
.mr
= &subpage
->iomem
;
1036 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1037 phys_section_add(&d
->map
, &subsection
));
1039 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1041 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1042 end
= start
+ int128_get64(section
->size
) - 1;
1043 subpage_register(subpage
, start
, end
,
1044 phys_section_add(&d
->map
, section
));
1048 static void register_multipage(FlatView
*fv
,
1049 MemoryRegionSection
*section
)
1051 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1052 hwaddr start_addr
= section
->offset_within_address_space
;
1053 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1054 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1058 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1062 * The range in *section* may look like this:
1066 * where s stands for subpage and P for page.
1068 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1070 MemoryRegionSection remain
= *section
;
1071 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1073 /* register first subpage */
1074 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1075 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1076 - remain
.offset_within_address_space
;
1078 MemoryRegionSection now
= remain
;
1079 now
.size
= int128_min(int128_make64(left
), now
.size
);
1080 register_subpage(fv
, &now
);
1081 if (int128_eq(remain
.size
, now
.size
)) {
1084 remain
.size
= int128_sub(remain
.size
, now
.size
);
1085 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1086 remain
.offset_within_region
+= int128_get64(now
.size
);
1089 /* register whole pages */
1090 if (int128_ge(remain
.size
, page_size
)) {
1091 MemoryRegionSection now
= remain
;
1092 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1093 register_multipage(fv
, &now
);
1094 if (int128_eq(remain
.size
, now
.size
)) {
1097 remain
.size
= int128_sub(remain
.size
, now
.size
);
1098 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1099 remain
.offset_within_region
+= int128_get64(now
.size
);
1102 /* register last subpage */
1103 register_subpage(fv
, &remain
);
1106 void qemu_flush_coalesced_mmio_buffer(void)
1109 kvm_flush_coalesced_mmio_buffer();
1112 void qemu_mutex_lock_ramlist(void)
1114 qemu_mutex_lock(&ram_list
.mutex
);
1117 void qemu_mutex_unlock_ramlist(void)
1119 qemu_mutex_unlock(&ram_list
.mutex
);
1122 GString
*ram_block_format(void)
1126 GString
*buf
= g_string_new("");
1128 RCU_READ_LOCK_GUARD();
1129 g_string_append_printf(buf
, "%24s %8s %18s %18s %18s %18s %3s\n",
1130 "Block Name", "PSize", "Offset", "Used", "Total",
1133 RAMBLOCK_FOREACH(block
) {
1134 psize
= size_to_str(block
->page_size
);
1135 g_string_append_printf(buf
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1136 " 0x%016" PRIx64
" 0x%016" PRIx64
" %3s\n",
1137 block
->idstr
, psize
,
1138 (uint64_t)block
->offset
,
1139 (uint64_t)block
->used_length
,
1140 (uint64_t)block
->max_length
,
1141 (uint64_t)(uintptr_t)block
->host
,
1142 block
->mr
->readonly
? "ro" : "rw");
1150 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1152 long *hpsize_min
= opaque
;
1154 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1155 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1156 long hpsize
= host_memory_backend_pagesize(backend
);
1158 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1159 *hpsize_min
= hpsize
;
1166 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1168 long *hpsize_max
= opaque
;
1170 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1171 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1172 long hpsize
= host_memory_backend_pagesize(backend
);
1174 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1175 *hpsize_max
= hpsize
;
1183 * TODO: We assume right now that all mapped host memory backends are
1184 * used as RAM, however some might be used for different purposes.
1186 long qemu_minrampagesize(void)
1188 long hpsize
= LONG_MAX
;
1189 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1191 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1195 long qemu_maxrampagesize(void)
1198 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1200 object_child_foreach(memdev_root
, find_max_backend_pagesize
, &pagesize
);
1205 static int64_t get_file_size(int fd
)
1208 #if defined(__linux__)
1211 if (fstat(fd
, &st
) < 0) {
1215 /* Special handling for devdax character devices */
1216 if (S_ISCHR(st
.st_mode
)) {
1217 g_autofree
char *subsystem_path
= NULL
;
1218 g_autofree
char *subsystem
= NULL
;
1220 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1221 major(st
.st_rdev
), minor(st
.st_rdev
));
1222 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1224 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1225 g_autofree
char *size_path
= NULL
;
1226 g_autofree
char *size_str
= NULL
;
1228 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1229 major(st
.st_rdev
), minor(st
.st_rdev
));
1231 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1232 return g_ascii_strtoll(size_str
, NULL
, 0);
1236 #endif /* defined(__linux__) */
1238 /* st.st_size may be zero for special files yet lseek(2) works */
1239 size
= lseek(fd
, 0, SEEK_END
);
1246 static int64_t get_file_align(int fd
)
1249 #if defined(__linux__) && defined(CONFIG_LIBDAXCTL)
1252 if (fstat(fd
, &st
) < 0) {
1256 /* Special handling for devdax character devices */
1257 if (S_ISCHR(st
.st_mode
)) {
1258 g_autofree
char *path
= NULL
;
1259 g_autofree
char *rpath
= NULL
;
1260 struct daxctl_ctx
*ctx
;
1261 struct daxctl_region
*region
;
1264 path
= g_strdup_printf("/sys/dev/char/%d:%d",
1265 major(st
.st_rdev
), minor(st
.st_rdev
));
1266 rpath
= realpath(path
, NULL
);
1271 rc
= daxctl_new(&ctx
);
1276 daxctl_region_foreach(ctx
, region
) {
1277 if (strstr(rpath
, daxctl_region_get_path(region
))) {
1278 align
= daxctl_region_get_align(region
);
1284 #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */
1289 static int file_ram_open(const char *path
,
1290 const char *region_name
,
1296 char *sanitized_name
;
1302 fd
= open(path
, readonly
? O_RDONLY
: O_RDWR
);
1304 /* @path names an existing file, use it */
1307 if (errno
== ENOENT
) {
1308 /* @path names a file that doesn't exist, create it */
1309 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1314 } else if (errno
== EISDIR
) {
1315 /* @path names a directory, create a file there */
1316 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1317 sanitized_name
= g_strdup(region_name
);
1318 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1324 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1326 g_free(sanitized_name
);
1328 fd
= mkstemp(filename
);
1336 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1337 error_setg_errno(errp
, errno
,
1338 "can't open backing store %s for guest RAM",
1343 * Try again on EINTR and EEXIST. The latter happens when
1344 * something else creates the file between our two open().
1351 static void *file_ram_alloc(RAMBlock
*block
,
1359 uint32_t qemu_map_flags
;
1362 block
->page_size
= qemu_fd_getpagesize(fd
);
1363 if (block
->mr
->align
% block
->page_size
) {
1364 error_setg(errp
, "alignment 0x%" PRIx64
1365 " must be multiples of page size 0x%zx",
1366 block
->mr
->align
, block
->page_size
);
1368 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1369 error_setg(errp
, "alignment 0x%" PRIx64
1370 " must be a power of two", block
->mr
->align
);
1372 } else if (offset
% block
->page_size
) {
1373 error_setg(errp
, "offset 0x%" PRIx64
1374 " must be multiples of page size 0x%zx",
1375 offset
, block
->page_size
);
1378 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1379 #if defined(__s390x__)
1380 if (kvm_enabled()) {
1381 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1385 if (memory
< block
->page_size
) {
1386 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1387 "or larger than page size 0x%zx",
1388 memory
, block
->page_size
);
1392 memory
= ROUND_UP(memory
, block
->page_size
);
1395 * ftruncate is not supported by hugetlbfs in older
1396 * hosts, so don't bother bailing out on errors.
1397 * If anything goes wrong with it under other filesystems,
1400 * Do not truncate the non-empty backend file to avoid corrupting
1401 * the existing data in the file. Disabling shrinking is not
1402 * enough. For example, the current vNVDIMM implementation stores
1403 * the guest NVDIMM labels at the end of the backend file. If the
1404 * backend file is later extended, QEMU will not be able to find
1405 * those labels. Therefore, extending the non-empty backend file
1406 * is disabled as well.
1408 if (truncate
&& ftruncate(fd
, offset
+ memory
)) {
1409 perror("ftruncate");
1412 qemu_map_flags
= readonly
? QEMU_MAP_READONLY
: 0;
1413 qemu_map_flags
|= (block
->flags
& RAM_SHARED
) ? QEMU_MAP_SHARED
: 0;
1414 qemu_map_flags
|= (block
->flags
& RAM_PMEM
) ? QEMU_MAP_SYNC
: 0;
1415 qemu_map_flags
|= (block
->flags
& RAM_NORESERVE
) ? QEMU_MAP_NORESERVE
: 0;
1416 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
, qemu_map_flags
, offset
);
1417 if (area
== MAP_FAILED
) {
1418 error_setg_errno(errp
, errno
,
1419 "unable to map backing store for guest RAM");
1424 block
->fd_offset
= offset
;
1429 /* Allocate space within the ram_addr_t space that governs the
1431 * Called with the ramlist lock held.
1433 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1435 RAMBlock
*block
, *next_block
;
1436 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1438 assert(size
!= 0); /* it would hand out same offset multiple times */
1440 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1444 RAMBLOCK_FOREACH(block
) {
1445 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1447 /* Align blocks to start on a 'long' in the bitmap
1448 * which makes the bitmap sync'ing take the fast path.
1450 candidate
= block
->offset
+ block
->max_length
;
1451 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1453 /* Search for the closest following block
1456 RAMBLOCK_FOREACH(next_block
) {
1457 if (next_block
->offset
>= candidate
) {
1458 next
= MIN(next
, next_block
->offset
);
1462 /* If it fits remember our place and remember the size
1463 * of gap, but keep going so that we might find a smaller
1464 * gap to fill so avoiding fragmentation.
1466 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1468 mingap
= next
- candidate
;
1471 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1474 if (offset
== RAM_ADDR_MAX
) {
1475 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1480 trace_find_ram_offset(size
, offset
);
1485 static unsigned long last_ram_page(void)
1488 ram_addr_t last
= 0;
1490 RCU_READ_LOCK_GUARD();
1491 RAMBLOCK_FOREACH(block
) {
1492 last
= MAX(last
, block
->offset
+ block
->max_length
);
1494 return last
>> TARGET_PAGE_BITS
;
1497 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1501 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1502 if (!machine_dump_guest_core(current_machine
)) {
1503 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1505 perror("qemu_madvise");
1506 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1507 "but dump_guest_core=off specified\n");
1512 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1517 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
1522 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
1527 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
1529 return rb
->used_length
;
1532 ram_addr_t
qemu_ram_get_max_length(RAMBlock
*rb
)
1534 return rb
->max_length
;
1537 bool qemu_ram_is_shared(RAMBlock
*rb
)
1539 return rb
->flags
& RAM_SHARED
;
1542 bool qemu_ram_is_noreserve(RAMBlock
*rb
)
1544 return rb
->flags
& RAM_NORESERVE
;
1547 /* Note: Only set at the start of postcopy */
1548 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
1550 return rb
->flags
& RAM_UF_ZEROPAGE
;
1553 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
1555 rb
->flags
|= RAM_UF_ZEROPAGE
;
1558 bool qemu_ram_is_migratable(RAMBlock
*rb
)
1560 return rb
->flags
& RAM_MIGRATABLE
;
1563 void qemu_ram_set_migratable(RAMBlock
*rb
)
1565 rb
->flags
|= RAM_MIGRATABLE
;
1568 void qemu_ram_unset_migratable(RAMBlock
*rb
)
1570 rb
->flags
&= ~RAM_MIGRATABLE
;
1573 bool qemu_ram_is_named_file(RAMBlock
*rb
)
1575 return rb
->flags
& RAM_NAMED_FILE
;
1578 int qemu_ram_get_fd(RAMBlock
*rb
)
1583 /* Called with iothread lock held. */
1584 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1589 assert(!new_block
->idstr
[0]);
1592 char *id
= qdev_get_dev_path(dev
);
1594 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1598 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1600 RCU_READ_LOCK_GUARD();
1601 RAMBLOCK_FOREACH(block
) {
1602 if (block
!= new_block
&&
1603 !strcmp(block
->idstr
, new_block
->idstr
)) {
1604 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1611 /* Called with iothread lock held. */
1612 void qemu_ram_unset_idstr(RAMBlock
*block
)
1614 /* FIXME: arch_init.c assumes that this is not called throughout
1615 * migration. Ignore the problem since hot-unplug during migration
1616 * does not work anyway.
1619 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1623 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1625 return rb
->page_size
;
1628 /* Returns the largest size of page in use */
1629 size_t qemu_ram_pagesize_largest(void)
1634 RAMBLOCK_FOREACH(block
) {
1635 largest
= MAX(largest
, qemu_ram_pagesize(block
));
1641 static int memory_try_enable_merging(void *addr
, size_t len
)
1643 if (!machine_mem_merge(current_machine
)) {
1644 /* disabled by the user */
1648 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1652 * Resizing RAM while migrating can result in the migration being canceled.
1653 * Care has to be taken if the guest might have already detected the memory.
1655 * As memory core doesn't know how is memory accessed, it is up to
1656 * resize callback to update device state and/or add assertions to detect
1657 * misuse, if necessary.
1659 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1661 const ram_addr_t oldsize
= block
->used_length
;
1662 const ram_addr_t unaligned_size
= newsize
;
1666 newsize
= HOST_PAGE_ALIGN(newsize
);
1668 if (block
->used_length
== newsize
) {
1670 * We don't have to resize the ram block (which only knows aligned
1671 * sizes), however, we have to notify if the unaligned size changed.
1673 if (unaligned_size
!= memory_region_size(block
->mr
)) {
1674 memory_region_set_size(block
->mr
, unaligned_size
);
1675 if (block
->resized
) {
1676 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1682 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1683 error_setg_errno(errp
, EINVAL
,
1684 "Size mismatch: %s: 0x" RAM_ADDR_FMT
1685 " != 0x" RAM_ADDR_FMT
, block
->idstr
,
1686 newsize
, block
->used_length
);
1690 if (block
->max_length
< newsize
) {
1691 error_setg_errno(errp
, EINVAL
,
1692 "Size too large: %s: 0x" RAM_ADDR_FMT
1693 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1694 newsize
, block
->max_length
);
1698 /* Notify before modifying the ram block and touching the bitmaps. */
1700 ram_block_notify_resize(block
->host
, oldsize
, newsize
);
1703 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1704 block
->used_length
= newsize
;
1705 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1707 memory_region_set_size(block
->mr
, unaligned_size
);
1708 if (block
->resized
) {
1709 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1715 * Trigger sync on the given ram block for range [start, start + length]
1716 * with the backing store if one is available.
1718 * @Note: this is supposed to be a synchronous op.
1720 void qemu_ram_msync(RAMBlock
*block
, ram_addr_t start
, ram_addr_t length
)
1722 /* The requested range should fit in within the block range */
1723 g_assert((start
+ length
) <= block
->used_length
);
1725 #ifdef CONFIG_LIBPMEM
1726 /* The lack of support for pmem should not block the sync */
1727 if (ramblock_is_pmem(block
)) {
1728 void *addr
= ramblock_ptr(block
, start
);
1729 pmem_persist(addr
, length
);
1733 if (block
->fd
>= 0) {
1735 * Case there is no support for PMEM or the memory has not been
1736 * specified as persistent (or is not one) - use the msync.
1737 * Less optimal but still achieves the same goal
1739 void *addr
= ramblock_ptr(block
, start
);
1740 if (qemu_msync(addr
, length
, block
->fd
)) {
1741 warn_report("%s: failed to sync memory range: start: "
1742 RAM_ADDR_FMT
" length: " RAM_ADDR_FMT
,
1743 __func__
, start
, length
);
1748 /* Called with ram_list.mutex held */
1749 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1750 ram_addr_t new_ram_size
)
1752 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1753 DIRTY_MEMORY_BLOCK_SIZE
);
1754 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1755 DIRTY_MEMORY_BLOCK_SIZE
);
1758 /* Only need to extend if block count increased */
1759 if (new_num_blocks
<= old_num_blocks
) {
1763 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1764 DirtyMemoryBlocks
*old_blocks
;
1765 DirtyMemoryBlocks
*new_blocks
;
1768 old_blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1769 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1770 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1772 if (old_num_blocks
) {
1773 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1774 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1777 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1778 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1781 qatomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1784 g_free_rcu(old_blocks
, rcu
);
1789 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1791 const bool noreserve
= qemu_ram_is_noreserve(new_block
);
1792 const bool shared
= qemu_ram_is_shared(new_block
);
1794 RAMBlock
*last_block
= NULL
;
1795 ram_addr_t old_ram_size
, new_ram_size
;
1798 old_ram_size
= last_ram_page();
1800 qemu_mutex_lock_ramlist();
1801 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1803 if (!new_block
->host
) {
1804 if (xen_enabled()) {
1805 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1806 new_block
->mr
, &err
);
1808 error_propagate(errp
, err
);
1809 qemu_mutex_unlock_ramlist();
1813 new_block
->host
= qemu_anon_ram_alloc(new_block
->max_length
,
1814 &new_block
->mr
->align
,
1816 if (!new_block
->host
) {
1817 error_setg_errno(errp
, errno
,
1818 "cannot set up guest memory '%s'",
1819 memory_region_name(new_block
->mr
));
1820 qemu_mutex_unlock_ramlist();
1823 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
1827 new_ram_size
= MAX(old_ram_size
,
1828 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
1829 if (new_ram_size
> old_ram_size
) {
1830 dirty_memory_extend(old_ram_size
, new_ram_size
);
1832 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1833 * QLIST (which has an RCU-friendly variant) does not have insertion at
1834 * tail, so save the last element in last_block.
1836 RAMBLOCK_FOREACH(block
) {
1838 if (block
->max_length
< new_block
->max_length
) {
1843 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
1844 } else if (last_block
) {
1845 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
1846 } else { /* list is empty */
1847 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
1849 ram_list
.mru_block
= NULL
;
1851 /* Write list before version */
1854 qemu_mutex_unlock_ramlist();
1856 cpu_physical_memory_set_dirty_range(new_block
->offset
,
1857 new_block
->used_length
,
1860 if (new_block
->host
) {
1861 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
1862 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
1864 * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU
1865 * Configure it unless the machine is a qtest server, in which case
1866 * KVM is not used and it may be forked (eg for fuzzing purposes).
1868 if (!qtest_enabled()) {
1869 qemu_madvise(new_block
->host
, new_block
->max_length
,
1870 QEMU_MADV_DONTFORK
);
1872 ram_block_notify_add(new_block
->host
, new_block
->used_length
,
1873 new_block
->max_length
);
1878 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
1879 uint32_t ram_flags
, int fd
, off_t offset
,
1880 bool readonly
, Error
**errp
)
1882 RAMBlock
*new_block
;
1883 Error
*local_err
= NULL
;
1884 int64_t file_size
, file_align
;
1886 /* Just support these ram flags by now. */
1887 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
| RAM_NORESERVE
|
1888 RAM_PROTECTED
| RAM_NAMED_FILE
)) == 0);
1890 if (xen_enabled()) {
1891 error_setg(errp
, "-mem-path not supported with Xen");
1895 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1897 "host lacks kvm mmu notifiers, -mem-path unsupported");
1901 size
= HOST_PAGE_ALIGN(size
);
1902 file_size
= get_file_size(fd
);
1903 if (file_size
> offset
&& file_size
< (offset
+ size
)) {
1904 error_setg(errp
, "backing store size 0x%" PRIx64
1905 " does not match 'size' option 0x" RAM_ADDR_FMT
,
1910 file_align
= get_file_align(fd
);
1911 if (file_align
> 0 && file_align
> mr
->align
) {
1912 error_setg(errp
, "backing store align 0x%" PRIx64
1913 " is larger than 'align' option 0x%" PRIx64
,
1914 file_align
, mr
->align
);
1918 new_block
= g_malloc0(sizeof(*new_block
));
1920 new_block
->used_length
= size
;
1921 new_block
->max_length
= size
;
1922 new_block
->flags
= ram_flags
;
1923 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, readonly
,
1924 !file_size
, offset
, errp
);
1925 if (!new_block
->host
) {
1930 ram_block_add(new_block
, &local_err
);
1933 error_propagate(errp
, local_err
);
1941 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
1942 uint32_t ram_flags
, const char *mem_path
,
1943 off_t offset
, bool readonly
, Error
**errp
)
1949 fd
= file_ram_open(mem_path
, memory_region_name(mr
), readonly
, &created
,
1955 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, offset
, readonly
,
1970 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
1971 void (*resized
)(const char*,
1974 void *host
, uint32_t ram_flags
,
1975 MemoryRegion
*mr
, Error
**errp
)
1977 RAMBlock
*new_block
;
1978 Error
*local_err
= NULL
;
1980 assert((ram_flags
& ~(RAM_SHARED
| RAM_RESIZEABLE
| RAM_PREALLOC
|
1981 RAM_NORESERVE
)) == 0);
1982 assert(!host
^ (ram_flags
& RAM_PREALLOC
));
1984 size
= HOST_PAGE_ALIGN(size
);
1985 max_size
= HOST_PAGE_ALIGN(max_size
);
1986 new_block
= g_malloc0(sizeof(*new_block
));
1988 new_block
->resized
= resized
;
1989 new_block
->used_length
= size
;
1990 new_block
->max_length
= max_size
;
1991 assert(max_size
>= size
);
1993 new_block
->page_size
= qemu_real_host_page_size();
1994 new_block
->host
= host
;
1995 new_block
->flags
= ram_flags
;
1996 ram_block_add(new_block
, &local_err
);
1999 error_propagate(errp
, local_err
);
2005 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2006 MemoryRegion
*mr
, Error
**errp
)
2008 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, RAM_PREALLOC
, mr
,
2012 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, uint32_t ram_flags
,
2013 MemoryRegion
*mr
, Error
**errp
)
2015 assert((ram_flags
& ~(RAM_SHARED
| RAM_NORESERVE
)) == 0);
2016 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, ram_flags
, mr
, errp
);
2019 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2020 void (*resized
)(const char*,
2023 MemoryRegion
*mr
, Error
**errp
)
2025 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
,
2026 RAM_RESIZEABLE
, mr
, errp
);
2029 static void reclaim_ramblock(RAMBlock
*block
)
2031 if (block
->flags
& RAM_PREALLOC
) {
2033 } else if (xen_enabled()) {
2034 xen_invalidate_map_cache_entry(block
->host
);
2036 } else if (block
->fd
>= 0) {
2037 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2041 qemu_anon_ram_free(block
->host
, block
->max_length
);
2046 void qemu_ram_free(RAMBlock
*block
)
2053 ram_block_notify_remove(block
->host
, block
->used_length
,
2057 qemu_mutex_lock_ramlist();
2058 QLIST_REMOVE_RCU(block
, next
);
2059 ram_list
.mru_block
= NULL
;
2060 /* Write list before version */
2063 call_rcu(block
, reclaim_ramblock
, rcu
);
2064 qemu_mutex_unlock_ramlist();
2068 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2075 RAMBLOCK_FOREACH(block
) {
2076 offset
= addr
- block
->offset
;
2077 if (offset
< block
->max_length
) {
2078 vaddr
= ramblock_ptr(block
, offset
);
2079 if (block
->flags
& RAM_PREALLOC
) {
2081 } else if (xen_enabled()) {
2085 flags
|= block
->flags
& RAM_SHARED
?
2086 MAP_SHARED
: MAP_PRIVATE
;
2087 flags
|= block
->flags
& RAM_NORESERVE
? MAP_NORESERVE
: 0;
2088 if (block
->fd
>= 0) {
2089 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2090 flags
, block
->fd
, offset
+ block
->fd_offset
);
2092 flags
|= MAP_ANONYMOUS
;
2093 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2096 if (area
!= vaddr
) {
2097 error_report("Could not remap addr: "
2098 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2102 memory_try_enable_merging(vaddr
, length
);
2103 qemu_ram_setup_dump(vaddr
, length
);
2108 #endif /* !_WIN32 */
2110 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2111 * This should not be used for general purpose DMA. Use address_space_map
2112 * or address_space_rw instead. For local memory (e.g. video ram) that the
2113 * device owns, use memory_region_get_ram_ptr.
2115 * Called within RCU critical section.
2117 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2119 RAMBlock
*block
= ram_block
;
2121 if (block
== NULL
) {
2122 block
= qemu_get_ram_block(addr
);
2123 addr
-= block
->offset
;
2126 if (xen_enabled() && block
->host
== NULL
) {
2127 /* We need to check if the requested address is in the RAM
2128 * because we don't want to map the entire memory in QEMU.
2129 * In that case just map until the end of the page.
2131 if (block
->offset
== 0) {
2132 return xen_map_cache(addr
, 0, 0, false);
2135 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2137 return ramblock_ptr(block
, addr
);
2140 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2141 * but takes a size argument.
2143 * Called within RCU critical section.
2145 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2146 hwaddr
*size
, bool lock
)
2148 RAMBlock
*block
= ram_block
;
2153 if (block
== NULL
) {
2154 block
= qemu_get_ram_block(addr
);
2155 addr
-= block
->offset
;
2157 *size
= MIN(*size
, block
->max_length
- addr
);
2159 if (xen_enabled() && block
->host
== NULL
) {
2160 /* We need to check if the requested address is in the RAM
2161 * because we don't want to map the entire memory in QEMU.
2162 * In that case just map the requested area.
2164 if (block
->offset
== 0) {
2165 return xen_map_cache(addr
, *size
, lock
, lock
);
2168 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2171 return ramblock_ptr(block
, addr
);
2174 /* Return the offset of a hostpointer within a ramblock */
2175 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2177 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2178 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2179 assert(res
< rb
->max_length
);
2185 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2188 * ptr: Host pointer to look up
2189 * round_offset: If true round the result offset down to a page boundary
2190 * *ram_addr: set to result ram_addr
2191 * *offset: set to result offset within the RAMBlock
2193 * Returns: RAMBlock (or NULL if not found)
2195 * By the time this function returns, the returned pointer is not protected
2196 * by RCU anymore. If the caller is not within an RCU critical section and
2197 * does not hold the iothread lock, it must have other means of protecting the
2198 * pointer, such as a reference to the region that includes the incoming
2201 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2205 uint8_t *host
= ptr
;
2207 if (xen_enabled()) {
2208 ram_addr_t ram_addr
;
2209 RCU_READ_LOCK_GUARD();
2210 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2211 block
= qemu_get_ram_block(ram_addr
);
2213 *offset
= ram_addr
- block
->offset
;
2218 RCU_READ_LOCK_GUARD();
2219 block
= qatomic_rcu_read(&ram_list
.mru_block
);
2220 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2224 RAMBLOCK_FOREACH(block
) {
2225 /* This case append when the block is not mapped. */
2226 if (block
->host
== NULL
) {
2229 if (host
- block
->host
< block
->max_length
) {
2237 *offset
= (host
- block
->host
);
2239 *offset
&= TARGET_PAGE_MASK
;
2245 * Finds the named RAMBlock
2247 * name: The name of RAMBlock to find
2249 * Returns: RAMBlock (or NULL if not found)
2251 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2255 RAMBLOCK_FOREACH(block
) {
2256 if (!strcmp(name
, block
->idstr
)) {
2264 /* Some of the softmmu routines need to translate from a host pointer
2265 (typically a TLB entry) back to a ram offset. */
2266 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2271 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2273 return RAM_ADDR_INVALID
;
2276 return block
->offset
+ offset
;
2279 ram_addr_t
qemu_ram_addr_from_host_nofail(void *ptr
)
2281 ram_addr_t ram_addr
;
2283 ram_addr
= qemu_ram_addr_from_host(ptr
);
2284 if (ram_addr
== RAM_ADDR_INVALID
) {
2285 error_report("Bad ram pointer %p", ptr
);
2291 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2292 MemTxAttrs attrs
, void *buf
, hwaddr len
);
2293 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2294 const void *buf
, hwaddr len
);
2295 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2296 bool is_write
, MemTxAttrs attrs
);
2298 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2299 unsigned len
, MemTxAttrs attrs
)
2301 subpage_t
*subpage
= opaque
;
2305 #if defined(DEBUG_SUBPAGE)
2306 printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
"\n", __func__
,
2307 subpage
, len
, addr
);
2309 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2313 *data
= ldn_p(buf
, len
);
2317 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2318 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2320 subpage_t
*subpage
= opaque
;
2323 #if defined(DEBUG_SUBPAGE)
2324 printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
2325 " value %"PRIx64
"\n",
2326 __func__
, subpage
, len
, addr
, value
);
2328 stn_p(buf
, len
, value
);
2329 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2332 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2333 unsigned len
, bool is_write
,
2336 subpage_t
*subpage
= opaque
;
2337 #if defined(DEBUG_SUBPAGE)
2338 printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx
"\n",
2339 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2342 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2343 len
, is_write
, attrs
);
2346 static const MemoryRegionOps subpage_ops
= {
2347 .read_with_attrs
= subpage_read
,
2348 .write_with_attrs
= subpage_write
,
2349 .impl
.min_access_size
= 1,
2350 .impl
.max_access_size
= 8,
2351 .valid
.min_access_size
= 1,
2352 .valid
.max_access_size
= 8,
2353 .valid
.accepts
= subpage_accepts
,
2354 .endianness
= DEVICE_NATIVE_ENDIAN
,
2357 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2362 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2364 idx
= SUBPAGE_IDX(start
);
2365 eidx
= SUBPAGE_IDX(end
);
2366 #if defined(DEBUG_SUBPAGE)
2367 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2368 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2370 for (; idx
<= eidx
; idx
++) {
2371 mmio
->sub_section
[idx
] = section
;
2377 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2381 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2382 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2385 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2386 NULL
, TARGET_PAGE_SIZE
);
2387 mmio
->iomem
.subpage
= true;
2388 #if defined(DEBUG_SUBPAGE)
2389 printf("%s: %p base " HWADDR_FMT_plx
" len %08x\n", __func__
,
2390 mmio
, base
, TARGET_PAGE_SIZE
);
2396 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2399 MemoryRegionSection section
= {
2402 .offset_within_address_space
= 0,
2403 .offset_within_region
= 0,
2404 .size
= int128_2_64(),
2407 return phys_section_add(map
, §ion
);
2410 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2411 hwaddr index
, MemTxAttrs attrs
)
2413 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2414 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2415 AddressSpaceDispatch
*d
= qatomic_rcu_read(&cpuas
->memory_dispatch
);
2416 MemoryRegionSection
*sections
= d
->map
.sections
;
2418 return §ions
[index
& ~TARGET_PAGE_MASK
];
2421 static void io_mem_init(void)
2423 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2427 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2429 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2432 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2433 assert(n
== PHYS_SECTION_UNASSIGNED
);
2435 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2440 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2442 phys_sections_free(&d
->map
);
2446 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2450 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2452 CPUAddressSpace
*cpuas
;
2454 /* Wait for the CPU to end the current TB. This avoids the following
2458 * ---------------------- -------------------------
2459 * TLB check -> slow path
2460 * notdirty_mem_write
2464 * TLB check -> fast path
2468 * by pushing the migration thread's memory read after the vCPU thread has
2469 * written the memory.
2471 if (replay_mode
== REPLAY_MODE_NONE
) {
2473 * VGA can make calls to this function while updating the screen.
2474 * In record/replay mode this causes a deadlock, because
2475 * run_on_cpu waits for rr mutex. Therefore no races are possible
2476 * in this case and no need for making run_on_cpu when
2477 * record/replay is enabled.
2479 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2480 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2484 static void tcg_commit(MemoryListener
*listener
)
2486 CPUAddressSpace
*cpuas
;
2487 AddressSpaceDispatch
*d
;
2489 assert(tcg_enabled());
2490 /* since each CPU stores ram addresses in its TLB cache, we must
2491 reset the modified entries */
2492 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2493 cpu_reloading_memory_map();
2494 /* The CPU and TLB are protected by the iothread lock.
2495 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2496 * may have split the RCU critical section.
2498 d
= address_space_to_dispatch(cpuas
->as
);
2499 qatomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2500 tlb_flush(cpuas
->cpu
);
2503 static void memory_map_init(void)
2505 system_memory
= g_malloc(sizeof(*system_memory
));
2507 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2508 address_space_init(&address_space_memory
, system_memory
, "memory");
2510 system_io
= g_malloc(sizeof(*system_io
));
2511 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2513 address_space_init(&address_space_io
, system_io
, "I/O");
2516 MemoryRegion
*get_system_memory(void)
2518 return system_memory
;
2521 MemoryRegion
*get_system_io(void)
2526 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2529 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2530 addr
+= memory_region_get_ram_addr(mr
);
2532 /* No early return if dirty_log_mask is or becomes 0, because
2533 * cpu_physical_memory_set_dirty_range will still call
2534 * xen_modified_memory.
2536 if (dirty_log_mask
) {
2538 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2540 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2541 assert(tcg_enabled());
2542 tb_invalidate_phys_range(addr
, addr
+ length
- 1);
2543 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2545 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2548 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
2551 * In principle this function would work on other memory region types too,
2552 * but the ROM device use case is the only one where this operation is
2553 * necessary. Other memory regions should use the
2554 * address_space_read/write() APIs.
2556 assert(memory_region_is_romd(mr
));
2558 invalidate_and_set_dirty(mr
, addr
, size
);
2561 int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2563 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2565 /* Regions are assumed to support 1-4 byte accesses unless
2566 otherwise specified. */
2567 if (access_size_max
== 0) {
2568 access_size_max
= 4;
2571 /* Bound the maximum access by the alignment of the address. */
2572 if (!mr
->ops
->impl
.unaligned
) {
2573 unsigned align_size_max
= addr
& -addr
;
2574 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2575 access_size_max
= align_size_max
;
2579 /* Don't attempt accesses larger than the maximum. */
2580 if (l
> access_size_max
) {
2581 l
= access_size_max
;
2588 bool prepare_mmio_access(MemoryRegion
*mr
)
2590 bool release_lock
= false;
2592 if (!qemu_mutex_iothread_locked()) {
2593 qemu_mutex_lock_iothread();
2594 release_lock
= true;
2596 if (mr
->flush_coalesced_mmio
) {
2597 qemu_flush_coalesced_mmio_buffer();
2600 return release_lock
;
2604 * flatview_access_allowed
2605 * @mr: #MemoryRegion to be accessed
2606 * @attrs: memory transaction attributes
2607 * @addr: address within that memory region
2608 * @len: the number of bytes to access
2610 * Check if a memory transaction is allowed.
2612 * Returns: true if transaction is allowed, false if denied.
2614 static bool flatview_access_allowed(MemoryRegion
*mr
, MemTxAttrs attrs
,
2615 hwaddr addr
, hwaddr len
)
2617 if (likely(!attrs
.memory
)) {
2620 if (memory_region_is_ram(mr
)) {
2623 qemu_log_mask(LOG_GUEST_ERROR
,
2624 "Invalid access to non-RAM device at "
2625 "addr 0x%" HWADDR_PRIX
", size %" HWADDR_PRIu
", "
2626 "region '%s'\n", addr
, len
, memory_region_name(mr
));
2630 /* Called within RCU critical section. */
2631 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
2634 hwaddr len
, hwaddr addr1
,
2635 hwaddr l
, MemoryRegion
*mr
)
2639 MemTxResult result
= MEMTX_OK
;
2640 bool release_lock
= false;
2641 const uint8_t *buf
= ptr
;
2644 if (!flatview_access_allowed(mr
, attrs
, addr1
, l
)) {
2645 result
|= MEMTX_ACCESS_ERROR
;
2647 } else if (!memory_access_is_direct(mr
, true)) {
2648 release_lock
|= prepare_mmio_access(mr
);
2649 l
= memory_access_size(mr
, l
, addr1
);
2650 /* XXX: could force current_cpu to NULL to avoid
2652 val
= ldn_he_p(buf
, l
);
2653 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
2654 size_memop(l
), attrs
);
2657 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2658 memmove(ram_ptr
, buf
, l
);
2659 invalidate_and_set_dirty(mr
, addr1
, l
);
2663 qemu_mutex_unlock_iothread();
2664 release_lock
= false;
2676 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2682 /* Called from RCU critical section. */
2683 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2684 const void *buf
, hwaddr len
)
2691 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2692 if (!flatview_access_allowed(mr
, attrs
, addr
, len
)) {
2693 return MEMTX_ACCESS_ERROR
;
2695 return flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
2699 /* Called within RCU critical section. */
2700 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
2701 MemTxAttrs attrs
, void *ptr
,
2702 hwaddr len
, hwaddr addr1
, hwaddr l
,
2707 MemTxResult result
= MEMTX_OK
;
2708 bool release_lock
= false;
2711 fuzz_dma_read_cb(addr
, len
, mr
);
2713 if (!flatview_access_allowed(mr
, attrs
, addr1
, l
)) {
2714 result
|= MEMTX_ACCESS_ERROR
;
2716 } else if (!memory_access_is_direct(mr
, false)) {
2718 release_lock
|= prepare_mmio_access(mr
);
2719 l
= memory_access_size(mr
, l
, addr1
);
2720 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
2721 size_memop(l
), attrs
);
2722 stn_he_p(buf
, l
, val
);
2725 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2726 memcpy(buf
, ram_ptr
, l
);
2730 qemu_mutex_unlock_iothread();
2731 release_lock
= false;
2743 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2749 /* Called from RCU critical section. */
2750 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2751 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2758 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2759 if (!flatview_access_allowed(mr
, attrs
, addr
, len
)) {
2760 return MEMTX_ACCESS_ERROR
;
2762 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
2766 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
2767 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2769 MemTxResult result
= MEMTX_OK
;
2773 RCU_READ_LOCK_GUARD();
2774 fv
= address_space_to_flatview(as
);
2775 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
2781 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
2783 const void *buf
, hwaddr len
)
2785 MemTxResult result
= MEMTX_OK
;
2789 RCU_READ_LOCK_GUARD();
2790 fv
= address_space_to_flatview(as
);
2791 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
2797 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
2798 void *buf
, hwaddr len
, bool is_write
)
2801 return address_space_write(as
, addr
, attrs
, buf
, len
);
2803 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
2807 MemTxResult
address_space_set(AddressSpace
*as
, hwaddr addr
,
2808 uint8_t c
, hwaddr len
, MemTxAttrs attrs
)
2810 #define FILLBUF_SIZE 512
2811 uint8_t fillbuf
[FILLBUF_SIZE
];
2813 MemTxResult error
= MEMTX_OK
;
2815 memset(fillbuf
, c
, FILLBUF_SIZE
);
2817 l
= len
< FILLBUF_SIZE
? len
: FILLBUF_SIZE
;
2818 error
|= address_space_write(as
, addr
, attrs
, fillbuf
, l
);
2826 void cpu_physical_memory_rw(hwaddr addr
, void *buf
,
2827 hwaddr len
, bool is_write
)
2829 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
2830 buf
, len
, is_write
);
2833 enum write_rom_type
{
2838 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
2843 enum write_rom_type type
)
2849 const uint8_t *buf
= ptr
;
2851 RCU_READ_LOCK_GUARD();
2854 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
2856 if (!(memory_region_is_ram(mr
) ||
2857 memory_region_is_romd(mr
))) {
2858 l
= memory_access_size(mr
, l
, addr1
);
2861 ram_ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
2864 memcpy(ram_ptr
, buf
, l
);
2865 invalidate_and_set_dirty(mr
, addr1
, l
);
2868 flush_idcache_range((uintptr_t)ram_ptr
, (uintptr_t)ram_ptr
, l
);
2879 /* used for ROM loading : can write in RAM and ROM */
2880 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
2882 const void *buf
, hwaddr len
)
2884 return address_space_write_rom_internal(as
, addr
, attrs
,
2885 buf
, len
, WRITE_DATA
);
2888 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
2891 * This function should do the same thing as an icache flush that was
2892 * triggered from within the guest. For TCG we are always cache coherent,
2893 * so there is no need to flush anything. For KVM / Xen we need to flush
2894 * the host's instruction cache at least.
2896 if (tcg_enabled()) {
2900 address_space_write_rom_internal(&address_space_memory
,
2901 start
, MEMTXATTRS_UNSPECIFIED
,
2902 NULL
, len
, FLUSH_CACHE
);
2913 static BounceBuffer bounce
;
2915 typedef struct MapClient
{
2917 QLIST_ENTRY(MapClient
) link
;
2920 QemuMutex map_client_list_lock
;
2921 static QLIST_HEAD(, MapClient
) map_client_list
2922 = QLIST_HEAD_INITIALIZER(map_client_list
);
2924 static void cpu_unregister_map_client_do(MapClient
*client
)
2926 QLIST_REMOVE(client
, link
);
2930 static void cpu_notify_map_clients_locked(void)
2934 while (!QLIST_EMPTY(&map_client_list
)) {
2935 client
= QLIST_FIRST(&map_client_list
);
2936 qemu_bh_schedule(client
->bh
);
2937 cpu_unregister_map_client_do(client
);
2941 void cpu_register_map_client(QEMUBH
*bh
)
2943 MapClient
*client
= g_malloc(sizeof(*client
));
2945 qemu_mutex_lock(&map_client_list_lock
);
2947 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
2948 /* Write map_client_list before reading in_use. */
2950 if (!qatomic_read(&bounce
.in_use
)) {
2951 cpu_notify_map_clients_locked();
2953 qemu_mutex_unlock(&map_client_list_lock
);
2956 void cpu_exec_init_all(void)
2958 qemu_mutex_init(&ram_list
.mutex
);
2959 /* The data structures we set up here depend on knowing the page size,
2960 * so no more changes can be made after this point.
2961 * In an ideal world, nothing we did before we had finished the
2962 * machine setup would care about the target page size, and we could
2963 * do this much later, rather than requiring board models to state
2964 * up front what their requirements are.
2966 finalize_target_page_bits();
2969 qemu_mutex_init(&map_client_list_lock
);
2972 void cpu_unregister_map_client(QEMUBH
*bh
)
2976 qemu_mutex_lock(&map_client_list_lock
);
2977 QLIST_FOREACH(client
, &map_client_list
, link
) {
2978 if (client
->bh
== bh
) {
2979 cpu_unregister_map_client_do(client
);
2983 qemu_mutex_unlock(&map_client_list_lock
);
2986 static void cpu_notify_map_clients(void)
2988 qemu_mutex_lock(&map_client_list_lock
);
2989 cpu_notify_map_clients_locked();
2990 qemu_mutex_unlock(&map_client_list_lock
);
2993 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2994 bool is_write
, MemTxAttrs attrs
)
3001 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3002 if (!memory_access_is_direct(mr
, is_write
)) {
3003 l
= memory_access_size(mr
, l
, addr
);
3004 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3015 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3016 hwaddr len
, bool is_write
,
3021 RCU_READ_LOCK_GUARD();
3022 fv
= address_space_to_flatview(as
);
3023 return flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3027 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3029 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3030 bool is_write
, MemTxAttrs attrs
)
3034 MemoryRegion
*this_mr
;
3040 if (target_len
== 0) {
3045 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3046 &len
, is_write
, attrs
);
3047 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3053 /* Map a physical memory region into a host virtual address.
3054 * May map a subset of the requested range, given by and returned in *plen.
3055 * May return NULL if resources needed to perform the mapping are exhausted.
3056 * Use only for reads OR writes - not for read-modify-write operations.
3057 * Use cpu_register_map_client() to know when retrying the map operation is
3058 * likely to succeed.
3060 void *address_space_map(AddressSpace
*as
,
3076 RCU_READ_LOCK_GUARD();
3077 fv
= address_space_to_flatview(as
);
3078 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3080 if (!memory_access_is_direct(mr
, is_write
)) {
3081 if (qatomic_xchg(&bounce
.in_use
, true)) {
3085 /* Avoid unbounded allocations */
3086 l
= MIN(l
, TARGET_PAGE_SIZE
);
3087 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3091 memory_region_ref(mr
);
3094 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3099 return bounce
.buffer
;
3103 memory_region_ref(mr
);
3104 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3105 l
, is_write
, attrs
);
3106 fuzz_dma_read_cb(addr
, *plen
, mr
);
3107 return qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3110 /* Unmaps a memory region previously mapped by address_space_map().
3111 * Will also mark the memory as dirty if is_write is true. access_len gives
3112 * the amount of memory that was actually read or written by the caller.
3114 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3115 bool is_write
, hwaddr access_len
)
3117 if (buffer
!= bounce
.buffer
) {
3121 mr
= memory_region_from_host(buffer
, &addr1
);
3124 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3126 if (xen_enabled()) {
3127 xen_invalidate_map_cache_entry(buffer
);
3129 memory_region_unref(mr
);
3133 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3134 bounce
.buffer
, access_len
);
3136 qemu_vfree(bounce
.buffer
);
3137 bounce
.buffer
= NULL
;
3138 memory_region_unref(bounce
.mr
);
3139 /* Clear in_use before reading map_client_list. */
3140 qatomic_set_mb(&bounce
.in_use
, false);
3141 cpu_notify_map_clients();
3144 void *cpu_physical_memory_map(hwaddr addr
,
3148 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3149 MEMTXATTRS_UNSPECIFIED
);
3152 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3153 bool is_write
, hwaddr access_len
)
3155 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3158 #define ARG1_DECL AddressSpace *as
3161 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3162 #define RCU_READ_LOCK(...) rcu_read_lock()
3163 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3164 #include "memory_ldst.c.inc"
3166 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3172 AddressSpaceDispatch
*d
;
3180 cache
->fv
= address_space_get_flatview(as
);
3181 d
= flatview_to_dispatch(cache
->fv
);
3182 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3185 * cache->xlat is now relative to cache->mrs.mr, not to the section itself.
3186 * Take that into account to compute how many bytes are there between
3187 * cache->xlat and the end of the section.
3189 diff
= int128_sub(cache
->mrs
.size
,
3190 int128_make64(cache
->xlat
- cache
->mrs
.offset_within_region
));
3191 l
= int128_get64(int128_min(diff
, int128_make64(l
)));
3194 memory_region_ref(mr
);
3195 if (memory_access_is_direct(mr
, is_write
)) {
3196 /* We don't care about the memory attributes here as we're only
3197 * doing this if we found actual RAM, which behaves the same
3198 * regardless of attributes; so UNSPECIFIED is fine.
3200 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3201 cache
->xlat
, l
, is_write
,
3202 MEMTXATTRS_UNSPECIFIED
);
3203 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3209 cache
->is_write
= is_write
;
3213 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3217 assert(cache
->is_write
);
3218 if (likely(cache
->ptr
)) {
3219 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3223 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3225 if (!cache
->mrs
.mr
) {
3229 if (xen_enabled()) {
3230 xen_invalidate_map_cache_entry(cache
->ptr
);
3232 memory_region_unref(cache
->mrs
.mr
);
3233 flatview_unref(cache
->fv
);
3234 cache
->mrs
.mr
= NULL
;
3238 /* Called from RCU critical section. This function has the same
3239 * semantics as address_space_translate, but it only works on a
3240 * predefined range of a MemoryRegion that was mapped with
3241 * address_space_cache_init.
3243 static inline MemoryRegion
*address_space_translate_cached(
3244 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3245 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3247 MemoryRegionSection section
;
3249 IOMMUMemoryRegion
*iommu_mr
;
3250 AddressSpace
*target_as
;
3252 assert(!cache
->ptr
);
3253 *xlat
= addr
+ cache
->xlat
;
3256 iommu_mr
= memory_region_get_iommu(mr
);
3262 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3263 NULL
, is_write
, true,
3268 /* Called from RCU critical section. address_space_read_cached uses this
3269 * out of line function when the target is an MMIO or IOMMU region.
3272 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3273 void *buf
, hwaddr len
)
3279 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3280 MEMTXATTRS_UNSPECIFIED
);
3281 return flatview_read_continue(cache
->fv
,
3282 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3286 /* Called from RCU critical section. address_space_write_cached uses this
3287 * out of line function when the target is an MMIO or IOMMU region.
3290 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3291 const void *buf
, hwaddr len
)
3297 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3298 MEMTXATTRS_UNSPECIFIED
);
3299 return flatview_write_continue(cache
->fv
,
3300 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3304 #define ARG1_DECL MemoryRegionCache *cache
3306 #define SUFFIX _cached_slow
3307 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3308 #define RCU_READ_LOCK() ((void)0)
3309 #define RCU_READ_UNLOCK() ((void)0)
3310 #include "memory_ldst.c.inc"
3312 /* virtual memory access for debug (includes writing to ROM) */
3313 int cpu_memory_rw_debug(CPUState
*cpu
, vaddr addr
,
3314 void *ptr
, size_t len
, bool is_write
)
3320 cpu_synchronize_state(cpu
);
3326 page
= addr
& TARGET_PAGE_MASK
;
3327 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3328 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3329 /* if no physical page mapped, return an error */
3330 if (phys_addr
== -1)
3332 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3335 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3337 res
= address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3340 res
= address_space_read(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3343 if (res
!= MEMTX_OK
) {
3354 * Allows code that needs to deal with migration bitmaps etc to still be built
3355 * target independent.
3357 size_t qemu_target_page_size(void)
3359 return TARGET_PAGE_SIZE
;
3362 int qemu_target_page_mask(void)
3364 return TARGET_PAGE_MASK
;
3367 int qemu_target_page_bits(void)
3369 return TARGET_PAGE_BITS
;
3372 int qemu_target_page_bits_min(void)
3374 return TARGET_PAGE_BITS_MIN
;
3377 /* Convert target pages to MiB (2**20). */
3378 size_t qemu_target_pages_to_MiB(size_t pages
)
3380 int page_bits
= TARGET_PAGE_BITS
;
3382 /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */
3383 g_assert(page_bits
< 20);
3385 return pages
>> (20 - page_bits
);
3388 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3393 RCU_READ_LOCK_GUARD();
3394 mr
= address_space_translate(&address_space_memory
,
3395 phys_addr
, &phys_addr
, &l
, false,
3396 MEMTXATTRS_UNSPECIFIED
);
3398 return !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3401 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3406 RCU_READ_LOCK_GUARD();
3407 RAMBLOCK_FOREACH(block
) {
3408 ret
= func(block
, opaque
);
3417 * Unmap pages of memory from start to start+length such that
3418 * they a) read as 0, b) Trigger whatever fault mechanism
3419 * the OS provides for postcopy.
3420 * The pages must be unmapped by the end of the function.
3421 * Returns: 0 on success, none-0 on failure
3424 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3428 uint8_t *host_startaddr
= rb
->host
+ start
;
3430 if (!QEMU_PTR_IS_ALIGNED(host_startaddr
, rb
->page_size
)) {
3431 error_report("ram_block_discard_range: Unaligned start address: %p",
3436 if ((start
+ length
) <= rb
->max_length
) {
3437 bool need_madvise
, need_fallocate
;
3438 if (!QEMU_IS_ALIGNED(length
, rb
->page_size
)) {
3439 error_report("ram_block_discard_range: Unaligned length: %zx",
3444 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3446 /* The logic here is messy;
3447 * madvise DONTNEED fails for hugepages
3448 * fallocate works on hugepages and shmem
3449 * shared anonymous memory requires madvise REMOVE
3451 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3452 need_fallocate
= rb
->fd
!= -1;
3453 if (need_fallocate
) {
3454 /* For a file, this causes the area of the file to be zero'd
3455 * if read, and for hugetlbfs also causes it to be unmapped
3456 * so a userfault will trigger.
3458 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3459 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3463 error_report("ram_block_discard_range: Failed to fallocate "
3464 "%s:%" PRIx64
" +%zx (%d)",
3465 rb
->idstr
, start
, length
, ret
);
3470 error_report("ram_block_discard_range: fallocate not available/file"
3471 "%s:%" PRIx64
" +%zx (%d)",
3472 rb
->idstr
, start
, length
, ret
);
3477 /* For normal RAM this causes it to be unmapped,
3478 * for shared memory it causes the local mapping to disappear
3479 * and to fall back on the file contents (which we just
3480 * fallocate'd away).
3482 #if defined(CONFIG_MADVISE)
3483 if (qemu_ram_is_shared(rb
) && rb
->fd
< 0) {
3484 ret
= madvise(host_startaddr
, length
, QEMU_MADV_REMOVE
);
3486 ret
= madvise(host_startaddr
, length
, QEMU_MADV_DONTNEED
);
3490 error_report("ram_block_discard_range: Failed to discard range "
3491 "%s:%" PRIx64
" +%zx (%d)",
3492 rb
->idstr
, start
, length
, ret
);
3497 error_report("ram_block_discard_range: MADVISE not available"
3498 "%s:%" PRIx64
" +%zx (%d)",
3499 rb
->idstr
, start
, length
, ret
);
3503 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3504 need_madvise
, need_fallocate
, ret
);
3506 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3507 "/%zx/" RAM_ADDR_FMT
")",
3508 rb
->idstr
, start
, length
, rb
->max_length
);
3515 bool ramblock_is_pmem(RAMBlock
*rb
)
3517 return rb
->flags
& RAM_PMEM
;
3520 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
3522 if (start
== end
- 1) {
3523 qemu_printf("\t%3d ", start
);
3525 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
3527 qemu_printf(" skip=%d ", skip
);
3528 if (ptr
== PHYS_MAP_NODE_NIL
) {
3529 qemu_printf(" ptr=NIL");
3531 qemu_printf(" ptr=#%d", ptr
);
3533 qemu_printf(" ptr=[%d]", ptr
);
3538 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3539 int128_sub((size), int128_one())) : 0)
3541 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3545 qemu_printf(" Dispatch\n");
3546 qemu_printf(" Physical sections\n");
3548 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3549 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3550 const char *names
[] = { " [unassigned]", " [not dirty]",
3551 " [ROM]", " [watch]" };
3553 qemu_printf(" #%d @" HWADDR_FMT_plx
".." HWADDR_FMT_plx
3556 s
->offset_within_address_space
,
3557 s
->offset_within_address_space
+ MR_SIZE(s
->size
),
3558 s
->mr
->name
? s
->mr
->name
: "(noname)",
3559 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
3560 s
->mr
== root
? " [ROOT]" : "",
3561 s
== d
->mru_section
? " [MRU]" : "",
3562 s
->mr
->is_iommu
? " [iommu]" : "");
3565 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
3566 s
->mr
->alias
->name
: "noname");
3571 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3572 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
3573 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
3576 Node
*n
= d
->map
.nodes
+ i
;
3578 qemu_printf(" [%d]\n", i
);
3580 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
3581 PhysPageEntry
*pe
= *n
+ j
;
3583 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
3587 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3593 if (jprev
!= ARRAY_SIZE(*n
)) {
3594 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3599 /* Require any discards to work. */
3600 static unsigned int ram_block_discard_required_cnt
;
3601 /* Require only coordinated discards to work. */
3602 static unsigned int ram_block_coordinated_discard_required_cnt
;
3603 /* Disable any discards. */
3604 static unsigned int ram_block_discard_disabled_cnt
;
3605 /* Disable only uncoordinated discards. */
3606 static unsigned int ram_block_uncoordinated_discard_disabled_cnt
;
3607 static QemuMutex ram_block_discard_disable_mutex
;
3609 static void ram_block_discard_disable_mutex_lock(void)
3611 static gsize initialized
;
3613 if (g_once_init_enter(&initialized
)) {
3614 qemu_mutex_init(&ram_block_discard_disable_mutex
);
3615 g_once_init_leave(&initialized
, 1);
3617 qemu_mutex_lock(&ram_block_discard_disable_mutex
);
3620 static void ram_block_discard_disable_mutex_unlock(void)
3622 qemu_mutex_unlock(&ram_block_discard_disable_mutex
);
3625 int ram_block_discard_disable(bool state
)
3629 ram_block_discard_disable_mutex_lock();
3631 ram_block_discard_disabled_cnt
--;
3632 } else if (ram_block_discard_required_cnt
||
3633 ram_block_coordinated_discard_required_cnt
) {
3636 ram_block_discard_disabled_cnt
++;
3638 ram_block_discard_disable_mutex_unlock();
3642 int ram_block_uncoordinated_discard_disable(bool state
)
3646 ram_block_discard_disable_mutex_lock();
3648 ram_block_uncoordinated_discard_disabled_cnt
--;
3649 } else if (ram_block_discard_required_cnt
) {
3652 ram_block_uncoordinated_discard_disabled_cnt
++;
3654 ram_block_discard_disable_mutex_unlock();
3658 int ram_block_discard_require(bool state
)
3662 ram_block_discard_disable_mutex_lock();
3664 ram_block_discard_required_cnt
--;
3665 } else if (ram_block_discard_disabled_cnt
||
3666 ram_block_uncoordinated_discard_disabled_cnt
) {
3669 ram_block_discard_required_cnt
++;
3671 ram_block_discard_disable_mutex_unlock();
3675 int ram_block_coordinated_discard_require(bool state
)
3679 ram_block_discard_disable_mutex_lock();
3681 ram_block_coordinated_discard_required_cnt
--;
3682 } else if (ram_block_discard_disabled_cnt
) {
3685 ram_block_coordinated_discard_required_cnt
++;
3687 ram_block_discard_disable_mutex_unlock();
3691 bool ram_block_discard_is_disabled(void)
3693 return qatomic_read(&ram_block_discard_disabled_cnt
) ||
3694 qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt
);
3697 bool ram_block_discard_is_required(void)
3699 return qatomic_read(&ram_block_discard_required_cnt
) ||
3700 qatomic_read(&ram_block_coordinated_discard_required_cnt
);