hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/hw.h"
  16 #include "hw/arm/pxa.h"
  17 #include "hw/arm/arm.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/i2c/i2c.h"
  21 #include "hw/ssi/ssi.h"
  22 #include "hw/block/flash.h"
  23 #include "qemu/timer.h"
  24 #include "hw/devices.h"
  25 #include "hw/arm/sharpsl.h"
  26 #include "ui/console.h"
  27 #include "audio/audio.h"
  28 #include "hw/boards.h"
  29 #include "sysemu/block-backend.h"
  30 #include "hw/sysbus.h"
  31 #include "exec/address-spaces.h"
  32 #include "sysemu/sysemu.h"
  33 #include "cpu.h"
  34
  35 #undef REG_FMT
  36 #define REG_FMT                 "0x%02lx"
  37
  38 /* Spitz Flash */
  39 #define FLASH_BASE              0x0c000000
  40 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  41 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  42 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  43 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  44 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  45 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  46 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  47
  48 #define FLASHCTL_CE0            (1 << 0)
  49 #define FLASHCTL_CLE            (1 << 1)
  50 #define FLASHCTL_ALE            (1 << 2)
  51 #define FLASHCTL_WP             (1 << 3)
  52 #define FLASHCTL_CE1            (1 << 4)
  53 #define FLASHCTL_RYBY           (1 << 5)
  54 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  55
  56 #define TYPE_SL_NAND "sl-nand"
  57 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  58
  59 typedef struct {
  60     SysBusDevice parent_obj;
  61
  62     MemoryRegion iomem;
  63     DeviceState *nand;
  64     uint8_t ctl;
  65     uint8_t manf_id;
  66     uint8_t chip_id;
  67     ECCState ecc;
  68 } SLNANDState;
  69
  70 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  71 {
  72     SLNANDState *s = (SLNANDState *) opaque;
  73     int ryby;
  74
  75     switch (addr) {
  76 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  77     case FLASH_ECCLPLB:
  78         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  79                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  80
  81 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  82     case FLASH_ECCLPUB:
  83         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  84                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  85
  86     case FLASH_ECCCP:
  87         return s->ecc.cp;
  88
  89     case FLASH_ECCCNTR:
  90         return s->ecc.count & 0xff;
  91
  92     case FLASH_FLASHCTL:
  93         nand_getpins(s->nand, &ryby);
  94         if (ryby)
  95             return s->ctl | FLASHCTL_RYBY;
  96         else
  97             return s->ctl;
  98
  99     case FLASH_FLASHIO:
 100         if (size == 4) {
 101             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 102                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 103         }
 104         return ecc_digest(&s->ecc, nand_getio(s->nand));
 105
 106     default:
 107         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 108     }
 109     return 0;
 110 }
 111
 112 static void sl_write(void *opaque, hwaddr addr,
 113                      uint64_t value, unsigned size)
 114 {
 115     SLNANDState *s = (SLNANDState *) opaque;
 116
 117     switch (addr) {
 118     case FLASH_ECCCLRR:
 119         /* Value is ignored.  */
 120         ecc_reset(&s->ecc);
 121         break;
 122
 123     case FLASH_FLASHCTL:
 124         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 125         nand_setpins(s->nand,
 126                         s->ctl & FLASHCTL_CLE,
 127                         s->ctl & FLASHCTL_ALE,
 128                         s->ctl & FLASHCTL_NCE,
 129                         s->ctl & FLASHCTL_WP,
 130                         0);
 131         break;
 132
 133     case FLASH_FLASHIO:
 134         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 135         break;
 136
 137     default:
 138         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 139     }
 140 }
 141
 142 enum {
 143     FLASH_128M,
 144     FLASH_1024M,
 145 };
 146
 147 static const MemoryRegionOps sl_ops = {
 148     .read = sl_read,
 149     .write = sl_write,
 150     .endianness = DEVICE_NATIVE_ENDIAN,
 151 };
 152
 153 static void sl_flash_register(PXA2xxState *cpu, int size)
 154 {
 155     DeviceState *dev;
 156
 157     dev = qdev_create(NULL, TYPE_SL_NAND);
 158
 159     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 160     if (size == FLASH_128M)
 161         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 162     else if (size == FLASH_1024M)
 163         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 164
 165     qdev_init_nofail(dev);
 166     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 167 }
 168
 169 static void sl_nand_init(Object *obj)
 170 {
 171     SLNANDState *s = SL_NAND(obj);
 172     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 173     DriveInfo *nand;
 174
 175     s->ctl = 0;
 176     /* FIXME use a qdev drive property instead of drive_get() */
 177     nand = drive_get(IF_MTD, 0, 0);
 178     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 179                         s->manf_id, s->chip_id);
 180
 181     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 182     sysbus_init_mmio(dev, &s->iomem);
 183 }
 184
 185 /* Spitz Keyboard */
 186
 187 #define SPITZ_KEY_STROBE_NUM    11
 188 #define SPITZ_KEY_SENSE_NUM     7
 189
 190 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 191     12, 17, 91, 34, 36, 38, 39
 192 };
 193
 194 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 195     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 196 };
 197
 198 /* Eighth additional row maps the special keys */
 199 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 200     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 201     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 202     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 203     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 204     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 205     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 206     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 207     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 208 };
 209
 210 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 211 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 212 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 213 #define SPITZ_GPIO_SWA          97      /* Lid */
 214 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 215
 216 /* The special buttons are mapped to unused keys */
 217 static const int spitz_gpiomap[5] = {
 218     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 219     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 220 };
 221
 222 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 223 #define SPITZ_KEYBOARD(obj) \
 224     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 225
 226 typedef struct {
 227     SysBusDevice parent_obj;
 228
 229     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 230     qemu_irq gpiomap[5];
 231     int keymap[0x80];
 232     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 233     uint16_t strobe_state;
 234     uint16_t sense_state;
 235
 236     uint16_t pre_map[0x100];
 237     uint16_t modifiers;
 238     uint16_t imodifiers;
 239     uint8_t fifo[16];
 240     int fifopos, fifolen;
 241     QEMUTimer *kbdtimer;
 242 } SpitzKeyboardState;
 243
 244 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 245 {
 246     int i;
 247     uint16_t strobe, sense = 0;
 248     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 249         strobe = s->keyrow[i] & s->strobe_state;
 250         if (strobe) {
 251             sense |= 1 << i;
 252             if (!(s->sense_state & (1 << i)))
 253                 qemu_irq_raise(s->sense[i]);
 254         } else if (s->sense_state & (1 << i))
 255             qemu_irq_lower(s->sense[i]);
 256     }
 257
 258     s->sense_state = sense;
 259 }
 260
 261 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 262 {
 263     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 264
 265     if (level)
 266         s->strobe_state |= 1 << line;
 267     else
 268         s->strobe_state &= ~(1 << line);
 269     spitz_keyboard_sense_update(s);
 270 }
 271
 272 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 273 {
 274     int spitz_keycode = s->keymap[keycode & 0x7f];
 275     if (spitz_keycode == -1)
 276         return;
 277
 278     /* Handle the additional keys */
 279     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 280         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 281         return;
 282     }
 283
 284     if (keycode & 0x80)
 285         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 286     else
 287         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 288
 289     spitz_keyboard_sense_update(s);
 290 }
 291
 292 #define SPITZ_MOD_SHIFT   (1 << 7)
 293 #define SPITZ_MOD_CTRL    (1 << 8)
 294 #define SPITZ_MOD_FN      (1 << 9)
 295
 296 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 297
 298 static void spitz_keyboard_handler(void *opaque, int keycode)
 299 {
 300     SpitzKeyboardState *s = opaque;
 301     uint16_t code;
 302     int mapcode;
 303     switch (keycode) {
 304     case 0x2a:  /* Left Shift */
 305         s->modifiers |= 1;
 306         break;
 307     case 0xaa:
 308         s->modifiers &= ~1;
 309         break;
 310     case 0x36:  /* Right Shift */
 311         s->modifiers |= 2;
 312         break;
 313     case 0xb6:
 314         s->modifiers &= ~2;
 315         break;
 316     case 0x1d:  /* Control */
 317         s->modifiers |= 4;
 318         break;
 319     case 0x9d:
 320         s->modifiers &= ~4;
 321         break;
 322     case 0x38:  /* Alt */
 323         s->modifiers |= 8;
 324         break;
 325     case 0xb8:
 326         s->modifiers &= ~8;
 327         break;
 328     }
 329
 330     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 331             (keycode | SPITZ_MOD_SHIFT) :
 332             (keycode & ~SPITZ_MOD_SHIFT))];
 333
 334     if (code != mapcode) {
 335 #if 0
 336         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 337             QUEUE_KEY(0x2a | (keycode & 0x80));
 338         }
 339         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 340             QUEUE_KEY(0x1d | (keycode & 0x80));
 341         }
 342         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 343             QUEUE_KEY(0x38 | (keycode & 0x80));
 344         }
 345         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 346             QUEUE_KEY(0x2a | (~keycode & 0x80));
 347         }
 348         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 349             QUEUE_KEY(0x36 | (~keycode & 0x80));
 350         }
 351 #else
 352         if (keycode & 0x80) {
 353             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 354                 QUEUE_KEY(0x2a | 0x80);
 355             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 356                 QUEUE_KEY(0x1d | 0x80);
 357             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 358                 QUEUE_KEY(0x38 | 0x80);
 359             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 360                 QUEUE_KEY(0x2a);
 361             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 362                 QUEUE_KEY(0x36);
 363             s->imodifiers = 0;
 364         } else {
 365             if ((code & SPITZ_MOD_SHIFT) &&
 366                 !((s->modifiers | s->imodifiers) & 1)) {
 367                 QUEUE_KEY(0x2a);
 368                 s->imodifiers |= 1;
 369             }
 370             if ((code & SPITZ_MOD_CTRL) &&
 371                 !((s->modifiers | s->imodifiers) & 4)) {
 372                 QUEUE_KEY(0x1d);
 373                 s->imodifiers |= 4;
 374             }
 375             if ((code & SPITZ_MOD_FN) &&
 376                 !((s->modifiers | s->imodifiers) & 8)) {
 377                 QUEUE_KEY(0x38);
 378                 s->imodifiers |= 8;
 379             }
 380             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 381                             !(s->imodifiers & 0x10)) {
 382                 QUEUE_KEY(0x2a | 0x80);
 383                 s->imodifiers |= 0x10;
 384             }
 385             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 386                             !(s->imodifiers & 0x20)) {
 387                 QUEUE_KEY(0x36 | 0x80);
 388                 s->imodifiers |= 0x20;
 389             }
 390         }
 391 #endif
 392     }
 393
 394     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 395 }
 396
 397 static void spitz_keyboard_tick(void *opaque)
 398 {
 399     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 400
 401     if (s->fifolen) {
 402         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 403         s->fifolen --;
 404         if (s->fifopos >= 16)
 405             s->fifopos = 0;
 406     }
 407
 408     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 409                    NANOSECONDS_PER_SECOND / 32);
 410 }
 411
 412 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 413 {
 414     int i;
 415     for (i = 0; i < 0x100; i ++)
 416         s->pre_map[i] = i;
 417     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 418     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 419     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 420     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 421     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 422     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 423     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 424     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 425     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 426     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 427     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 428     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 429     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 430     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 431     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 432     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 433     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 434     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 435     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 436     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 437     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 438     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 439     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 440     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 441     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 442     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 443     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 444     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 445     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 446     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 447     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 448     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 449
 450     s->modifiers = 0;
 451     s->imodifiers = 0;
 452     s->fifopos = 0;
 453     s->fifolen = 0;
 454 }
 455
 456 #undef SPITZ_MOD_SHIFT
 457 #undef SPITZ_MOD_CTRL
 458 #undef SPITZ_MOD_FN
 459
 460 static int spitz_keyboard_post_load(void *opaque, int version_id)
 461 {
 462     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 463
 464     /* Release all pressed keys */
 465     memset(s->keyrow, 0, sizeof(s->keyrow));
 466     spitz_keyboard_sense_update(s);
 467     s->modifiers = 0;
 468     s->imodifiers = 0;
 469     s->fifopos = 0;
 470     s->fifolen = 0;
 471
 472     return 0;
 473 }
 474
 475 static void spitz_keyboard_register(PXA2xxState *cpu)
 476 {
 477     int i;
 478     DeviceState *dev;
 479     SpitzKeyboardState *s;
 480
 481     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 482     s = SPITZ_KEYBOARD(dev);
 483
 484     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 485         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 486
 487     for (i = 0; i < 5; i ++)
 488         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 489
 490     if (!graphic_rotate)
 491         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 492
 493     for (i = 0; i < 5; i++)
 494         qemu_set_irq(s->gpiomap[i], 0);
 495
 496     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 497         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 498                 qdev_get_gpio_in(dev, i));
 499
 500     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 501
 502     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 503 }
 504
 505 static void spitz_keyboard_init(Object *obj)
 506 {
 507     DeviceState *dev = DEVICE(obj);
 508     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 509     int i, j;
 510
 511     for (i = 0; i < 0x80; i ++)
 512         s->keymap[i] = -1;
 513     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 514         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 515             if (spitz_keymap[i][j] != -1)
 516                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 517
 518     spitz_keyboard_pre_map(s);
 519
 520     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 521     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 522     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 523 }
 524
 525 /* LCD backlight controller */
 526
 527 #define LCDTG_RESCTL    0x00
 528 #define LCDTG_PHACTRL   0x01
 529 #define LCDTG_DUTYCTRL  0x02
 530 #define LCDTG_POWERREG0 0x03
 531 #define LCDTG_POWERREG1 0x04
 532 #define LCDTG_GPOR3     0x05
 533 #define LCDTG_PICTRL    0x06
 534 #define LCDTG_POLCTRL   0x07
 535
 536 typedef struct {
 537     SSISlave ssidev;
 538     uint32_t bl_intensity;
 539     uint32_t bl_power;
 540 } SpitzLCDTG;
 541
 542 static void spitz_bl_update(SpitzLCDTG *s)
 543 {
 544     if (s->bl_power && s->bl_intensity)
 545         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 546     else
 547         zaurus_printf("LCD Backlight now off\n");
 548 }
 549
 550 /* FIXME: Implement GPIO properly and remove this hack.  */
 551 static SpitzLCDTG *spitz_lcdtg;
 552
 553 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 554 {
 555     SpitzLCDTG *s = spitz_lcdtg;
 556     int prev = s->bl_intensity;
 557
 558     if (level)
 559         s->bl_intensity &= ~0x20;
 560     else
 561         s->bl_intensity |= 0x20;
 562
 563     if (s->bl_power && prev != s->bl_intensity)
 564         spitz_bl_update(s);
 565 }
 566
 567 static inline void spitz_bl_power(void *opaque, int line, int level)
 568 {
 569     SpitzLCDTG *s = spitz_lcdtg;
 570     s->bl_power = !!level;
 571     spitz_bl_update(s);
 572 }
 573
 574 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 575 {
 576     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 577     int addr;
 578     addr = value >> 5;
 579     value &= 0x1f;
 580
 581     switch (addr) {
 582     case LCDTG_RESCTL:
 583         if (value)
 584             zaurus_printf("LCD in QVGA mode\n");
 585         else
 586             zaurus_printf("LCD in VGA mode\n");
 587         break;
 588
 589     case LCDTG_DUTYCTRL:
 590         s->bl_intensity &= ~0x1f;
 591         s->bl_intensity |= value;
 592         if (s->bl_power)
 593             spitz_bl_update(s);
 594         break;
 595
 596     case LCDTG_POWERREG0:
 597         /* Set common voltage to M62332FP */
 598         break;
 599     }
 600     return 0;
 601 }
 602
 603 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
 604 {
 605     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 606
 607     spitz_lcdtg = s;
 608     s->bl_power = 0;
 609     s->bl_intensity = 0x20;
 610 }
 611
 612 /* SSP devices */
 613
 614 #define CORGI_SSP_PORT          2
 615
 616 #define SPITZ_GPIO_LCDCON_CS    53
 617 #define SPITZ_GPIO_ADS7846_CS   14
 618 #define SPITZ_GPIO_MAX1111_CS   20
 619 #define SPITZ_GPIO_TP_INT       11
 620
 621 static DeviceState *max1111;
 622
 623 /* "Demux" the signal based on current chipselect */
 624 typedef struct {
 625     SSISlave ssidev;
 626     SSIBus *bus[3];
 627     uint32_t enable[3];
 628 } CorgiSSPState;
 629
 630 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 631 {
 632     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 633     int i;
 634
 635     for (i = 0; i < 3; i++) {
 636         if (s->enable[i]) {
 637             return ssi_transfer(s->bus[i], value);
 638         }
 639     }
 640     return 0;
 641 }
 642
 643 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 644 {
 645     CorgiSSPState *s = (CorgiSSPState *)opaque;
 646     assert(line >= 0 && line < 3);
 647     s->enable[line] = !level;
 648 }
 649
 650 #define MAX1111_BATT_VOLT       1
 651 #define MAX1111_BATT_TEMP       2
 652 #define MAX1111_ACIN_VOLT       3
 653
 654 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 655 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 656 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 657
 658 static void spitz_adc_temp_on(void *opaque, int line, int level)
 659 {
 660     if (!max1111)
 661         return;
 662
 663     if (level)
 664         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 665     else
 666         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 667 }
 668
 669 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 670 {
 671     DeviceState *dev = DEVICE(d);
 672     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 673
 674     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 675     s->bus[0] = ssi_create_bus(dev, "ssi0");
 676     s->bus[1] = ssi_create_bus(dev, "ssi1");
 677     s->bus[2] = ssi_create_bus(dev, "ssi2");
 678 }
 679
 680 static void spitz_ssp_attach(PXA2xxState *cpu)
 681 {
 682     DeviceState *mux;
 683     DeviceState *dev;
 684     void *bus;
 685
 686     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 687
 688     bus = qdev_get_child_bus(mux, "ssi0");
 689     ssi_create_slave(bus, "spitz-lcdtg");
 690
 691     bus = qdev_get_child_bus(mux, "ssi1");
 692     dev = ssi_create_slave(bus, "ads7846");
 693     qdev_connect_gpio_out(dev, 0,
 694                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 695
 696     bus = qdev_get_child_bus(mux, "ssi2");
 697     max1111 = ssi_create_slave(bus, "max1111");
 698     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 699     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 700     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 701
 702     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 703                         qdev_get_gpio_in(mux, 0));
 704     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 705                         qdev_get_gpio_in(mux, 1));
 706     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 707                         qdev_get_gpio_in(mux, 2));
 708 }
 709
 710 /* CF Microdrive */
 711
 712 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 713 {
 714     PCMCIACardState *md;
 715     DriveInfo *dinfo;
 716
 717     dinfo = drive_get(IF_IDE, 0, 0);
 718     if (!dinfo || dinfo->media_cd)
 719         return;
 720     md = dscm1xxxx_init(dinfo);
 721     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 722 }
 723
 724 /* Wm8750 and Max7310 on I2C */
 725
 726 #define AKITA_MAX_ADDR  0x18
 727 #define SPITZ_WM_ADDRL  0x1b
 728 #define SPITZ_WM_ADDRH  0x1a
 729
 730 #define SPITZ_GPIO_WM   5
 731
 732 static void spitz_wm8750_addr(void *opaque, int line, int level)
 733 {
 734     I2CSlave *wm = (I2CSlave *) opaque;
 735     if (level)
 736         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 737     else
 738         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 739 }
 740
 741 static void spitz_i2c_setup(PXA2xxState *cpu)
 742 {
 743     /* Attach the CPU on one end of our I2C bus.  */
 744     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 745
 746     DeviceState *wm;
 747
 748     /* Attach a WM8750 to the bus */
 749     wm = i2c_create_slave(bus, "wm8750", 0);
 750
 751     spitz_wm8750_addr(wm, 0, 0);
 752     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 753                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 754     /* .. and to the sound interface.  */
 755     cpu->i2s->opaque = wm;
 756     cpu->i2s->codec_out = wm8750_dac_dat;
 757     cpu->i2s->codec_in = wm8750_adc_dat;
 758     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 759 }
 760
 761 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 762 {
 763     /* Attach a Max7310 to Akita I2C bus.  */
 764     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 765                      AKITA_MAX_ADDR);
 766 }
 767
 768 /* Other peripherals */
 769
 770 static void spitz_out_switch(void *opaque, int line, int level)
 771 {
 772     switch (line) {
 773     case 0:
 774         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 775         break;
 776     case 1:
 777         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 778         break;
 779     case 2:
 780         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 781         break;
 782     case 3:
 783         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 784         break;
 785     case 4:
 786         spitz_bl_bit5(opaque, line, level);
 787         break;
 788     case 5:
 789         spitz_bl_power(opaque, line, level);
 790         break;
 791     case 6:
 792         spitz_adc_temp_on(opaque, line, level);
 793         break;
 794     }
 795 }
 796
 797 #define SPITZ_SCP_LED_GREEN             1
 798 #define SPITZ_SCP_JK_B                  2
 799 #define SPITZ_SCP_CHRG_ON               3
 800 #define SPITZ_SCP_MUTE_L                4
 801 #define SPITZ_SCP_MUTE_R                5
 802 #define SPITZ_SCP_CF_POWER              6
 803 #define SPITZ_SCP_LED_ORANGE            7
 804 #define SPITZ_SCP_JK_A                  8
 805 #define SPITZ_SCP_ADC_TEMP_ON           9
 806 #define SPITZ_SCP2_IR_ON                1
 807 #define SPITZ_SCP2_AKIN_PULLUP          2
 808 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 809 #define SPITZ_SCP2_BACKLIGHT_ON         8
 810 #define SPITZ_SCP2_MIC_BIAS             9
 811
 812 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 813                 DeviceState *scp0, DeviceState *scp1)
 814 {
 815     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 816
 817     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 818     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 819     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 820     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 821
 822     if (scp1) {
 823         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 824         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 825     }
 826
 827     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 828 }
 829
 830 #define SPITZ_GPIO_HSYNC                22
 831 #define SPITZ_GPIO_SD_DETECT            9
 832 #define SPITZ_GPIO_SD_WP                81
 833 #define SPITZ_GPIO_ON_RESET             89
 834 #define SPITZ_GPIO_BAT_COVER            90
 835 #define SPITZ_GPIO_CF1_IRQ              105
 836 #define SPITZ_GPIO_CF1_CD               94
 837 #define SPITZ_GPIO_CF2_IRQ              106
 838 #define SPITZ_GPIO_CF2_CD               93
 839
 840 static int spitz_hsync;
 841
 842 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 843 {
 844     PXA2xxState *cpu = (PXA2xxState *) opaque;
 845     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 846     spitz_hsync ^= 1;
 847 }
 848
 849 static void spitz_reset(void *opaque, int line, int level)
 850 {
 851     if (level) {
 852         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 853     }
 854 }
 855
 856 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 857 {
 858     qemu_irq lcd_hsync;
 859     qemu_irq reset;
 860
 861     /*
 862      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 863      * read to satisfy broken guests that poll-wait for hsync.
 864      * Simulating a real hsync event would be less practical and
 865      * wouldn't guarantee that a guest ever exits the loop.
 866      */
 867     spitz_hsync = 0;
 868     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 869     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 870     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 871
 872     /* MMC/SD host */
 873     pxa2xx_mmci_handlers(cpu->mmc,
 874                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 875                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 876
 877     /* Battery lock always closed */
 878     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 879
 880     /* Handle reset */
 881     reset = qemu_allocate_irq(spitz_reset, cpu, 0);
 882     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
 883
 884     /* PCMCIA signals: card's IRQ and Card-Detect */
 885     if (slots >= 1)
 886         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 887                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 888                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 889     if (slots >= 2)
 890         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 891                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 892                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 893 }
 894
 895 /* Board init.  */
 896 enum spitz_model_e { spitz, akita, borzoi, terrier };
 897
 898 #define SPITZ_RAM       0x04000000
 899 #define SPITZ_ROM       0x00800000
 900
 901 static struct arm_boot_info spitz_binfo = {
 902     .loader_start = PXA2XX_SDRAM_BASE,
 903     .ram_size = 0x04000000,
 904 };
 905
 906 static void spitz_common_init(MachineState *machine,
 907                               enum spitz_model_e model, int arm_id)
 908 {
 909     PXA2xxState *mpu;
 910     DeviceState *scp0, *scp1 = NULL;
 911     MemoryRegion *address_space_mem = get_system_memory();
 912     MemoryRegion *rom = g_new(MemoryRegion, 1);
 913
 914     /* Setup CPU & memory */
 915     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
 916                       machine->cpu_type);
 917
 918     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 919
 920     memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
 921     memory_region_set_readonly(rom, true);
 922     memory_region_add_subregion(address_space_mem, 0, rom);
 923
 924     /* Setup peripherals */
 925     spitz_keyboard_register(mpu);
 926
 927     spitz_ssp_attach(mpu);
 928
 929     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 930     if (model != akita) {
 931         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 932     }
 933
 934     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 935
 936     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 937
 938     spitz_i2c_setup(mpu);
 939
 940     if (model == akita)
 941         spitz_akita_i2c_setup(mpu);
 942
 943     if (model == terrier)
 944         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 945         spitz_microdrive_attach(mpu, 1);
 946     else if (model != akita)
 947         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 948         spitz_microdrive_attach(mpu, 0);
 949
 950     spitz_binfo.kernel_filename = machine->kernel_filename;
 951     spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
 952     spitz_binfo.initrd_filename = machine->initrd_filename;
 953     spitz_binfo.board_id = arm_id;
 954     arm_load_kernel(mpu->cpu, &spitz_binfo);
 955     sl_bootparam_write(SL_PXA_PARAM_BASE);
 956 }
 957
 958 static void spitz_init(MachineState *machine)
 959 {
 960     spitz_common_init(machine, spitz, 0x2c9);
 961 }
 962
 963 static void borzoi_init(MachineState *machine)
 964 {
 965     spitz_common_init(machine, borzoi, 0x33f);
 966 }
 967
 968 static void akita_init(MachineState *machine)
 969 {
 970     spitz_common_init(machine, akita, 0x2e8);
 971 }
 972
 973 static void terrier_init(MachineState *machine)
 974 {
 975     spitz_common_init(machine, terrier, 0x33f);
 976 }
 977
 978 static void akitapda_class_init(ObjectClass *oc, void *data)
 979 {
 980     MachineClass *mc = MACHINE_CLASS(oc);
 981
 982     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
 983     mc->init = akita_init;
 984     mc->ignore_memory_transaction_failures = true;
 985     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
 986 }
 987
 988 static const TypeInfo akitapda_type = {
 989     .name = MACHINE_TYPE_NAME("akita"),
 990     .parent = TYPE_MACHINE,
 991     .class_init = akitapda_class_init,
 992 };
 993
 994 static void spitzpda_class_init(ObjectClass *oc, void *data)
 995 {
 996     MachineClass *mc = MACHINE_CLASS(oc);
 997
 998     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
 999     mc->init = spitz_init;
1000     mc->block_default_type = IF_IDE;
1001     mc->ignore_memory_transaction_failures = true;
1002     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1003 }
1004
1005 static const TypeInfo spitzpda_type = {
1006     .name = MACHINE_TYPE_NAME("spitz"),
1007     .parent = TYPE_MACHINE,
1008     .class_init = spitzpda_class_init,
1009 };
1010
1011 static void borzoipda_class_init(ObjectClass *oc, void *data)
1012 {
1013     MachineClass *mc = MACHINE_CLASS(oc);
1014
1015     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1016     mc->init = borzoi_init;
1017     mc->block_default_type = IF_IDE;
1018     mc->ignore_memory_transaction_failures = true;
1019     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1020 }
1021
1022 static const TypeInfo borzoipda_type = {
1023     .name = MACHINE_TYPE_NAME("borzoi"),
1024     .parent = TYPE_MACHINE,
1025     .class_init = borzoipda_class_init,
1026 };
1027
1028 static void terrierpda_class_init(ObjectClass *oc, void *data)
1029 {
1030     MachineClass *mc = MACHINE_CLASS(oc);
1031
1032     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1033     mc->init = terrier_init;
1034     mc->block_default_type = IF_IDE;
1035     mc->ignore_memory_transaction_failures = true;
1036     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1037 }
1038
1039 static const TypeInfo terrierpda_type = {
1040     .name = MACHINE_TYPE_NAME("terrier"),
1041     .parent = TYPE_MACHINE,
1042     .class_init = terrierpda_class_init,
1043 };
1044
1045 static void spitz_machine_init(void)
1046 {
1047     type_register_static(&akitapda_type);
1048     type_register_static(&spitzpda_type);
1049     type_register_static(&borzoipda_type);
1050     type_register_static(&terrierpda_type);
1051 }
1052
1053 type_init(spitz_machine_init)
1054
1055 static bool is_version_0(void *opaque, int version_id)
1056 {
1057     return version_id == 0;
1058 }
1059
1060 static VMStateDescription vmstate_sl_nand_info = {
1061     .name = "sl-nand",
1062     .version_id = 0,
1063     .minimum_version_id = 0,
1064     .fields = (VMStateField[]) {
1065         VMSTATE_UINT8(ctl, SLNANDState),
1066         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1067         VMSTATE_END_OF_LIST(),
1068     },
1069 };
1070
1071 static Property sl_nand_properties[] = {
1072     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1073     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1074     DEFINE_PROP_END_OF_LIST(),
1075 };
1076
1077 static void sl_nand_class_init(ObjectClass *klass, void *data)
1078 {
1079     DeviceClass *dc = DEVICE_CLASS(klass);
1080
1081     dc->vmsd = &vmstate_sl_nand_info;
1082     dc->props = sl_nand_properties;
1083     /* Reason: init() method uses drive_get() */
1084     dc->user_creatable = false;
1085 }
1086
1087 static const TypeInfo sl_nand_info = {
1088     .name          = TYPE_SL_NAND,
1089     .parent        = TYPE_SYS_BUS_DEVICE,
1090     .instance_size = sizeof(SLNANDState),
1091     .instance_init = sl_nand_init,
1092     .class_init    = sl_nand_class_init,
1093 };
1094
1095 static VMStateDescription vmstate_spitz_kbd = {
1096     .name = "spitz-keyboard",
1097     .version_id = 1,
1098     .minimum_version_id = 0,
1099     .post_load = spitz_keyboard_post_load,
1100     .fields = (VMStateField[]) {
1101         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1102         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1103         VMSTATE_UNUSED_TEST(is_version_0, 5),
1104         VMSTATE_END_OF_LIST(),
1105     },
1106 };
1107
1108 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1109 {
1110     DeviceClass *dc = DEVICE_CLASS(klass);
1111
1112     dc->vmsd = &vmstate_spitz_kbd;
1113 }
1114
1115 static const TypeInfo spitz_keyboard_info = {
1116     .name          = TYPE_SPITZ_KEYBOARD,
1117     .parent        = TYPE_SYS_BUS_DEVICE,
1118     .instance_size = sizeof(SpitzKeyboardState),
1119     .instance_init = spitz_keyboard_init,
1120     .class_init    = spitz_keyboard_class_init,
1121 };
1122
1123 static const VMStateDescription vmstate_corgi_ssp_regs = {
1124     .name = "corgi-ssp",
1125     .version_id = 2,
1126     .minimum_version_id = 2,
1127     .fields = (VMStateField[]) {
1128         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1129         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1130         VMSTATE_END_OF_LIST(),
1131     }
1132 };
1133
1134 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1135 {
1136     DeviceClass *dc = DEVICE_CLASS(klass);
1137     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1138
1139     k->realize = corgi_ssp_realize;
1140     k->transfer = corgi_ssp_transfer;
1141     dc->vmsd = &vmstate_corgi_ssp_regs;
1142 }
1143
1144 static const TypeInfo corgi_ssp_info = {
1145     .name          = "corgi-ssp",
1146     .parent        = TYPE_SSI_SLAVE,
1147     .instance_size = sizeof(CorgiSSPState),
1148     .class_init    = corgi_ssp_class_init,
1149 };
1150
1151 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1152     .name = "spitz-lcdtg",
1153     .version_id = 1,
1154     .minimum_version_id = 1,
1155     .fields = (VMStateField[]) {
1156         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1157         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1158         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1159         VMSTATE_END_OF_LIST(),
1160     }
1161 };
1162
1163 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1164 {
1165     DeviceClass *dc = DEVICE_CLASS(klass);
1166     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1167
1168     k->realize = spitz_lcdtg_realize;
1169     k->transfer = spitz_lcdtg_transfer;
1170     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1171 }
1172
1173 static const TypeInfo spitz_lcdtg_info = {
1174     .name          = "spitz-lcdtg",
1175     .parent        = TYPE_SSI_SLAVE,
1176     .instance_size = sizeof(SpitzLCDTG),
1177     .class_init    = spitz_lcdtg_class_init,
1178 };
1179
1180 static void spitz_register_types(void)
1181 {
1182     type_register_static(&corgi_ssp_info);
1183     type_register_static(&spitz_lcdtg_info);
1184     type_register_static(&spitz_keyboard_info);
1185     type_register_static(&sl_nand_info);
1186 }
1187
1188 type_init(spitz_register_types)