2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
28 #include "sysemu/numa.h"
30 #include "hw/fw-path-provider.h"
33 #include "sysemu/device_tree.h"
34 #include "sysemu/block-backend.h"
35 #include "sysemu/cpus.h"
36 #include "sysemu/kvm.h"
37 #include "sysemu/device_tree.h"
39 #include "migration/migration.h"
40 #include "mmu-hash64.h"
43 #include "hw/boards.h"
44 #include "hw/ppc/ppc.h"
45 #include "hw/loader.h"
47 #include "hw/ppc/spapr.h"
48 #include "hw/ppc/spapr_vio.h"
49 #include "hw/pci-host/spapr.h"
50 #include "hw/ppc/xics.h"
51 #include "hw/pci/msi.h"
53 #include "hw/pci/pci.h"
54 #include "hw/scsi/scsi.h"
55 #include "hw/virtio/virtio-scsi.h"
57 #include "exec/address-spaces.h"
59 #include "qemu/config-file.h"
60 #include "qemu/error-report.h"
64 #include "hw/compat.h"
65 #include "qemu-common.h"
69 /* SLOF memory layout:
71 * SLOF raw image loaded at 0, copies its romfs right below the flat
72 * device-tree, then position SLOF itself 31M below that
74 * So we set FW_OVERHEAD to 40MB which should account for all of that
77 * We load our kernel at 4M, leaving space for SLOF initial image
79 #define FDT_MAX_SIZE 0x100000
80 #define RTAS_MAX_SIZE 0x10000
81 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
82 #define FW_MAX_SIZE 0x400000
83 #define FW_FILE_NAME "slof.bin"
84 #define FW_OVERHEAD 0x2800000
85 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
87 #define MIN_RMA_SLOF 128UL
89 #define TIMEBASE_FREQ 512000000ULL
91 #define PHANDLE_XICP 0x00001111
93 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
95 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
96 int nr_irqs
, Error
**errp
)
101 dev
= qdev_create(NULL
, type
);
102 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
103 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
104 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
106 error_propagate(errp
, err
);
107 object_unparent(OBJECT(dev
));
110 return XICS_COMMON(dev
);
113 static XICSState
*xics_system_init(MachineState
*machine
,
114 int nr_servers
, int nr_irqs
)
116 XICSState
*icp
= NULL
;
121 if (machine_kernel_irqchip_allowed(machine
)) {
122 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
, &err
);
124 if (machine_kernel_irqchip_required(machine
) && !icp
) {
125 error_report("kernel_irqchip requested but unavailable: %s",
126 error_get_pretty(err
));
131 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
, &error_abort
);
137 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
141 uint32_t servers_prop
[smt_threads
];
142 uint32_t gservers_prop
[smt_threads
* 2];
143 int index
= ppc_get_vcpu_dt_id(cpu
);
145 if (cpu
->cpu_version
) {
146 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
152 /* Build interrupt servers and gservers properties */
153 for (i
= 0; i
< smt_threads
; i
++) {
154 servers_prop
[i
] = cpu_to_be32(index
+ i
);
155 /* Hack, direct the group queues back to cpu 0 */
156 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
157 gservers_prop
[i
*2 + 1] = 0;
159 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
160 servers_prop
, sizeof(servers_prop
));
164 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
165 gservers_prop
, sizeof(gservers_prop
));
170 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, CPUState
*cs
)
173 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
174 int index
= ppc_get_vcpu_dt_id(cpu
);
175 uint32_t associativity
[] = {cpu_to_be32(0x5),
179 cpu_to_be32(cs
->numa_node
),
182 /* Advertise NUMA via ibm,associativity */
183 if (nb_numa_nodes
> 1) {
184 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
185 sizeof(associativity
));
191 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
193 int ret
= 0, offset
, cpus_offset
;
196 int smt
= kvmppc_smt_threads();
197 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
200 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
201 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
202 int index
= ppc_get_vcpu_dt_id(cpu
);
204 if ((index
% smt
) != 0) {
208 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
210 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
211 if (cpus_offset
< 0) {
212 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
214 if (cpus_offset
< 0) {
218 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
220 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
226 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
227 pft_size_prop
, sizeof(pft_size_prop
));
232 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
);
237 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
238 ppc_get_compat_smt_threads(cpu
));
247 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
250 size_t maxcells
= maxsize
/ sizeof(uint32_t);
254 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
255 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
257 if (!sps
->page_shift
) {
260 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
261 if (sps
->enc
[count
].page_shift
== 0) {
265 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
268 *(p
++) = cpu_to_be32(sps
->page_shift
);
269 *(p
++) = cpu_to_be32(sps
->slb_enc
);
270 *(p
++) = cpu_to_be32(count
);
271 for (j
= 0; j
< count
; j
++) {
272 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
273 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
277 return (p
- prop
) * sizeof(uint32_t);
280 static hwaddr
spapr_node0_size(void)
282 MachineState
*machine
= MACHINE(qdev_get_machine());
286 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
287 if (numa_info
[i
].node_mem
) {
288 return MIN(pow2floor(numa_info
[i
].node_mem
),
293 return machine
->ram_size
;
300 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
301 #exp, fdt_strerror(ret)); \
306 static void add_str(GString
*s
, const gchar
*s1
)
308 g_string_append_len(s
, s1
, strlen(s1
) + 1);
311 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
315 const char *kernel_cmdline
,
319 uint32_t start_prop
= cpu_to_be32(initrd_base
);
320 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
321 GString
*hypertas
= g_string_sized_new(256);
322 GString
*qemu_hypertas
= g_string_sized_new(256);
323 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
324 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(max_cpus
)};
325 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
328 add_str(hypertas
, "hcall-pft");
329 add_str(hypertas
, "hcall-term");
330 add_str(hypertas
, "hcall-dabr");
331 add_str(hypertas
, "hcall-interrupt");
332 add_str(hypertas
, "hcall-tce");
333 add_str(hypertas
, "hcall-vio");
334 add_str(hypertas
, "hcall-splpar");
335 add_str(hypertas
, "hcall-bulk");
336 add_str(hypertas
, "hcall-set-mode");
337 add_str(qemu_hypertas
, "hcall-memop1");
339 fdt
= g_malloc0(FDT_MAX_SIZE
);
340 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
343 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
346 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
348 _FDT((fdt_finish_reservemap(fdt
)));
351 _FDT((fdt_begin_node(fdt
, "")));
352 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
353 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
354 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
357 * Add info to guest to indentify which host is it being run on
358 * and what is the uuid of the guest
360 if (kvmppc_get_host_model(&buf
)) {
361 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
364 if (kvmppc_get_host_serial(&buf
)) {
365 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
369 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
370 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
371 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
372 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
373 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
374 qemu_uuid
[14], qemu_uuid
[15]);
376 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
379 if (qemu_get_vm_name()) {
380 _FDT((fdt_property_string(fdt
, "ibm,partition-name",
381 qemu_get_vm_name())));
384 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
385 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
388 _FDT((fdt_begin_node(fdt
, "chosen")));
390 /* Set Form1_affinity */
391 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
393 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
394 _FDT((fdt_property(fdt
, "linux,initrd-start",
395 &start_prop
, sizeof(start_prop
))));
396 _FDT((fdt_property(fdt
, "linux,initrd-end",
397 &end_prop
, sizeof(end_prop
))));
399 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
400 cpu_to_be64(kernel_size
) };
402 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
404 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
408 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
410 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
411 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
412 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
414 _FDT((fdt_end_node(fdt
)));
417 _FDT((fdt_begin_node(fdt
, "rtas")));
419 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
420 add_str(hypertas
, "hcall-multi-tce");
422 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
424 g_string_free(hypertas
, TRUE
);
425 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
426 qemu_hypertas
->len
)));
427 g_string_free(qemu_hypertas
, TRUE
);
429 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
430 refpoints
, sizeof(refpoints
))));
432 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
433 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
434 RTAS_EVENT_SCAN_RATE
)));
437 _FDT((fdt_property(fdt
, "ibm,change-msix-capable", NULL
, 0)));
441 * According to PAPR, rtas ibm,os-term does not guarantee a return
442 * back to the guest cpu.
444 * While an additional ibm,extended-os-term property indicates that
445 * rtas call return will always occur. Set this property.
447 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
449 _FDT((fdt_end_node(fdt
)));
451 /* interrupt controller */
452 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
454 _FDT((fdt_property_string(fdt
, "device_type",
455 "PowerPC-External-Interrupt-Presentation")));
456 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
457 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
458 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
459 interrupt_server_ranges_prop
,
460 sizeof(interrupt_server_ranges_prop
))));
461 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
462 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
463 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
465 _FDT((fdt_end_node(fdt
)));
468 _FDT((fdt_begin_node(fdt
, "vdevice")));
470 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
471 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
472 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
473 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
474 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
475 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
477 _FDT((fdt_end_node(fdt
)));
480 spapr_events_fdt_skel(fdt
, epow_irq
);
482 /* /hypervisor node */
484 uint8_t hypercall
[16];
486 /* indicate KVM hypercall interface */
487 _FDT((fdt_begin_node(fdt
, "hypervisor")));
488 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
489 if (kvmppc_has_cap_fixup_hcalls()) {
491 * Older KVM versions with older guest kernels were broken with the
492 * magic page, don't allow the guest to map it.
494 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
496 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
497 sizeof(hypercall
))));
499 _FDT((fdt_end_node(fdt
)));
502 _FDT((fdt_end_node(fdt
))); /* close root node */
503 _FDT((fdt_finish(fdt
)));
508 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
511 uint32_t associativity
[] = {
512 cpu_to_be32(0x4), /* length */
513 cpu_to_be32(0x0), cpu_to_be32(0x0),
514 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
517 uint64_t mem_reg_property
[2];
520 mem_reg_property
[0] = cpu_to_be64(start
);
521 mem_reg_property
[1] = cpu_to_be64(size
);
523 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
524 off
= fdt_add_subnode(fdt
, 0, mem_name
);
526 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
527 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
528 sizeof(mem_reg_property
))));
529 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
530 sizeof(associativity
))));
534 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
536 MachineState
*machine
= MACHINE(spapr
);
537 hwaddr mem_start
, node_size
;
538 int i
, nb_nodes
= nb_numa_nodes
;
539 NodeInfo
*nodes
= numa_info
;
542 /* No NUMA nodes, assume there is just one node with whole RAM */
543 if (!nb_numa_nodes
) {
545 ramnode
.node_mem
= machine
->ram_size
;
549 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
550 if (!nodes
[i
].node_mem
) {
553 if (mem_start
>= machine
->ram_size
) {
556 node_size
= nodes
[i
].node_mem
;
557 if (node_size
> machine
->ram_size
- mem_start
) {
558 node_size
= machine
->ram_size
- mem_start
;
562 /* ppc_spapr_init() checks for rma_size <= node0_size already */
563 mem_start
+= spapr
->rma_size
;
564 node_size
-= spapr
->rma_size
;
566 for ( ; node_size
; ) {
567 hwaddr sizetmp
= pow2floor(node_size
);
569 /* mem_start != 0 here */
570 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
571 sizetmp
= 1ULL << ctzl(mem_start
);
574 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
575 node_size
-= sizetmp
;
576 mem_start
+= sizetmp
;
583 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
584 sPAPRMachineState
*spapr
)
586 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
587 CPUPPCState
*env
= &cpu
->env
;
588 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
589 int index
= ppc_get_vcpu_dt_id(cpu
);
590 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
591 0xffffffff, 0xffffffff};
592 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
593 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
594 uint32_t page_sizes_prop
[64];
595 size_t page_sizes_prop_size
;
596 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
597 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
599 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
600 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
602 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
603 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
604 env
->dcache_line_size
)));
605 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
606 env
->dcache_line_size
)));
607 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
608 env
->icache_line_size
)));
609 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
610 env
->icache_line_size
)));
612 if (pcc
->l1_dcache_size
) {
613 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
614 pcc
->l1_dcache_size
)));
616 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
618 if (pcc
->l1_icache_size
) {
619 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
620 pcc
->l1_icache_size
)));
622 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
625 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
626 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
627 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
628 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
629 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
631 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
632 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
635 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
636 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
637 segs
, sizeof(segs
))));
640 /* Advertise VMX/VSX (vector extensions) if available
641 * 0 / no property == no vector extensions
642 * 1 == VMX / Altivec available
643 * 2 == VSX available */
644 if (env
->insns_flags
& PPC_ALTIVEC
) {
645 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
647 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
650 /* Advertise DFP (Decimal Floating Point) if available
651 * 0 / no property == no DFP
652 * 1 == DFP available */
653 if (env
->insns_flags2
& PPC2_DFP
) {
654 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
657 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
658 sizeof(page_sizes_prop
));
659 if (page_sizes_prop_size
) {
660 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
661 page_sizes_prop
, page_sizes_prop_size
)));
664 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
665 cs
->cpu_index
/ vcpus_per_socket
)));
667 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
668 pft_size_prop
, sizeof(pft_size_prop
))));
670 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
));
672 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
673 ppc_get_compat_smt_threads(cpu
)));
676 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
681 int smt
= kvmppc_smt_threads();
683 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
685 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
686 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
689 * We walk the CPUs in reverse order to ensure that CPU DT nodes
690 * created by fdt_add_subnode() end up in the right order in FDT
691 * for the guest kernel the enumerate the CPUs correctly.
693 CPU_FOREACH_REVERSE(cs
) {
694 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
695 int index
= ppc_get_vcpu_dt_id(cpu
);
696 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
699 if ((index
% smt
) != 0) {
703 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
704 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
707 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
713 * Adds ibm,dynamic-reconfiguration-memory node.
714 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
715 * of this device tree node.
717 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
719 MachineState
*machine
= MACHINE(spapr
);
721 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
722 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
723 uint32_t nr_rma_lmbs
= spapr
->rma_size
/lmb_size
;
724 uint32_t nr_lmbs
= machine
->maxram_size
/lmb_size
- nr_rma_lmbs
;
725 uint32_t nr_assigned_lmbs
= machine
->ram_size
/lmb_size
- nr_rma_lmbs
;
726 uint32_t *int_buf
, *cur_index
, buf_len
;
728 /* Allocate enough buffer size to fit in ibm,dynamic-memory */
729 buf_len
= nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
* sizeof(uint32_t) +
731 cur_index
= int_buf
= g_malloc0(buf_len
);
733 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
735 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
736 sizeof(prop_lmb_size
));
741 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
746 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
751 /* ibm,dynamic-memory */
752 int_buf
[0] = cpu_to_be32(nr_lmbs
);
754 for (i
= 0; i
< nr_lmbs
; i
++) {
755 sPAPRDRConnector
*drc
;
756 sPAPRDRConnectorClass
*drck
;
758 uint32_t *dynamic_memory
= cur_index
;
760 if (i
< nr_assigned_lmbs
) {
761 addr
= (i
+ nr_rma_lmbs
) * lmb_size
;
763 addr
= (i
- nr_assigned_lmbs
) * lmb_size
+
764 spapr
->hotplug_memory
.base
;
766 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
769 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
771 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
772 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
773 dynamic_memory
[2] = cpu_to_be32(drck
->get_index(drc
));
774 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
775 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
776 if (addr
< machine
->ram_size
||
777 memory_region_present(get_system_memory(), addr
)) {
778 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
780 dynamic_memory
[5] = cpu_to_be32(0);
783 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
785 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
790 /* ibm,associativity-lookup-arrays */
792 int_buf
[0] = cpu_to_be32(nb_numa_nodes
);
793 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
795 for (i
= 0; i
< nb_numa_nodes
; i
++) {
796 uint32_t associativity
[] = {
802 memcpy(cur_index
, associativity
, sizeof(associativity
));
805 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
806 (cur_index
- int_buf
) * sizeof(uint32_t));
812 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
813 target_ulong addr
, target_ulong size
,
814 bool cpu_update
, bool memory_update
)
816 void *fdt
, *fdt_skel
;
817 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
818 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
822 /* Create sceleton */
823 fdt_skel
= g_malloc0(size
);
824 _FDT((fdt_create(fdt_skel
, size
)));
825 _FDT((fdt_begin_node(fdt_skel
, "")));
826 _FDT((fdt_end_node(fdt_skel
)));
827 _FDT((fdt_finish(fdt_skel
)));
828 fdt
= g_malloc0(size
);
829 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
832 /* Fixup cpu nodes */
834 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
837 /* Generate memory nodes or ibm,dynamic-reconfiguration-memory node */
838 if (memory_update
&& smc
->dr_lmb_enabled
) {
839 _FDT((spapr_populate_drconf_memory(spapr
, fdt
)));
841 _FDT((spapr_populate_memory(spapr
, fdt
)));
844 /* Pack resulting tree */
845 _FDT((fdt_pack(fdt
)));
847 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
848 trace_spapr_cas_failed(size
);
852 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
853 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
854 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
860 static void spapr_finalize_fdt(sPAPRMachineState
*spapr
,
865 MachineState
*machine
= MACHINE(qdev_get_machine());
866 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
867 const char *boot_device
= machine
->boot_order
;
874 fdt
= g_malloc(FDT_MAX_SIZE
);
876 /* open out the base tree into a temp buffer for the final tweaks */
877 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
880 * Add memory@0 node to represent RMA. Rest of the memory is either
881 * represented by memory nodes or ibm,dynamic-reconfiguration-memory
882 * node later during ibm,client-architecture-support call.
884 * If NUMA is configured, ensure that memory@0 ends up in the
885 * first memory-less node.
888 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
889 if (numa_info
[i
].node_mem
) {
890 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
895 spapr_populate_memory_node(fdt
, 0, 0, spapr
->rma_size
);
898 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
900 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
904 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
905 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
909 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
914 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
916 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
920 spapr_populate_cpus_dt_node(fdt
, spapr
);
922 bootlist
= get_boot_devices_list(&cb
, true);
923 if (cb
&& bootlist
) {
924 int offset
= fdt_path_offset(fdt
, "/chosen");
928 for (i
= 0; i
< cb
; i
++) {
929 if (bootlist
[i
] == '\n') {
934 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
937 if (boot_device
&& strlen(boot_device
)) {
938 int offset
= fdt_path_offset(fdt
, "/chosen");
943 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
946 if (!spapr
->has_graphics
) {
947 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
950 if (smc
->dr_lmb_enabled
) {
951 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
954 _FDT((fdt_pack(fdt
)));
956 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
957 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
958 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
962 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
963 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
969 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
971 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
974 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
976 CPUPPCState
*env
= &cpu
->env
;
979 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
980 env
->gpr
[3] = H_PRIVILEGE
;
982 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
986 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
987 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
988 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
989 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
990 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
992 static void spapr_reset_htab(sPAPRMachineState
*spapr
)
997 /* allocate hash page table. For now we always make this 16mb,
998 * later we should probably make it scale to the size of guest
1001 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
1004 /* Kernel handles htab, we don't need to allocate one */
1005 spapr
->htab_shift
= shift
;
1006 kvmppc_kern_htab
= true;
1008 /* Tell readers to update their file descriptor */
1009 if (spapr
->htab_fd
>= 0) {
1010 spapr
->htab_fd_stale
= true;
1014 /* Allocate an htab if we don't yet have one */
1015 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
1019 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
1021 for (index
= 0; index
< HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
; index
++) {
1022 DIRTY_HPTE(HPTE(spapr
->htab
, index
));
1026 /* Update the RMA size if necessary */
1027 if (spapr
->vrma_adjust
) {
1028 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
1033 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1035 bool matched
= false;
1037 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1042 error_report("Device %s is not supported by this machine yet.",
1043 qdev_fw_name(DEVICE(sbdev
)));
1051 * A guest reset will cause spapr->htab_fd to become stale if being used.
1052 * Reopen the file descriptor to make sure the whole HTAB is properly read.
1054 static int spapr_check_htab_fd(sPAPRMachineState
*spapr
)
1058 if (spapr
->htab_fd_stale
) {
1059 close(spapr
->htab_fd
);
1060 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1061 if (spapr
->htab_fd
< 0) {
1062 error_report("Unable to open fd for reading hash table from KVM: "
1063 "%s", strerror(errno
));
1066 spapr
->htab_fd_stale
= false;
1072 static void ppc_spapr_reset(void)
1074 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
1075 PowerPCCPU
*first_ppc_cpu
;
1076 uint32_t rtas_limit
;
1078 /* Check for unknown sysbus devices */
1079 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1081 /* Reset the hash table & recalc the RMA */
1082 spapr_reset_htab(spapr
);
1084 qemu_devices_reset();
1087 * We place the device tree and RTAS just below either the top of the RMA,
1088 * or just below 2GB, whichever is lowere, so that it can be
1089 * processed with 32-bit real mode code if necessary
1091 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1092 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1093 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1096 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
1099 /* Copy RTAS over */
1100 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
1103 /* Set up the entry state */
1104 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1105 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
1106 first_ppc_cpu
->env
.gpr
[5] = 0;
1107 first_cpu
->halted
= 0;
1108 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1112 static void spapr_cpu_reset(void *opaque
)
1114 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
1115 PowerPCCPU
*cpu
= opaque
;
1116 CPUState
*cs
= CPU(cpu
);
1117 CPUPPCState
*env
= &cpu
->env
;
1121 /* All CPUs start halted. CPU0 is unhalted from the machine level
1122 * reset code and the rest are explicitly started up by the guest
1123 * using an RTAS call */
1126 env
->spr
[SPR_HIOR
] = 0;
1128 env
->external_htab
= (uint8_t *)spapr
->htab
;
1129 if (kvm_enabled() && !env
->external_htab
) {
1131 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
1132 * functions do the right thing.
1134 env
->external_htab
= (void *)1;
1136 env
->htab_base
= -1;
1138 * htab_mask is the mask used to normalize hash value to PTEG index.
1139 * htab_shift is log2 of hash table size.
1140 * We have 8 hpte per group, and each hpte is 16 bytes.
1141 * ie have 128 bytes per hpte entry.
1143 env
->htab_mask
= (1ULL << (spapr
->htab_shift
- 7)) - 1;
1144 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
1145 (spapr
->htab_shift
- 18);
1148 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1150 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1151 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1154 qdev_prop_set_drive_nofail(dev
, "drive", blk_by_legacy_dinfo(dinfo
));
1157 qdev_init_nofail(dev
);
1159 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1162 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1164 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1166 qdev_init_nofail(dev
);
1169 object_property_add_alias(qdev_get_machine(), "rtc-time",
1170 OBJECT(spapr
->rtc
), "date", NULL
);
1173 /* Returns whether we want to use VGA or not */
1174 static int spapr_vga_init(PCIBus
*pci_bus
)
1176 switch (vga_interface_type
) {
1182 return pci_vga_init(pci_bus
) != NULL
;
1184 fprintf(stderr
, "This vga model is not supported,"
1185 "currently it only supports -vga std\n");
1190 static int spapr_post_load(void *opaque
, int version_id
)
1192 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1195 /* In earlier versions, there was no separate qdev for the PAPR
1196 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1197 * So when migrating from those versions, poke the incoming offset
1198 * value into the RTC device */
1199 if (version_id
< 3) {
1200 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1206 static bool version_before_3(void *opaque
, int version_id
)
1208 return version_id
< 3;
1211 static const VMStateDescription vmstate_spapr
= {
1214 .minimum_version_id
= 1,
1215 .post_load
= spapr_post_load
,
1216 .fields
= (VMStateField
[]) {
1217 /* used to be @next_irq */
1218 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1221 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1223 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1224 VMSTATE_END_OF_LIST()
1228 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1230 sPAPRMachineState
*spapr
= opaque
;
1232 /* "Iteration" header */
1233 qemu_put_be32(f
, spapr
->htab_shift
);
1236 spapr
->htab_save_index
= 0;
1237 spapr
->htab_first_pass
= true;
1239 assert(kvm_enabled());
1241 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1242 spapr
->htab_fd_stale
= false;
1243 if (spapr
->htab_fd
< 0) {
1244 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
1254 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1257 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1258 int index
= spapr
->htab_save_index
;
1259 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1261 assert(spapr
->htab_first_pass
);
1266 /* Consume invalid HPTEs */
1267 while ((index
< htabslots
)
1268 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1270 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1273 /* Consume valid HPTEs */
1275 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1276 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1278 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1281 if (index
> chunkstart
) {
1282 int n_valid
= index
- chunkstart
;
1284 qemu_put_be32(f
, chunkstart
);
1285 qemu_put_be16(f
, n_valid
);
1286 qemu_put_be16(f
, 0);
1287 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1288 HASH_PTE_SIZE_64
* n_valid
);
1290 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1294 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1296 if (index
>= htabslots
) {
1297 assert(index
== htabslots
);
1299 spapr
->htab_first_pass
= false;
1301 spapr
->htab_save_index
= index
;
1304 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1307 bool final
= max_ns
< 0;
1308 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1309 int examined
= 0, sent
= 0;
1310 int index
= spapr
->htab_save_index
;
1311 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1313 assert(!spapr
->htab_first_pass
);
1316 int chunkstart
, invalidstart
;
1318 /* Consume non-dirty HPTEs */
1319 while ((index
< htabslots
)
1320 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1326 /* Consume valid dirty HPTEs */
1327 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1328 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1329 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1330 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1335 invalidstart
= index
;
1336 /* Consume invalid dirty HPTEs */
1337 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1338 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1339 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1340 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1345 if (index
> chunkstart
) {
1346 int n_valid
= invalidstart
- chunkstart
;
1347 int n_invalid
= index
- invalidstart
;
1349 qemu_put_be32(f
, chunkstart
);
1350 qemu_put_be16(f
, n_valid
);
1351 qemu_put_be16(f
, n_invalid
);
1352 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1353 HASH_PTE_SIZE_64
* n_valid
);
1354 sent
+= index
- chunkstart
;
1356 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1361 if (examined
>= htabslots
) {
1365 if (index
>= htabslots
) {
1366 assert(index
== htabslots
);
1369 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1371 if (index
>= htabslots
) {
1372 assert(index
== htabslots
);
1376 spapr
->htab_save_index
= index
;
1378 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1381 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1382 #define MAX_KVM_BUF_SIZE 2048
1384 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1386 sPAPRMachineState
*spapr
= opaque
;
1389 /* Iteration header */
1390 qemu_put_be32(f
, 0);
1393 assert(kvm_enabled());
1395 rc
= spapr_check_htab_fd(spapr
);
1400 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1401 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1405 } else if (spapr
->htab_first_pass
) {
1406 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1408 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1412 qemu_put_be32(f
, 0);
1413 qemu_put_be16(f
, 0);
1414 qemu_put_be16(f
, 0);
1419 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1421 sPAPRMachineState
*spapr
= opaque
;
1423 /* Iteration header */
1424 qemu_put_be32(f
, 0);
1429 assert(kvm_enabled());
1431 rc
= spapr_check_htab_fd(spapr
);
1436 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1440 close(spapr
->htab_fd
);
1441 spapr
->htab_fd
= -1;
1443 htab_save_later_pass(f
, spapr
, -1);
1447 qemu_put_be32(f
, 0);
1448 qemu_put_be16(f
, 0);
1449 qemu_put_be16(f
, 0);
1454 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1456 sPAPRMachineState
*spapr
= opaque
;
1457 uint32_t section_hdr
;
1460 if (version_id
< 1 || version_id
> 1) {
1461 fprintf(stderr
, "htab_load() bad version\n");
1465 section_hdr
= qemu_get_be32(f
);
1468 /* First section, just the hash shift */
1469 if (spapr
->htab_shift
!= section_hdr
) {
1470 error_report("htab_shift mismatch: source %d target %d",
1471 section_hdr
, spapr
->htab_shift
);
1478 assert(kvm_enabled());
1480 fd
= kvmppc_get_htab_fd(true);
1482 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1489 uint16_t n_valid
, n_invalid
;
1491 index
= qemu_get_be32(f
);
1492 n_valid
= qemu_get_be16(f
);
1493 n_invalid
= qemu_get_be16(f
);
1495 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1500 if ((index
+ n_valid
+ n_invalid
) >
1501 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1502 /* Bad index in stream */
1503 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1504 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1511 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1512 HASH_PTE_SIZE_64
* n_valid
);
1515 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1516 HASH_PTE_SIZE_64
* n_invalid
);
1523 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1538 static SaveVMHandlers savevm_htab_handlers
= {
1539 .save_live_setup
= htab_save_setup
,
1540 .save_live_iterate
= htab_save_iterate
,
1541 .save_live_complete
= htab_save_complete
,
1542 .load_state
= htab_load
,
1545 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1548 MachineState
*machine
= MACHINE(qdev_get_machine());
1549 machine
->boot_order
= g_strdup(boot_device
);
1552 static void spapr_cpu_init(sPAPRMachineState
*spapr
, PowerPCCPU
*cpu
)
1554 CPUPPCState
*env
= &cpu
->env
;
1556 /* Set time-base frequency to 512 MHz */
1557 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1559 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1560 * MSR[IP] should never be set.
1562 env
->msr_mask
&= ~(1 << 6);
1564 /* Tell KVM that we're in PAPR mode */
1565 if (kvm_enabled()) {
1566 kvmppc_set_papr(cpu
);
1569 if (cpu
->max_compat
) {
1570 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1575 xics_cpu_setup(spapr
->icp
, cpu
);
1577 qemu_register_reset(spapr_cpu_reset
, cpu
);
1581 * Reset routine for LMB DR devices.
1583 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
1584 * routine. Reset for PCI DR devices will be handled by PHB reset routine
1585 * when it walks all its children devices. LMB devices reset occurs
1586 * as part of spapr_ppc_reset().
1588 static void spapr_drc_reset(void *opaque
)
1590 sPAPRDRConnector
*drc
= opaque
;
1591 DeviceState
*d
= DEVICE(drc
);
1598 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
1600 MachineState
*machine
= MACHINE(spapr
);
1601 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
1602 uint32_t nr_rma_lmbs
= spapr
->rma_size
/lmb_size
;
1603 uint32_t nr_lmbs
= machine
->maxram_size
/lmb_size
- nr_rma_lmbs
;
1604 uint32_t nr_assigned_lmbs
= machine
->ram_size
/lmb_size
- nr_rma_lmbs
;
1607 for (i
= 0; i
< nr_lmbs
; i
++) {
1608 sPAPRDRConnector
*drc
;
1611 if (i
< nr_assigned_lmbs
) {
1612 addr
= (i
+ nr_rma_lmbs
) * lmb_size
;
1614 addr
= (i
- nr_assigned_lmbs
) * lmb_size
+
1615 spapr
->hotplug_memory
.base
;
1617 drc
= spapr_dr_connector_new(OBJECT(spapr
), SPAPR_DR_CONNECTOR_TYPE_LMB
,
1619 qemu_register_reset(spapr_drc_reset
, drc
);
1624 * If RAM size, maxmem size and individual node mem sizes aren't aligned
1625 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
1626 * since we can't support such unaligned sizes with DRCONF_MEMORY.
1628 static void spapr_validate_node_memory(MachineState
*machine
)
1632 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
||
1633 machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1634 error_report("Can't support memory configuration where RAM size "
1635 "0x" RAM_ADDR_FMT
" or maxmem size "
1636 "0x" RAM_ADDR_FMT
" isn't aligned to %llu MB",
1637 machine
->ram_size
, machine
->maxram_size
,
1638 SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
1642 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1643 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
1644 error_report("Can't support memory configuration where memory size"
1645 " %" PRIx64
" of node %d isn't aligned to %llu MB",
1646 numa_info
[i
].node_mem
, i
,
1647 SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
1653 /* pSeries LPAR / sPAPR hardware init */
1654 static void ppc_spapr_init(MachineState
*machine
)
1656 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1657 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1658 const char *kernel_filename
= machine
->kernel_filename
;
1659 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1660 const char *initrd_filename
= machine
->initrd_filename
;
1664 MemoryRegion
*sysmem
= get_system_memory();
1665 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1666 MemoryRegion
*rma_region
;
1668 hwaddr rma_alloc_size
;
1669 hwaddr node0_size
= spapr_node0_size();
1670 uint32_t initrd_base
= 0;
1671 long kernel_size
= 0, initrd_size
= 0;
1672 long load_limit
, fw_size
;
1673 bool kernel_le
= false;
1676 msi_supported
= true;
1678 QLIST_INIT(&spapr
->phbs
);
1680 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1682 /* Allocate RMA if necessary */
1683 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1685 if (rma_alloc_size
== -1) {
1686 error_report("Unable to create RMA");
1690 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1691 spapr
->rma_size
= rma_alloc_size
;
1693 spapr
->rma_size
= node0_size
;
1695 /* With KVM, we don't actually know whether KVM supports an
1696 * unbounded RMA (PR KVM) or is limited by the hash table size
1697 * (HV KVM using VRMA), so we always assume the latter
1699 * In that case, we also limit the initial allocations for RTAS
1700 * etc... to 256M since we have no way to know what the VRMA size
1701 * is going to be as it depends on the size of the hash table
1702 * isn't determined yet.
1704 if (kvm_enabled()) {
1705 spapr
->vrma_adjust
= 1;
1706 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1710 if (spapr
->rma_size
> node0_size
) {
1711 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1716 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1717 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1719 /* We aim for a hash table of size 1/128 the size of RAM. The
1720 * normal rule of thumb is 1/64 the size of RAM, but that's much
1721 * more than needed for the Linux guests we support. */
1722 spapr
->htab_shift
= 18; /* Minimum architected size */
1723 while (spapr
->htab_shift
<= 46) {
1724 if ((1ULL << (spapr
->htab_shift
+ 7)) >= machine
->maxram_size
) {
1727 spapr
->htab_shift
++;
1730 /* Set up Interrupt Controller before we create the VCPUs */
1731 spapr
->icp
= xics_system_init(machine
,
1732 DIV_ROUND_UP(max_cpus
* kvmppc_smt_threads(),
1736 if (smc
->dr_lmb_enabled
) {
1737 spapr_validate_node_memory(machine
);
1741 if (machine
->cpu_model
== NULL
) {
1742 machine
->cpu_model
= kvm_enabled() ? "host" : "POWER7";
1744 for (i
= 0; i
< smp_cpus
; i
++) {
1745 cpu
= cpu_ppc_init(machine
->cpu_model
);
1747 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1750 spapr_cpu_init(spapr
, cpu
);
1753 if (kvm_enabled()) {
1754 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1755 kvmppc_enable_logical_ci_hcalls();
1756 kvmppc_enable_set_mode_hcall();
1760 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1762 memory_region_add_subregion(sysmem
, 0, ram
);
1764 if (rma_alloc_size
&& rma
) {
1765 rma_region
= g_new(MemoryRegion
, 1);
1766 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1767 rma_alloc_size
, rma
);
1768 vmstate_register_ram_global(rma_region
);
1769 memory_region_add_subregion(sysmem
, 0, rma_region
);
1772 /* initialize hotplug memory address space */
1773 if (machine
->ram_size
< machine
->maxram_size
) {
1774 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
1776 if (machine
->ram_slots
> SPAPR_MAX_RAM_SLOTS
) {
1777 error_report("unsupported amount of memory slots: %"PRIu64
,
1778 machine
->ram_slots
);
1782 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
1783 SPAPR_HOTPLUG_MEM_ALIGN
);
1784 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
1785 "hotplug-memory", hotplug_mem_size
);
1786 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
1787 &spapr
->hotplug_memory
.mr
);
1790 if (smc
->dr_lmb_enabled
) {
1791 spapr_create_lmb_dr_connectors(spapr
);
1794 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1796 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1799 spapr
->rtas_size
= get_image_size(filename
);
1800 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1801 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1802 error_report("Could not load LPAR rtas '%s'", filename
);
1805 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1806 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1807 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1812 /* Set up EPOW events infrastructure */
1813 spapr_events_init(spapr
);
1815 /* Set up the RTC RTAS interfaces */
1816 spapr_rtc_create(spapr
);
1818 /* Set up VIO bus */
1819 spapr
->vio_bus
= spapr_vio_bus_init();
1821 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1822 if (serial_hds
[i
]) {
1823 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1827 /* We always have at least the nvram device on VIO */
1828 spapr_create_nvram(spapr
);
1831 spapr_pci_rtas_init();
1833 phb
= spapr_create_phb(spapr
, 0);
1835 for (i
= 0; i
< nb_nics
; i
++) {
1836 NICInfo
*nd
= &nd_table
[i
];
1839 nd
->model
= g_strdup("ibmveth");
1842 if (strcmp(nd
->model
, "ibmveth") == 0) {
1843 spapr_vlan_create(spapr
->vio_bus
, nd
);
1845 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1849 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1850 spapr_vscsi_create(spapr
->vio_bus
);
1854 if (spapr_vga_init(phb
->bus
)) {
1855 spapr
->has_graphics
= true;
1856 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1860 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1862 if (spapr
->has_graphics
) {
1863 USBBus
*usb_bus
= usb_bus_find(-1);
1865 usb_create_simple(usb_bus
, "usb-kbd");
1866 usb_create_simple(usb_bus
, "usb-mouse");
1870 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1871 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1872 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1876 if (kernel_filename
) {
1877 uint64_t lowaddr
= 0;
1879 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1880 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1881 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1882 kernel_size
= load_elf(kernel_filename
,
1883 translate_kernel_address
, NULL
,
1884 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1885 kernel_le
= kernel_size
> 0;
1887 if (kernel_size
< 0) {
1888 fprintf(stderr
, "qemu: error loading %s: %s\n",
1889 kernel_filename
, load_elf_strerror(kernel_size
));
1894 if (initrd_filename
) {
1895 /* Try to locate the initrd in the gap between the kernel
1896 * and the firmware. Add a bit of space just in case
1898 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1899 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1900 load_limit
- initrd_base
);
1901 if (initrd_size
< 0) {
1902 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1912 if (bios_name
== NULL
) {
1913 bios_name
= FW_FILE_NAME
;
1915 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1917 error_report("Could not find LPAR firmware '%s'", bios_name
);
1920 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1922 error_report("Could not load LPAR firmware '%s'", filename
);
1927 /* FIXME: Should register things through the MachineState's qdev
1928 * interface, this is a legacy from the sPAPREnvironment structure
1929 * which predated MachineState but had a similar function */
1930 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1931 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1932 &savevm_htab_handlers
, spapr
);
1934 /* Prepare the device tree */
1935 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1936 kernel_size
, kernel_le
,
1938 spapr
->check_exception_irq
);
1939 assert(spapr
->fdt_skel
!= NULL
);
1942 QTAILQ_INIT(&spapr
->ccs_list
);
1943 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
1945 qemu_register_boot_set(spapr_boot_set
, spapr
);
1948 static int spapr_kvm_type(const char *vm_type
)
1954 if (!strcmp(vm_type
, "HV")) {
1958 if (!strcmp(vm_type
, "PR")) {
1962 error_report("Unknown kvm-type specified '%s'", vm_type
);
1967 * Implementation of an interface to adjust firmware path
1968 * for the bootindex property handling.
1970 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1973 #define CAST(type, obj, name) \
1974 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1975 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1976 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1979 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1980 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1981 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1985 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1986 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1987 * in the top 16 bits of the 64-bit LUN
1989 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1990 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1991 (uint64_t)id
<< 48);
1992 } else if (virtio
) {
1994 * We use SRP luns of the form 01000000 | (target << 8) | lun
1995 * in the top 32 bits of the 64-bit LUN
1996 * Note: the quote above is from SLOF and it is wrong,
1997 * the actual binding is:
1998 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2000 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2001 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2002 (uint64_t)id
<< 32);
2005 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2006 * in the top 32 bits of the 64-bit LUN
2008 unsigned usb_port
= atoi(usb
->port
->path
);
2009 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2010 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2011 (uint64_t)id
<< 32);
2016 /* Replace "pci" with "pci@800000020000000" */
2017 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2023 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2025 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2027 return g_strdup(spapr
->kvm_type
);
2030 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2032 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2034 g_free(spapr
->kvm_type
);
2035 spapr
->kvm_type
= g_strdup(value
);
2038 static void spapr_machine_initfn(Object
*obj
)
2040 object_property_add_str(obj
, "kvm-type",
2041 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2042 object_property_set_description(obj
, "kvm-type",
2043 "Specifies the KVM virtualization mode (HV, PR)",
2047 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
2051 cpu_synchronize_state(cs
);
2052 ppc_cpu_do_system_reset(cs
);
2055 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2060 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
2064 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr
, uint64_t size
,
2065 uint32_t node
, Error
**errp
)
2067 sPAPRDRConnector
*drc
;
2068 sPAPRDRConnectorClass
*drck
;
2069 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2070 int i
, fdt_offset
, fdt_size
;
2074 * Check for DRC connectors and send hotplug notification to the
2075 * guest only in case of hotplugged memory. This allows cold plugged
2076 * memory to be specified at boot time.
2078 if (!dev
->hotplugged
) {
2082 for (i
= 0; i
< nr_lmbs
; i
++) {
2083 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2084 addr
/SPAPR_MEMORY_BLOCK_SIZE
);
2087 fdt
= create_device_tree(&fdt_size
);
2088 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2089 SPAPR_MEMORY_BLOCK_SIZE
);
2091 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
2092 drck
->attach(drc
, dev
, fdt
, fdt_offset
, !dev
->hotplugged
, errp
);
2093 spapr_hotplug_req_add_event(drc
);
2094 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2098 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2099 uint32_t node
, Error
**errp
)
2101 Error
*local_err
= NULL
;
2102 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2103 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2104 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2105 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
2106 uint64_t align
= memory_region_get_alignment(mr
);
2107 uint64_t size
= memory_region_size(mr
);
2110 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2111 error_setg(&local_err
, "Hotplugged memory size must be a multiple of "
2112 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
2116 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2121 addr
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
, &local_err
);
2123 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2127 spapr_add_lmbs(dev
, addr
, size
, node
, &error_abort
);
2130 error_propagate(errp
, local_err
);
2133 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
2134 DeviceState
*dev
, Error
**errp
)
2136 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
2138 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2141 if (!smc
->dr_lmb_enabled
) {
2142 error_setg(errp
, "Memory hotplug not supported for this machine");
2145 node
= object_property_get_int(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
2151 * Currently PowerPC kernel doesn't allow hot-adding memory to
2152 * memory-less node, but instead will silently add the memory
2153 * to the first node that has some memory. This causes two
2154 * unexpected behaviours for the user.
2156 * - Memory gets hotplugged to a different node than what the user
2158 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
2159 * to memory-less node, a reboot will set things accordingly
2160 * and the previously hotplugged memory now ends in the right node.
2161 * This appears as if some memory moved from one node to another.
2163 * So until kernel starts supporting memory hotplug to memory-less
2164 * nodes, just prevent such attempts upfront in QEMU.
2166 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
2167 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
2172 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
2176 static void spapr_machine_device_unplug(HotplugHandler
*hotplug_dev
,
2177 DeviceState
*dev
, Error
**errp
)
2179 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2180 error_setg(errp
, "Memory hot unplug not supported by sPAPR");
2184 static HotplugHandler
*spapr_get_hotpug_handler(MachineState
*machine
,
2187 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2188 return HOTPLUG_HANDLER(machine
);
2193 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
2195 MachineClass
*mc
= MACHINE_CLASS(oc
);
2196 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
2197 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
2198 NMIClass
*nc
= NMI_CLASS(oc
);
2199 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
2201 mc
->init
= ppc_spapr_init
;
2202 mc
->reset
= ppc_spapr_reset
;
2203 mc
->block_default_type
= IF_SCSI
;
2204 mc
->max_cpus
= MAX_CPUMASK_BITS
;
2205 mc
->no_parallel
= 1;
2206 mc
->default_boot_order
= "";
2207 mc
->default_ram_size
= 512 * M_BYTE
;
2208 mc
->kvm_type
= spapr_kvm_type
;
2209 mc
->has_dynamic_sysbus
= true;
2210 mc
->pci_allow_0_address
= true;
2211 mc
->get_hotplug_handler
= spapr_get_hotpug_handler
;
2212 hc
->plug
= spapr_machine_device_plug
;
2213 hc
->unplug
= spapr_machine_device_unplug
;
2215 smc
->dr_lmb_enabled
= false;
2216 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
2217 nc
->nmi_monitor_handler
= spapr_nmi
;
2220 static const TypeInfo spapr_machine_info
= {
2221 .name
= TYPE_SPAPR_MACHINE
,
2222 .parent
= TYPE_MACHINE
,
2224 .instance_size
= sizeof(sPAPRMachineState
),
2225 .instance_init
= spapr_machine_initfn
,
2226 .class_size
= sizeof(sPAPRMachineClass
),
2227 .class_init
= spapr_machine_class_init
,
2228 .interfaces
= (InterfaceInfo
[]) {
2229 { TYPE_FW_PATH_PROVIDER
},
2231 { TYPE_HOTPLUG_HANDLER
},
2236 #define SPAPR_COMPAT_2_3 \
2239 .driver = "spapr-pci-host-bridge",\
2240 .property = "dynamic-reconfiguration",\
2244 #define SPAPR_COMPAT_2_2 \
2248 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2249 .property = "mem_win_size",\
2250 .value = "0x20000000",\
2253 #define SPAPR_COMPAT_2_1 \
2257 static void spapr_compat_2_3(Object
*obj
)
2259 savevm_skip_section_footers();
2260 global_state_set_optional();
2263 static void spapr_compat_2_2(Object
*obj
)
2265 spapr_compat_2_3(obj
);
2268 static void spapr_compat_2_1(Object
*obj
)
2270 spapr_compat_2_2(obj
);
2273 static void spapr_machine_2_3_instance_init(Object
*obj
)
2275 spapr_compat_2_3(obj
);
2276 spapr_machine_initfn(obj
);
2279 static void spapr_machine_2_2_instance_init(Object
*obj
)
2281 spapr_compat_2_2(obj
);
2282 spapr_machine_initfn(obj
);
2285 static void spapr_machine_2_1_instance_init(Object
*obj
)
2287 spapr_compat_2_1(obj
);
2288 spapr_machine_initfn(obj
);
2291 static void spapr_machine_2_1_class_init(ObjectClass
*oc
, void *data
)
2293 MachineClass
*mc
= MACHINE_CLASS(oc
);
2294 static GlobalProperty compat_props
[] = {
2296 { /* end of list */ }
2299 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.1";
2300 mc
->compat_props
= compat_props
;
2303 static const TypeInfo spapr_machine_2_1_info
= {
2304 .name
= MACHINE_TYPE_NAME("pseries-2.1"),
2305 .parent
= TYPE_SPAPR_MACHINE
,
2306 .class_init
= spapr_machine_2_1_class_init
,
2307 .instance_init
= spapr_machine_2_1_instance_init
,
2310 static void spapr_machine_2_2_class_init(ObjectClass
*oc
, void *data
)
2312 static GlobalProperty compat_props
[] = {
2314 { /* end of list */ }
2316 MachineClass
*mc
= MACHINE_CLASS(oc
);
2318 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.2";
2319 mc
->compat_props
= compat_props
;
2322 static const TypeInfo spapr_machine_2_2_info
= {
2323 .name
= MACHINE_TYPE_NAME("pseries-2.2"),
2324 .parent
= TYPE_SPAPR_MACHINE
,
2325 .class_init
= spapr_machine_2_2_class_init
,
2326 .instance_init
= spapr_machine_2_2_instance_init
,
2329 static void spapr_machine_2_3_class_init(ObjectClass
*oc
, void *data
)
2331 static GlobalProperty compat_props
[] = {
2333 { /* end of list */ }
2335 MachineClass
*mc
= MACHINE_CLASS(oc
);
2337 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.3";
2338 mc
->compat_props
= compat_props
;
2341 static const TypeInfo spapr_machine_2_3_info
= {
2342 .name
= MACHINE_TYPE_NAME("pseries-2.3"),
2343 .parent
= TYPE_SPAPR_MACHINE
,
2344 .class_init
= spapr_machine_2_3_class_init
,
2345 .instance_init
= spapr_machine_2_3_instance_init
,
2348 static void spapr_machine_2_4_class_init(ObjectClass
*oc
, void *data
)
2350 MachineClass
*mc
= MACHINE_CLASS(oc
);
2352 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.4";
2353 mc
->alias
= "pseries";
2357 static const TypeInfo spapr_machine_2_4_info
= {
2358 .name
= MACHINE_TYPE_NAME("pseries-2.4"),
2359 .parent
= TYPE_SPAPR_MACHINE
,
2360 .class_init
= spapr_machine_2_4_class_init
,
2363 static void spapr_machine_2_5_class_init(ObjectClass
*oc
, void *data
)
2365 MachineClass
*mc
= MACHINE_CLASS(oc
);
2366 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
2368 mc
->name
= "pseries-2.5";
2369 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.5";
2370 mc
->alias
= "pseries";
2372 smc
->dr_lmb_enabled
= true;
2375 static const TypeInfo spapr_machine_2_5_info
= {
2376 .name
= MACHINE_TYPE_NAME("pseries-2.5"),
2377 .parent
= TYPE_SPAPR_MACHINE
,
2378 .class_init
= spapr_machine_2_5_class_init
,
2381 static void spapr_machine_register_types(void)
2383 type_register_static(&spapr_machine_info
);
2384 type_register_static(&spapr_machine_2_1_info
);
2385 type_register_static(&spapr_machine_2_2_info
);
2386 type_register_static(&spapr_machine_2_3_info
);
2387 type_register_static(&spapr_machine_2_4_info
);
2388 type_register_static(&spapr_machine_2_5_info
);
2391 type_init(spapr_machine_register_types
)