hw/ppc/spapr_cpu_core.c

   1 /*
   2  * sPAPR CPU core device, acts as container of CPU thread devices.
   3  *
   4  * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9 #include "hw/cpu/core.h"
  10 #include "hw/ppc/spapr_cpu_core.h"
  11 #include "target/ppc/cpu.h"
  12 #include "hw/ppc/spapr.h"
  13 #include "hw/boards.h"
  14 #include "qapi/error.h"
  15 #include "sysemu/cpus.h"
  16 #include "sysemu/kvm.h"
  17 #include "target/ppc/kvm_ppc.h"
  18 #include "hw/ppc/ppc.h"
  19 #include "target/ppc/mmu-hash64.h"
  20 #include "sysemu/numa.h"
  21 #include "sysemu/hw_accel.h"
  22 #include "qemu/error-report.h"
  23
  24 static void spapr_cpu_reset(void *opaque)
  25 {
  26     PowerPCCPU *cpu = opaque;
  27     CPUState *cs = CPU(cpu);
  28     CPUPPCState *env = &cpu->env;
  29
  30     cpu_reset(cs);
  31
  32     /* All CPUs start halted.  CPU0 is unhalted from the machine level
  33      * reset code and the rest are explicitly started up by the guest
  34      * using an RTAS call */
  35     cs->halted = 1;
  36
  37     env->spr[SPR_HIOR] = 0;
  38 }
  39
  40 static void spapr_cpu_destroy(PowerPCCPU *cpu)
  41 {
  42     qemu_unregister_reset(spapr_cpu_reset, cpu);
  43 }
  44
  45 static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
  46                            Error **errp)
  47 {
  48     CPUPPCState *env = &cpu->env;
  49
  50     /* Set time-base frequency to 512 MHz */
  51     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
  52
  53     /* Enable PAPR mode in TCG or KVM */
  54     cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
  55
  56     qemu_register_reset(spapr_cpu_reset, cpu);
  57     spapr_cpu_reset(cpu);
  58 }
  59
  60 /*
  61  * Return the sPAPR CPU core type for @model which essentially is the CPU
  62  * model specified with -cpu cmdline option.
  63  */
  64 char *spapr_get_cpu_core_type(const char *model)
  65 {
  66     char *core_type;
  67     gchar **model_pieces = g_strsplit(model, ",", 2);
  68     gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1);
  69     g_strfreev(model_pieces);
  70
  71     core_type = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, cpu_model);
  72
  73     /* Check whether it exists or whether we have to look up an alias name */
  74     if (!object_class_by_name(core_type)) {
  75         const char *realmodel;
  76
  77         g_free(core_type);
  78         core_type = NULL;
  79         realmodel = ppc_cpu_lookup_alias(cpu_model);
  80         if (realmodel) {
  81             core_type = spapr_get_cpu_core_type(realmodel);
  82         }
  83     }
  84     g_free(cpu_model);
  85
  86     return core_type;
  87 }
  88
  89 static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
  90 {
  91     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
  92     sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
  93     size_t size = object_type_get_instance_size(scc->cpu_type);
  94     CPUCore *cc = CPU_CORE(dev);
  95     int i;
  96
  97     for (i = 0; i < cc->nr_threads; i++) {
  98         void *obj = sc->threads + i * size;
  99         DeviceState *dev = DEVICE(obj);
 100         CPUState *cs = CPU(dev);
 101         PowerPCCPU *cpu = POWERPC_CPU(cs);
 102
 103         spapr_cpu_destroy(cpu);
 104         object_unparent(cpu->intc);
 105         cpu_remove_sync(cs);
 106         object_unparent(obj);
 107     }
 108     g_free(sc->threads);
 109 }
 110
 111 static void spapr_cpu_core_realize_child(Object *child,
 112                                          sPAPRMachineState *spapr, Error **errp)
 113 {
 114     Error *local_err = NULL;
 115     CPUState *cs = CPU(child);
 116     PowerPCCPU *cpu = POWERPC_CPU(cs);
 117     Object *obj;
 118
 119     object_property_set_bool(child, true, "realized", &local_err);
 120     if (local_err) {
 121         goto error;
 122     }
 123
 124     spapr_cpu_init(spapr, cpu, &local_err);
 125     if (local_err) {
 126         goto error;
 127     }
 128
 129     obj = object_new(spapr->icp_type);
 130     object_property_add_child(child, "icp", obj, &error_abort);
 131     object_unref(obj);
 132     object_property_add_const_link(obj, ICP_PROP_XICS, OBJECT(spapr),
 133                                    &error_abort);
 134     object_property_add_const_link(obj, ICP_PROP_CPU, child, &error_abort);
 135     object_property_set_bool(obj, true, "realized", &local_err);
 136     if (local_err) {
 137         goto free_icp;
 138     }
 139
 140     return;
 141
 142 free_icp:
 143     object_unparent(obj);
 144 error:
 145     error_propagate(errp, local_err);
 146 }
 147
 148 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
 149 {
 150     sPAPRMachineState *spapr;
 151     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 152     sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
 153     CPUCore *cc = CPU_CORE(OBJECT(dev));
 154     size_t size;
 155     Error *local_err = NULL;
 156     void *obj;
 157     int i, j;
 158
 159     spapr = (sPAPRMachineState *) qdev_get_machine();
 160     if (!object_dynamic_cast((Object *) spapr, TYPE_SPAPR_MACHINE)) {
 161         error_setg(errp, "spapr-cpu-core needs a pseries machine");
 162         return;
 163     }
 164
 165     size = object_type_get_instance_size(scc->cpu_type);
 166     sc->threads = g_malloc0(size * cc->nr_threads);
 167     for (i = 0; i < cc->nr_threads; i++) {
 168         char id[32];
 169         CPUState *cs;
 170         PowerPCCPU *cpu;
 171
 172         obj = sc->threads + i * size;
 173
 174         object_initialize(obj, size, scc->cpu_type);
 175         cs = CPU(obj);
 176         cpu = POWERPC_CPU(cs);
 177         cs->cpu_index = cc->core_id + i;
 178         cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i;
 179         if (kvm_enabled() && !kvm_vcpu_id_is_valid(cpu->vcpu_id)) {
 180             error_setg(&local_err, "Can't create CPU with id %d in KVM",
 181                        cpu->vcpu_id);
 182             error_append_hint(&local_err, "Adjust the number of cpus to %d "
 183                               "or try to raise the number of threads per core\n",
 184                               cpu->vcpu_id * smp_threads / spapr->vsmt);
 185             goto err;
 186         }
 187
 188
 189         /* Set NUMA node for the threads belonged to core  */
 190         cpu->node_id = sc->node_id;
 191
 192         snprintf(id, sizeof(id), "thread[%d]", i);
 193         object_property_add_child(OBJECT(sc), id, obj, &local_err);
 194         if (local_err) {
 195             goto err;
 196         }
 197         object_unref(obj);
 198     }
 199
 200     for (j = 0; j < cc->nr_threads; j++) {
 201         obj = sc->threads + j * size;
 202
 203         spapr_cpu_core_realize_child(obj, spapr, &local_err);
 204         if (local_err) {
 205             goto err;
 206         }
 207     }
 208     return;
 209
 210 err:
 211     while (--i >= 0) {
 212         obj = sc->threads + i * size;
 213         object_unparent(obj);
 214     }
 215     g_free(sc->threads);
 216     error_propagate(errp, local_err);
 217 }
 218
 219 static Property spapr_cpu_core_properties[] = {
 220     DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
 221     DEFINE_PROP_END_OF_LIST()
 222 };
 223
 224 void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
 225 {
 226     DeviceClass *dc = DEVICE_CLASS(oc);
 227     sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
 228
 229     dc->realize = spapr_cpu_core_realize;
 230     dc->unrealize = spapr_cpu_core_unrealizefn;
 231     dc->props = spapr_cpu_core_properties;
 232     scc->cpu_type = data;
 233 }
 234
 235 #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
 236     {                                                   \
 237         .parent = TYPE_SPAPR_CPU_CORE,                  \
 238         .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
 239         .class_init = spapr_cpu_core_class_init,        \
 240         .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model),    \
 241     }
 242
 243 static const TypeInfo spapr_cpu_core_type_infos[] = {
 244     {
 245         .name = TYPE_SPAPR_CPU_CORE,
 246         .parent = TYPE_CPU_CORE,
 247         .abstract = true,
 248         .instance_size = sizeof(sPAPRCPUCore),
 249         .class_size = sizeof(sPAPRCPUCoreClass),
 250     },
 251     DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
 252     DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
 253     DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
 254     DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
 255     DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
 256     DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
 257     DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
 258     DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
 259     DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
 260     DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
 261     DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
 262 };
 263
 264 DEFINE_TYPES(spapr_cpu_core_type_infos)