hw/net/etraxfs_eth.c

   1 /*
   2  * QEMU ETRAX Ethernet Controller.
   3  *
   4  * Copyright (c) 2008 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qapi/error.h"
  27 #include "hw/sysbus.h"
  28 #include "net/net.h"
  29 #include "hw/cris/etraxfs.h"
  30 #include "qemu/error-report.h"
  31 #include "trace.h"
  32
  33 #define D(x)
  34
  35 /* Advertisement control register. */
  36 #define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
  37 #define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
  38 #define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
  39 #define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
  40
  41 /*
  42  * The MDIO extensions in the TDK PHY model were reversed engineered from the
  43  * linux driver (PHYID and Diagnostics reg).
  44  * TODO: Add friendly names for the register nums.
  45  */
  46 struct qemu_phy
  47 {
  48     uint32_t regs[32];
  49
  50     int link;
  51
  52     unsigned int (*read)(struct qemu_phy *phy, unsigned int req);
  53     void (*write)(struct qemu_phy *phy, unsigned int req, unsigned int data);
  54 };
  55
  56 static unsigned int tdk_read(struct qemu_phy *phy, unsigned int req)
  57 {
  58     int regnum;
  59     unsigned r = 0;
  60
  61     regnum = req & 0x1f;
  62
  63     switch (regnum) {
  64     case 1:
  65         if (!phy->link) {
  66             break;
  67         }
  68         /* MR1.     */
  69         /* Speeds and modes.  */
  70         r |= (1 << 13) | (1 << 14);
  71         r |= (1 << 11) | (1 << 12);
  72         r |= (1 << 5); /* Autoneg complete.  */
  73         r |= (1 << 3); /* Autoneg able.     */
  74         r |= (1 << 2); /* link.     */
  75         break;
  76     case 5:
  77         /* Link partner ability.
  78            We are kind; always agree with whatever best mode
  79            the guest advertises.  */
  80         r = 1 << 14; /* Success.  */
  81         /* Copy advertised modes.  */
  82         r |= phy->regs[4] & (15 << 5);
  83         /* Autoneg support.  */
  84         r |= 1;
  85         break;
  86     case 18:
  87     {
  88         /* Diagnostics reg.  */
  89         int duplex = 0;
  90         int speed_100 = 0;
  91
  92         if (!phy->link) {
  93             break;
  94         }
  95
  96         /* Are we advertising 100 half or 100 duplex ? */
  97         speed_100 = !!(phy->regs[4] & ADVERTISE_100HALF);
  98         speed_100 |= !!(phy->regs[4] & ADVERTISE_100FULL);
  99
 100         /* Are we advertising 10 duplex or 100 duplex ? */
 101         duplex = !!(phy->regs[4] & ADVERTISE_100FULL);
 102         duplex |= !!(phy->regs[4] & ADVERTISE_10FULL);
 103         r = (speed_100 << 10) | (duplex << 11);
 104     }
 105     break;
 106
 107     default:
 108         r = phy->regs[regnum];
 109         break;
 110     }
 111     trace_mdio_phy_read(regnum, r);
 112     return r;
 113 }
 114
 115 static void
 116 tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data)
 117 {
 118     int regnum;
 119
 120     regnum = req & 0x1f;
 121     trace_mdio_phy_write(regnum, data);
 122     switch (regnum) {
 123     default:
 124         phy->regs[regnum] = data;
 125         break;
 126     }
 127 }
 128
 129 static void
 130 tdk_reset(struct qemu_phy *phy)
 131 {
 132     phy->regs[0] = 0x3100;
 133     /* PHY Id.  */
 134     phy->regs[2] = 0x0300;
 135     phy->regs[3] = 0xe400;
 136     /* Autonegotiation advertisement reg.  */
 137     phy->regs[4] = 0x01E1;
 138     phy->link = 1;
 139 }
 140
 141 struct qemu_mdio
 142 {
 143     /* bus.     */
 144     int mdc;
 145     int mdio;
 146
 147     /* decoder.  */
 148     enum {
 149         PREAMBLE,
 150         SOF,
 151         OPC,
 152         ADDR,
 153         REQ,
 154         TURNAROUND,
 155         DATA
 156     } state;
 157     unsigned int drive;
 158
 159     unsigned int cnt;
 160     unsigned int addr;
 161     unsigned int opc;
 162     unsigned int req;
 163     unsigned int data;
 164
 165     struct qemu_phy *devs[32];
 166 };
 167
 168 static void
 169 mdio_attach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr)
 170 {
 171     bus->devs[addr & 0x1f] = phy;
 172 }
 173
 174 #ifdef USE_THIS_DEAD_CODE
 175 static void
 176 mdio_detach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr)
 177 {
 178     bus->devs[addr & 0x1f] = NULL;
 179 }
 180 #endif
 181
 182 static void mdio_read_req(struct qemu_mdio *bus)
 183 {
 184     struct qemu_phy *phy;
 185
 186     phy = bus->devs[bus->addr];
 187     if (phy && phy->read) {
 188         bus->data = phy->read(phy, bus->req);
 189     } else {
 190         bus->data = 0xffff;
 191     }
 192 }
 193
 194 static void mdio_write_req(struct qemu_mdio *bus)
 195 {
 196     struct qemu_phy *phy;
 197
 198     phy = bus->devs[bus->addr];
 199     if (phy && phy->write) {
 200         phy->write(phy, bus->req, bus->data);
 201     }
 202 }
 203
 204 static void mdio_cycle(struct qemu_mdio *bus)
 205 {
 206     bus->cnt++;
 207
 208     trace_mdio_bitbang(bus->mdc, bus->mdio, bus->state, bus->cnt, bus->drive);
 209 #if 0
 210     if (bus->mdc) {
 211         printf("%d", bus->mdio);
 212     }
 213 #endif
 214     switch (bus->state) {
 215     case PREAMBLE:
 216         if (bus->mdc) {
 217             if (bus->cnt >= (32 * 2) && !bus->mdio) {
 218                 bus->cnt = 0;
 219                 bus->state = SOF;
 220                 bus->data = 0;
 221             }
 222         }
 223         break;
 224     case SOF:
 225         if (bus->mdc) {
 226             if (bus->mdio != 1) {
 227                 printf("WARNING: no SOF\n");
 228             }
 229             if (bus->cnt == 1*2) {
 230                 bus->cnt = 0;
 231                 bus->opc = 0;
 232                 bus->state = OPC;
 233             }
 234         }
 235         break;
 236     case OPC:
 237         if (bus->mdc) {
 238             bus->opc <<= 1;
 239             bus->opc |= bus->mdio & 1;
 240             if (bus->cnt == 2*2) {
 241                 bus->cnt = 0;
 242                 bus->addr = 0;
 243                 bus->state = ADDR;
 244             }
 245         }
 246         break;
 247     case ADDR:
 248         if (bus->mdc) {
 249             bus->addr <<= 1;
 250             bus->addr |= bus->mdio & 1;
 251
 252             if (bus->cnt == 5*2) {
 253                 bus->cnt = 0;
 254                 bus->req = 0;
 255                 bus->state = REQ;
 256             }
 257         }
 258         break;
 259     case REQ:
 260         if (bus->mdc) {
 261             bus->req <<= 1;
 262             bus->req |= bus->mdio & 1;
 263             if (bus->cnt == 5*2) {
 264                 bus->cnt = 0;
 265                 bus->state = TURNAROUND;
 266             }
 267         }
 268         break;
 269     case TURNAROUND:
 270         if (bus->mdc && bus->cnt == 2*2) {
 271             bus->mdio = 0;
 272             bus->cnt = 0;
 273
 274             if (bus->opc == 2) {
 275                 bus->drive = 1;
 276                 mdio_read_req(bus);
 277                 bus->mdio = bus->data & 1;
 278             }
 279             bus->state = DATA;
 280         }
 281         break;
 282     case DATA:
 283         if (!bus->mdc) {
 284             if (bus->drive) {
 285                 bus->mdio = !!(bus->data & (1 << 15));
 286                 bus->data <<= 1;
 287             }
 288         } else {
 289             if (!bus->drive) {
 290                 bus->data <<= 1;
 291                 bus->data |= bus->mdio;
 292             }
 293             if (bus->cnt == 16 * 2) {
 294                 bus->cnt = 0;
 295                 bus->state = PREAMBLE;
 296                 if (!bus->drive) {
 297                     mdio_write_req(bus);
 298                 }
 299                 bus->drive = 0;
 300             }
 301         }
 302         break;
 303     default:
 304         break;
 305     }
 306 }
 307
 308 /* ETRAX-FS Ethernet MAC block starts here.  */
 309
 310 #define RW_MA0_LO      0x00
 311 #define RW_MA0_HI      0x01
 312 #define RW_MA1_LO      0x02
 313 #define RW_MA1_HI      0x03
 314 #define RW_GA_LO      0x04
 315 #define RW_GA_HI      0x05
 316 #define RW_GEN_CTRL      0x06
 317 #define RW_REC_CTRL      0x07
 318 #define RW_TR_CTRL      0x08
 319 #define RW_CLR_ERR      0x09
 320 #define RW_MGM_CTRL      0x0a
 321 #define R_STAT          0x0b
 322 #define FS_ETH_MAX_REGS      0x17
 323
 324 #define TYPE_ETRAX_FS_ETH "etraxfs-eth"
 325 #define ETRAX_FS_ETH(obj) \
 326     OBJECT_CHECK(ETRAXFSEthState, (obj), TYPE_ETRAX_FS_ETH)
 327
 328 typedef struct ETRAXFSEthState
 329 {
 330     SysBusDevice parent_obj;
 331
 332     MemoryRegion mmio;
 333     NICState *nic;
 334     NICConf conf;
 335
 336     /* Two addrs in the filter.  */
 337     uint8_t macaddr[2][6];
 338     uint32_t regs[FS_ETH_MAX_REGS];
 339
 340     union {
 341         void *vdma_out;
 342         struct etraxfs_dma_client *dma_out;
 343     };
 344     union {
 345         void *vdma_in;
 346         struct etraxfs_dma_client *dma_in;
 347     };
 348
 349     /* MDIO bus.  */
 350     struct qemu_mdio mdio_bus;
 351     unsigned int phyaddr;
 352     int duplex_mismatch;
 353
 354     /* PHY.     */
 355     struct qemu_phy phy;
 356 } ETRAXFSEthState;
 357
 358 static void eth_validate_duplex(ETRAXFSEthState *eth)
 359 {
 360     struct qemu_phy *phy;
 361     unsigned int phy_duplex;
 362     unsigned int mac_duplex;
 363     int new_mm = 0;
 364
 365     phy = eth->mdio_bus.devs[eth->phyaddr];
 366     phy_duplex = !!(phy->read(phy, 18) & (1 << 11));
 367     mac_duplex = !!(eth->regs[RW_REC_CTRL] & 128);
 368
 369     if (mac_duplex != phy_duplex) {
 370         new_mm = 1;
 371     }
 372
 373     if (eth->regs[RW_GEN_CTRL] & 1) {
 374         if (new_mm != eth->duplex_mismatch) {
 375             if (new_mm) {
 376                 printf("HW: WARNING ETH duplex mismatch MAC=%d PHY=%d\n",
 377                        mac_duplex, phy_duplex);
 378             } else {
 379                 printf("HW: ETH duplex ok.\n");
 380             }
 381         }
 382         eth->duplex_mismatch = new_mm;
 383     }
 384 }
 385
 386 static uint64_t
 387 eth_read(void *opaque, hwaddr addr, unsigned int size)
 388 {
 389     ETRAXFSEthState *eth = opaque;
 390     uint32_t r = 0;
 391
 392     addr >>= 2;
 393
 394     switch (addr) {
 395     case R_STAT:
 396         r = eth->mdio_bus.mdio & 1;
 397         break;
 398     default:
 399         r = eth->regs[addr];
 400         D(printf("%s %x\n", __func__, addr * 4));
 401         break;
 402     }
 403     return r;
 404 }
 405
 406 static void eth_update_ma(ETRAXFSEthState *eth, int ma)
 407 {
 408     int reg;
 409     int i = 0;
 410
 411     ma &= 1;
 412
 413     reg = RW_MA0_LO;
 414     if (ma) {
 415         reg = RW_MA1_LO;
 416     }
 417
 418     eth->macaddr[ma][i++] = eth->regs[reg];
 419     eth->macaddr[ma][i++] = eth->regs[reg] >> 8;
 420     eth->macaddr[ma][i++] = eth->regs[reg] >> 16;
 421     eth->macaddr[ma][i++] = eth->regs[reg] >> 24;
 422     eth->macaddr[ma][i++] = eth->regs[reg + 1];
 423     eth->macaddr[ma][i] = eth->regs[reg + 1] >> 8;
 424
 425     D(printf("set mac%d=%x.%x.%x.%x.%x.%x\n", ma,
 426              eth->macaddr[ma][0], eth->macaddr[ma][1],
 427              eth->macaddr[ma][2], eth->macaddr[ma][3],
 428              eth->macaddr[ma][4], eth->macaddr[ma][5]));
 429 }
 430
 431 static void
 432 eth_write(void *opaque, hwaddr addr,
 433           uint64_t val64, unsigned int size)
 434 {
 435     ETRAXFSEthState *eth = opaque;
 436     uint32_t value = val64;
 437
 438     addr >>= 2;
 439     switch (addr) {
 440     case RW_MA0_LO:
 441     case RW_MA0_HI:
 442         eth->regs[addr] = value;
 443         eth_update_ma(eth, 0);
 444         break;
 445     case RW_MA1_LO:
 446     case RW_MA1_HI:
 447         eth->regs[addr] = value;
 448         eth_update_ma(eth, 1);
 449         break;
 450
 451     case RW_MGM_CTRL:
 452         /* Attach an MDIO/PHY abstraction.  */
 453         if (value & 2) {
 454             eth->mdio_bus.mdio = value & 1;
 455         }
 456         if (eth->mdio_bus.mdc != (value & 4)) {
 457             mdio_cycle(&eth->mdio_bus);
 458             eth_validate_duplex(eth);
 459         }
 460         eth->mdio_bus.mdc = !!(value & 4);
 461         eth->regs[addr] = value;
 462         break;
 463
 464     case RW_REC_CTRL:
 465         eth->regs[addr] = value;
 466         eth_validate_duplex(eth);
 467         break;
 468
 469     default:
 470         eth->regs[addr] = value;
 471         D(printf("%s %x %x\n", __func__, addr, value));
 472         break;
 473     }
 474 }
 475
 476 /* The ETRAX FS has a groupt address table (GAT) which works like a k=1 bloom
 477    filter dropping group addresses we have not joined.    The filter has 64
 478    bits (m). The has function is a simple nible xor of the group addr.    */
 479 static int eth_match_groupaddr(ETRAXFSEthState *eth, const unsigned char *sa)
 480 {
 481     unsigned int hsh;
 482     int m_individual = eth->regs[RW_REC_CTRL] & 4;
 483     int match;
 484
 485     /* First bit on the wire of a MAC address signals multicast or
 486        physical address.  */
 487     if (!m_individual && !(sa[0] & 1)) {
 488         return 0;
 489     }
 490
 491     /* Calculate the hash index for the GA registers. */
 492     hsh = 0;
 493     hsh ^= (*sa) & 0x3f;
 494     hsh ^= ((*sa) >> 6) & 0x03;
 495     ++sa;
 496     hsh ^= ((*sa) << 2) & 0x03c;
 497     hsh ^= ((*sa) >> 4) & 0xf;
 498     ++sa;
 499     hsh ^= ((*sa) << 4) & 0x30;
 500     hsh ^= ((*sa) >> 2) & 0x3f;
 501     ++sa;
 502     hsh ^= (*sa) & 0x3f;
 503     hsh ^= ((*sa) >> 6) & 0x03;
 504     ++sa;
 505     hsh ^= ((*sa) << 2) & 0x03c;
 506     hsh ^= ((*sa) >> 4) & 0xf;
 507     ++sa;
 508     hsh ^= ((*sa) << 4) & 0x30;
 509     hsh ^= ((*sa) >> 2) & 0x3f;
 510
 511     hsh &= 63;
 512     if (hsh > 31) {
 513         match = eth->regs[RW_GA_HI] & (1 << (hsh - 32));
 514     } else {
 515         match = eth->regs[RW_GA_LO] & (1 << hsh);
 516     }
 517     D(printf("hsh=%x ga=%x.%x mtch=%d\n", hsh,
 518              eth->regs[RW_GA_HI], eth->regs[RW_GA_LO], match));
 519     return match;
 520 }
 521
 522 static ssize_t eth_receive(NetClientState *nc, const uint8_t *buf, size_t size)
 523 {
 524     unsigned char sa_bcast[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 525     ETRAXFSEthState *eth = qemu_get_nic_opaque(nc);
 526     int use_ma0 = eth->regs[RW_REC_CTRL] & 1;
 527     int use_ma1 = eth->regs[RW_REC_CTRL] & 2;
 528     int r_bcast = eth->regs[RW_REC_CTRL] & 8;
 529
 530     if (size < 12) {
 531         return -1;
 532     }
 533
 534     D(printf("%x.%x.%x.%x.%x.%x ma=%d %d bc=%d\n",
 535          buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
 536          use_ma0, use_ma1, r_bcast));
 537
 538     /* Does the frame get through the address filters?  */
 539     if ((!use_ma0 || memcmp(buf, eth->macaddr[0], 6))
 540         && (!use_ma1 || memcmp(buf, eth->macaddr[1], 6))
 541         && (!r_bcast || memcmp(buf, sa_bcast, 6))
 542         && !eth_match_groupaddr(eth, buf)) {
 543         return size;
 544     }
 545
 546     /* FIXME: Find another way to pass on the fake csum.  */
 547     etraxfs_dmac_input(eth->dma_in, (void *)buf, size + 4, 1);
 548
 549     return size;
 550 }
 551
 552 static int eth_tx_push(void *opaque, unsigned char *buf, int len, bool eop)
 553 {
 554     ETRAXFSEthState *eth = opaque;
 555
 556     D(printf("%s buf=%p len=%d\n", __func__, buf, len));
 557     qemu_send_packet(qemu_get_queue(eth->nic), buf, len);
 558     return len;
 559 }
 560
 561 static void eth_set_link(NetClientState *nc)
 562 {
 563     ETRAXFSEthState *eth = qemu_get_nic_opaque(nc);
 564     D(printf("%s %d\n", __func__, nc->link_down));
 565     eth->phy.link = !nc->link_down;
 566 }
 567
 568 static const MemoryRegionOps eth_ops = {
 569     .read = eth_read,
 570     .write = eth_write,
 571     .endianness = DEVICE_LITTLE_ENDIAN,
 572     .valid = {
 573         .min_access_size = 4,
 574         .max_access_size = 4
 575     }
 576 };
 577
 578 static NetClientInfo net_etraxfs_info = {
 579     .type = NET_CLIENT_DRIVER_NIC,
 580     .size = sizeof(NICState),
 581     .receive = eth_receive,
 582     .link_status_changed = eth_set_link,
 583 };
 584
 585 static void etraxfs_eth_reset(DeviceState *dev)
 586 {
 587     ETRAXFSEthState *s = ETRAX_FS_ETH(dev);
 588
 589     memset(s->regs, 0, sizeof(s->regs));
 590     memset(s->macaddr, 0, sizeof(s->macaddr));
 591     s->duplex_mismatch = 0;
 592
 593     s->mdio_bus.mdc = 0;
 594     s->mdio_bus.mdio = 0;
 595     s->mdio_bus.state = 0;
 596     s->mdio_bus.drive = 0;
 597     s->mdio_bus.cnt = 0;
 598     s->mdio_bus.addr = 0;
 599     s->mdio_bus.opc = 0;
 600     s->mdio_bus.req = 0;
 601     s->mdio_bus.data = 0;
 602
 603     tdk_reset(&s->phy);
 604 }
 605
 606 static void etraxfs_eth_realize(DeviceState *dev, Error **errp)
 607 {
 608     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 609     ETRAXFSEthState *s = ETRAX_FS_ETH(dev);
 610
 611     if (!s->dma_out || !s->dma_in) {
 612         error_setg(errp, "Unconnected ETRAX-FS Ethernet MAC");
 613         return;
 614     }
 615
 616     s->dma_out->client.push = eth_tx_push;
 617     s->dma_out->client.opaque = s;
 618     s->dma_in->client.opaque = s;
 619     s->dma_in->client.pull = NULL;
 620
 621     memory_region_init_io(&s->mmio, OBJECT(dev), &eth_ops, s,
 622                           "etraxfs-eth", 0x5c);
 623     sysbus_init_mmio(sbd, &s->mmio);
 624
 625     qemu_macaddr_default_if_unset(&s->conf.macaddr);
 626     s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
 627                           object_get_typename(OBJECT(s)), dev->id, s);
 628     qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
 629
 630     s->phy.read = tdk_read;
 631     s->phy.write = tdk_write;
 632     mdio_attach(&s->mdio_bus, &s->phy, s->phyaddr);
 633 }
 634
 635 static Property etraxfs_eth_properties[] = {
 636     DEFINE_PROP_UINT32("phyaddr", ETRAXFSEthState, phyaddr, 1),
 637     DEFINE_PROP_PTR("dma_out", ETRAXFSEthState, vdma_out),
 638     DEFINE_PROP_PTR("dma_in", ETRAXFSEthState, vdma_in),
 639     DEFINE_NIC_PROPERTIES(ETRAXFSEthState, conf),
 640     DEFINE_PROP_END_OF_LIST(),
 641 };
 642
 643 static void etraxfs_eth_class_init(ObjectClass *klass, void *data)
 644 {
 645     DeviceClass *dc = DEVICE_CLASS(klass);
 646
 647     dc->realize = etraxfs_eth_realize;
 648     dc->reset = etraxfs_eth_reset;
 649     dc->props = etraxfs_eth_properties;
 650     /* Reason: pointer properties "dma_out", "dma_in" */
 651     dc->user_creatable = false;
 652 }
 653
 654 static const TypeInfo etraxfs_eth_info = {
 655     .name          = TYPE_ETRAX_FS_ETH,
 656     .parent        = TYPE_SYS_BUS_DEVICE,
 657     .instance_size = sizeof(ETRAXFSEthState),
 658     .class_init    = etraxfs_eth_class_init,
 659 };
 660
 661 static void etraxfs_eth_register_types(void)
 662 {
 663     type_register_static(&etraxfs_eth_info);
 664 }
 665
 666 type_init(etraxfs_eth_register_types)