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Direct dispatch through MemoryRegion
[qemu/kevin.git] / memory.c
blob25b36ff9d6d9632f06cfdbcf962e977dbc96bcc5
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 */
13
14 #include "memory.h"
15 #include "exec-memory.h"
16 #include "ioport.h"
17 #include "bitops.h"
18 #include "kvm.h"
19 #include <assert.h>
20
21 #define WANT_EXEC_OBSOLETE
22 #include "exec-obsolete.h"
23
24 unsigned memory_region_transaction_depth = 0;
25 static bool memory_region_update_pending = false;
26 static bool global_dirty_log = false;
27
28 static QLIST_HEAD(, MemoryListener) memory_listeners
29 = QLIST_HEAD_INITIALIZER(memory_listeners);
30
31 typedef struct AddrRange AddrRange;
32
33 /*
34 * Note using signed integers limits us to physical addresses at most
35 * 63 bits wide. They are needed for negative offsetting in aliases
36 * (large MemoryRegion::alias_offset).
37 */
38 struct AddrRange {
39 Int128 start;
40 Int128 size;
41 };
42
43 static AddrRange addrrange_make(Int128 start, Int128 size)
44 {
45 return (AddrRange) { start, size };
46 }
47
48 static bool addrrange_equal(AddrRange r1, AddrRange r2)
49 {
50 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
51 }
52
53 static Int128 addrrange_end(AddrRange r)
54 {
55 return int128_add(r.start, r.size);
56 }
57
58 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
59 {
60 int128_addto(&range.start, delta);
61 return range;
62 }
63
64 static bool addrrange_contains(AddrRange range, Int128 addr)
65 {
66 return int128_ge(addr, range.start)
67 && int128_lt(addr, addrrange_end(range));
68 }
69
70 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
71 {
72 return addrrange_contains(r1, r2.start)
73 || addrrange_contains(r2, r1.start);
74 }
75
76 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
77 {
78 Int128 start = int128_max(r1.start, r2.start);
79 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
80 return addrrange_make(start, int128_sub(end, start));
81 }
82
83 struct CoalescedMemoryRange {
84 AddrRange addr;
85 QTAILQ_ENTRY(CoalescedMemoryRange) link;
86 };
87
88 struct MemoryRegionIoeventfd {
89 AddrRange addr;
90 bool match_data;
91 uint64_t data;
92 int fd;
93 };
94
95 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
96 MemoryRegionIoeventfd b)
97 {
98 if (int128_lt(a.addr.start, b.addr.start)) {
99 return true;
100 } else if (int128_gt(a.addr.start, b.addr.start)) {
101 return false;
102 } else if (int128_lt(a.addr.size, b.addr.size)) {
103 return true;
104 } else if (int128_gt(a.addr.size, b.addr.size)) {
105 return false;
106 } else if (a.match_data < b.match_data) {
107 return true;
108 } else if (a.match_data > b.match_data) {
109 return false;
110 } else if (a.match_data) {
111 if (a.data < b.data) {
112 return true;
113 } else if (a.data > b.data) {
114 return false;
115 }
116 }
117 if (a.fd < b.fd) {
118 return true;
119 } else if (a.fd > b.fd) {
120 return false;
121 }
122 return false;
123 }
124
125 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
126 MemoryRegionIoeventfd b)
127 {
128 return !memory_region_ioeventfd_before(a, b)
129 && !memory_region_ioeventfd_before(b, a);
130 }
131
132 typedef struct FlatRange FlatRange;
133 typedef struct FlatView FlatView;
134
135 /* Range of memory in the global map. Addresses are absolute. */
136 struct FlatRange {
137 MemoryRegion *mr;
138 target_phys_addr_t offset_in_region;
139 AddrRange addr;
140 uint8_t dirty_log_mask;
141 bool readable;
142 bool readonly;
143 };
144
145 /* Flattened global view of current active memory hierarchy. Kept in sorted
146 * order.
147 */
148 struct FlatView {
149 FlatRange *ranges;
150 unsigned nr;
151 unsigned nr_allocated;
152 };
153
154 typedef struct AddressSpace AddressSpace;
155 typedef struct AddressSpaceOps AddressSpaceOps;
156
157 /* A system address space - I/O, memory, etc. */
158 struct AddressSpace {
159 const AddressSpaceOps *ops;
160 MemoryRegion *root;
161 FlatView current_map;
162 int ioeventfd_nb;
163 MemoryRegionIoeventfd *ioeventfds;
164 };
165
166 struct AddressSpaceOps {
167 void (*range_add)(AddressSpace *as, FlatRange *fr);
168 void (*range_del)(AddressSpace *as, FlatRange *fr);
169 void (*log_start)(AddressSpace *as, FlatRange *fr);
170 void (*log_stop)(AddressSpace *as, FlatRange *fr);
171 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
172 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
173 };
174
175 #define FOR_EACH_FLAT_RANGE(var, view) \
176 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
177
178 static bool flatrange_equal(FlatRange *a, FlatRange *b)
179 {
180 return a->mr == b->mr
181 && addrrange_equal(a->addr, b->addr)
182 && a->offset_in_region == b->offset_in_region
183 && a->readable == b->readable
184 && a->readonly == b->readonly;
185 }
186
187 static void flatview_init(FlatView *view)
188 {
189 view->ranges = NULL;
190 view->nr = 0;
191 view->nr_allocated = 0;
192 }
193
194 /* Insert a range into a given position. Caller is responsible for maintaining
195 * sorting order.
196 */
197 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
198 {
199 if (view->nr == view->nr_allocated) {
200 view->nr_allocated = MAX(2 * view->nr, 10);
201 view->ranges = g_realloc(view->ranges,
202 view->nr_allocated * sizeof(*view->ranges));
203 }
204 memmove(view->ranges + pos + 1, view->ranges + pos,
205 (view->nr - pos) * sizeof(FlatRange));
206 view->ranges[pos] = *range;
207 ++view->nr;
208 }
209
210 static void flatview_destroy(FlatView *view)
211 {
212 g_free(view->ranges);
213 }
214
215 static bool can_merge(FlatRange *r1, FlatRange *r2)
216 {
217 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
218 && r1->mr == r2->mr
219 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
220 r1->addr.size),
221 int128_make64(r2->offset_in_region))
222 && r1->dirty_log_mask == r2->dirty_log_mask
223 && r1->readable == r2->readable
224 && r1->readonly == r2->readonly;
225 }
226
227 /* Attempt to simplify a view by merging ajacent ranges */
228 static void flatview_simplify(FlatView *view)
229 {
230 unsigned i, j;
231
232 i = 0;
233 while (i < view->nr) {
234 j = i + 1;
235 while (j < view->nr
236 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
237 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
238 ++j;
239 }
240 ++i;
241 memmove(&view->ranges[i], &view->ranges[j],
242 (view->nr - j) * sizeof(view->ranges[j]));
243 view->nr -= j - i;
244 }
245 }
246
247 static void memory_region_read_accessor(void *opaque,
248 target_phys_addr_t addr,
249 uint64_t *value,
250 unsigned size,
251 unsigned shift,
252 uint64_t mask)
253 {
254 MemoryRegion *mr = opaque;
255 uint64_t tmp;
256
257 tmp = mr->ops->read(mr->opaque, addr, size);
258 *value |= (tmp & mask) << shift;
259 }
260
261 static void memory_region_write_accessor(void *opaque,
262 target_phys_addr_t addr,
263 uint64_t *value,
264 unsigned size,
265 unsigned shift,
266 uint64_t mask)
267 {
268 MemoryRegion *mr = opaque;
269 uint64_t tmp;
270
271 tmp = (*value >> shift) & mask;
272 mr->ops->write(mr->opaque, addr, tmp, size);
273 }
274
275 static void access_with_adjusted_size(target_phys_addr_t addr,
276 uint64_t *value,
277 unsigned size,
278 unsigned access_size_min,
279 unsigned access_size_max,
280 void (*access)(void *opaque,
281 target_phys_addr_t addr,
282 uint64_t *value,
283 unsigned size,
284 unsigned shift,
285 uint64_t mask),
286 void *opaque)
287 {
288 uint64_t access_mask;
289 unsigned access_size;
290 unsigned i;
291
292 if (!access_size_min) {
293 access_size_min = 1;
294 }
295 if (!access_size_max) {
296 access_size_max = 4;
297 }
298 access_size = MAX(MIN(size, access_size_max), access_size_min);
299 access_mask = -1ULL >> (64 - access_size * 8);
300 for (i = 0; i < size; i += access_size) {
301 /* FIXME: big-endian support */
302 access(opaque, addr + i, value, access_size, i * 8, access_mask);
303 }
304 }
305
306 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
307 {
308 MemoryRegionSection section = {
309 .mr = fr->mr,
310 .offset_within_address_space = int128_get64(fr->addr.start),
311 .offset_within_region = fr->offset_in_region,
312 .size = int128_get64(fr->addr.size),
313 };
314
315 cpu_register_physical_memory_log(&section, fr->readable, fr->readonly);
316 }
317
318 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
319 {
320 MemoryRegionSection section = {
321 .mr = &io_mem_unassigned,
322 .offset_within_address_space = int128_get64(fr->addr.start),
323 .offset_within_region = int128_get64(fr->addr.start),
324 .size = int128_get64(fr->addr.size),
325 };
326
327 cpu_register_physical_memory_log(&section, true, false);
328 }
329
330 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
331 {
332 }
333
334 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
335 {
336 }
337
338 static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
339 {
340 int r;
341
342 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
343
344 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
345 fd->data, true);
346 if (r < 0) {
347 abort();
348 }
349 }
350
351 static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
352 {
353 int r;
354
355 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
356 fd->data, false);
357 if (r < 0) {
358 abort();
359 }
360 }
361
362 static const AddressSpaceOps address_space_ops_memory = {
363 .range_add = as_memory_range_add,
364 .range_del = as_memory_range_del,
365 .log_start = as_memory_log_start,
366 .log_stop = as_memory_log_stop,
367 .ioeventfd_add = as_memory_ioeventfd_add,
368 .ioeventfd_del = as_memory_ioeventfd_del,
369 };
370
371 static AddressSpace address_space_memory = {
372 .ops = &address_space_ops_memory,
373 };
374
375 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
376 unsigned width, bool write)
377 {
378 const MemoryRegionPortio *mrp;
379
380 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
381 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
382 && width == mrp->size
383 && (write ? (bool)mrp->write : (bool)mrp->read)) {
384 return mrp;
385 }
386 }
387 return NULL;
388 }
389
390 static void memory_region_iorange_read(IORange *iorange,
391 uint64_t offset,
392 unsigned width,
393 uint64_t *data)
394 {
395 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
396
397 if (mr->ops->old_portio) {
398 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
399
400 *data = ((uint64_t)1 << (width * 8)) - 1;
401 if (mrp) {
402 *data = mrp->read(mr->opaque, offset + mr->offset);
403 } else if (width == 2) {
404 mrp = find_portio(mr, offset, 1, false);
405 assert(mrp);
406 *data = mrp->read(mr->opaque, offset + mr->offset) |
407 (mrp->read(mr->opaque, offset + mr->offset + 1) << 8);
408 }
409 return;
410 }
411 *data = 0;
412 access_with_adjusted_size(offset + mr->offset, data, width,
413 mr->ops->impl.min_access_size,
414 mr->ops->impl.max_access_size,
415 memory_region_read_accessor, mr);
416 }
417
418 static void memory_region_iorange_write(IORange *iorange,
419 uint64_t offset,
420 unsigned width,
421 uint64_t data)
422 {
423 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
424
425 if (mr->ops->old_portio) {
426 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
427
428 if (mrp) {
429 mrp->write(mr->opaque, offset + mr->offset, data);
430 } else if (width == 2) {
431 mrp = find_portio(mr, offset, 1, false);
432 assert(mrp);
433 mrp->write(mr->opaque, offset + mr->offset, data & 0xff);
434 mrp->write(mr->opaque, offset + mr->offset + 1, data >> 8);
435 }
436 return;
437 }
438 access_with_adjusted_size(offset + mr->offset, &data, width,
439 mr->ops->impl.min_access_size,
440 mr->ops->impl.max_access_size,
441 memory_region_write_accessor, mr);
442 }
443
444 static const IORangeOps memory_region_iorange_ops = {
445 .read = memory_region_iorange_read,
446 .write = memory_region_iorange_write,
447 };
448
449 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
450 {
451 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
452 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
453 ioport_register(&fr->mr->iorange);
454 }
455
456 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
457 {
458 isa_unassign_ioport(int128_get64(fr->addr.start),
459 int128_get64(fr->addr.size));
460 }
461
462 static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
463 {
464 int r;
465
466 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
467
468 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
469 fd->data, true);
470 if (r < 0) {
471 abort();
472 }
473 }
474
475 static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
476 {
477 int r;
478
479 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
480 fd->data, false);
481 if (r < 0) {
482 abort();
483 }
484 }
485
486 static const AddressSpaceOps address_space_ops_io = {
487 .range_add = as_io_range_add,
488 .range_del = as_io_range_del,
489 .ioeventfd_add = as_io_ioeventfd_add,
490 .ioeventfd_del = as_io_ioeventfd_del,
491 };
492
493 static AddressSpace address_space_io = {
494 .ops = &address_space_ops_io,
495 };
496
497 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
498 {
499 while (mr->parent) {
500 mr = mr->parent;
501 }
502 if (mr == address_space_memory.root) {
503 return &address_space_memory;
504 }
505 if (mr == address_space_io.root) {
506 return &address_space_io;
507 }
508 abort();
509 }
510
511 /* Render a memory region into the global view. Ranges in @view obscure
512 * ranges in @mr.
513 */
514 static void render_memory_region(FlatView *view,
515 MemoryRegion *mr,
516 Int128 base,
517 AddrRange clip,
518 bool readonly)
519 {
520 MemoryRegion *subregion;
521 unsigned i;
522 target_phys_addr_t offset_in_region;
523 Int128 remain;
524 Int128 now;
525 FlatRange fr;
526 AddrRange tmp;
527
528 if (!mr->enabled) {
529 return;
530 }
531
532 int128_addto(&base, int128_make64(mr->addr));
533 readonly |= mr->readonly;
534
535 tmp = addrrange_make(base, mr->size);
536
537 if (!addrrange_intersects(tmp, clip)) {
538 return;
539 }
540
541 clip = addrrange_intersection(tmp, clip);
542
543 if (mr->alias) {
544 int128_subfrom(&base, int128_make64(mr->alias->addr));
545 int128_subfrom(&base, int128_make64(mr->alias_offset));
546 render_memory_region(view, mr->alias, base, clip, readonly);
547 return;
548 }
549
550 /* Render subregions in priority order. */
551 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
552 render_memory_region(view, subregion, base, clip, readonly);
553 }
554
555 if (!mr->terminates) {
556 return;
557 }
558
559 offset_in_region = int128_get64(int128_sub(clip.start, base));
560 base = clip.start;
561 remain = clip.size;
562
563 /* Render the region itself into any gaps left by the current view. */
564 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
565 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
566 continue;
567 }
568 if (int128_lt(base, view->ranges[i].addr.start)) {
569 now = int128_min(remain,
570 int128_sub(view->ranges[i].addr.start, base));
571 fr.mr = mr;
572 fr.offset_in_region = offset_in_region;
573 fr.addr = addrrange_make(base, now);
574 fr.dirty_log_mask = mr->dirty_log_mask;
575 fr.readable = mr->readable;
576 fr.readonly = readonly;
577 flatview_insert(view, i, &fr);
578 ++i;
579 int128_addto(&base, now);
580 offset_in_region += int128_get64(now);
581 int128_subfrom(&remain, now);
582 }
583 if (int128_eq(base, view->ranges[i].addr.start)) {
584 now = int128_min(remain, view->ranges[i].addr.size);
585 int128_addto(&base, now);
586 offset_in_region += int128_get64(now);
587 int128_subfrom(&remain, now);
588 }
589 }
590 if (int128_nz(remain)) {
591 fr.mr = mr;
592 fr.offset_in_region = offset_in_region;
593 fr.addr = addrrange_make(base, remain);
594 fr.dirty_log_mask = mr->dirty_log_mask;
595 fr.readable = mr->readable;
596 fr.readonly = readonly;
597 flatview_insert(view, i, &fr);
598 }
599 }
600
601 /* Render a memory topology into a list of disjoint absolute ranges. */
602 static FlatView generate_memory_topology(MemoryRegion *mr)
603 {
604 FlatView view;
605
606 flatview_init(&view);
607
608 render_memory_region(&view, mr, int128_zero(),
609 addrrange_make(int128_zero(), int128_2_64()), false);
610 flatview_simplify(&view);
611
612 return view;
613 }
614
615 static void address_space_add_del_ioeventfds(AddressSpace *as,
616 MemoryRegionIoeventfd *fds_new,
617 unsigned fds_new_nb,
618 MemoryRegionIoeventfd *fds_old,
619 unsigned fds_old_nb)
620 {
621 unsigned iold, inew;
622
623 /* Generate a symmetric difference of the old and new fd sets, adding
624 * and deleting as necessary.
625 */
626
627 iold = inew = 0;
628 while (iold < fds_old_nb || inew < fds_new_nb) {
629 if (iold < fds_old_nb
630 && (inew == fds_new_nb
631 || memory_region_ioeventfd_before(fds_old[iold],
632 fds_new[inew]))) {
633 as->ops->ioeventfd_del(as, &fds_old[iold]);
634 ++iold;
635 } else if (inew < fds_new_nb
636 && (iold == fds_old_nb
637 || memory_region_ioeventfd_before(fds_new[inew],
638 fds_old[iold]))) {
639 as->ops->ioeventfd_add(as, &fds_new[inew]);
640 ++inew;
641 } else {
642 ++iold;
643 ++inew;
644 }
645 }
646 }
647
648 static void address_space_update_ioeventfds(AddressSpace *as)
649 {
650 FlatRange *fr;
651 unsigned ioeventfd_nb = 0;
652 MemoryRegionIoeventfd *ioeventfds = NULL;
653 AddrRange tmp;
654 unsigned i;
655
656 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
657 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
658 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
659 int128_sub(fr->addr.start,
660 int128_make64(fr->offset_in_region)));
661 if (addrrange_intersects(fr->addr, tmp)) {
662 ++ioeventfd_nb;
663 ioeventfds = g_realloc(ioeventfds,
664 ioeventfd_nb * sizeof(*ioeventfds));
665 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
666 ioeventfds[ioeventfd_nb-1].addr = tmp;
667 }
668 }
669 }
670
671 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
672 as->ioeventfds, as->ioeventfd_nb);
673
674 g_free(as->ioeventfds);
675 as->ioeventfds = ioeventfds;
676 as->ioeventfd_nb = ioeventfd_nb;
677 }
678
679 typedef void ListenerCallback(MemoryListener *listener,
680 MemoryRegionSection *mrs);
681
682 /* Want "void (&MemoryListener::*callback)(const MemoryRegionSection& s)" */
683 static void memory_listener_update_region(FlatRange *fr, AddressSpace *as,
684 size_t callback_offset)
685 {
686 MemoryRegionSection section = {
687 .mr = fr->mr,
688 .address_space = as->root,
689 .offset_within_region = fr->offset_in_region,
690 .size = int128_get64(fr->addr.size),
691 .offset_within_address_space = int128_get64(fr->addr.start),
692 };
693 MemoryListener *listener;
694
695 QLIST_FOREACH(listener, &memory_listeners, link) {
696 ListenerCallback *callback
697 = *(ListenerCallback **)((void *)listener + callback_offset);
698 callback(listener, &section);
699 }
700 }
701
702 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, callback) \
703 memory_listener_update_region(fr, as, offsetof(MemoryListener, callback))
704
705 static void address_space_update_topology_pass(AddressSpace *as,
706 FlatView old_view,
707 FlatView new_view,
708 bool adding)
709 {
710 unsigned iold, inew;
711 FlatRange *frold, *frnew;
712
713 /* Generate a symmetric difference of the old and new memory maps.
714 * Kill ranges in the old map, and instantiate ranges in the new map.
715 */
716 iold = inew = 0;
717 while (iold < old_view.nr || inew < new_view.nr) {
718 if (iold < old_view.nr) {
719 frold = &old_view.ranges[iold];
720 } else {
721 frold = NULL;
722 }
723 if (inew < new_view.nr) {
724 frnew = &new_view.ranges[inew];
725 } else {
726 frnew = NULL;
727 }
728
729 if (frold
730 && (!frnew
731 || int128_lt(frold->addr.start, frnew->addr.start)
732 || (int128_eq(frold->addr.start, frnew->addr.start)
733 && !flatrange_equal(frold, frnew)))) {
734 /* In old, but (not in new, or in new but attributes changed). */
735
736 if (!adding) {
737 MEMORY_LISTENER_UPDATE_REGION(frold, as, region_del);
738 as->ops->range_del(as, frold);
739 }
740
741 ++iold;
742 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
743 /* In both (logging may have changed) */
744
745 if (adding) {
746 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
747 MEMORY_LISTENER_UPDATE_REGION(frnew, as, log_stop);
748 as->ops->log_stop(as, frnew);
749 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
750 as->ops->log_start(as, frnew);
751 MEMORY_LISTENER_UPDATE_REGION(frnew, as, log_start);
752 }
753 }
754
755 ++iold;
756 ++inew;
757 } else {
758 /* In new */
759
760 if (adding) {
761 as->ops->range_add(as, frnew);
762 MEMORY_LISTENER_UPDATE_REGION(frnew, as, region_add);
763 }
764
765 ++inew;
766 }
767 }
768 }
769
770
771 static void address_space_update_topology(AddressSpace *as)
772 {
773 FlatView old_view = as->current_map;
774 FlatView new_view = generate_memory_topology(as->root);
775
776 address_space_update_topology_pass(as, old_view, new_view, false);
777 address_space_update_topology_pass(as, old_view, new_view, true);
778
779 as->current_map = new_view;
780 flatview_destroy(&old_view);
781 address_space_update_ioeventfds(as);
782 }
783
784 static void memory_region_update_topology(MemoryRegion *mr)
785 {
786 if (memory_region_transaction_depth) {
787 memory_region_update_pending |= !mr || mr->enabled;
788 return;
789 }
790
791 if (mr && !mr->enabled) {
792 return;
793 }
794
795 if (address_space_memory.root) {
796 address_space_update_topology(&address_space_memory);
797 }
798 if (address_space_io.root) {
799 address_space_update_topology(&address_space_io);
800 }
801
802 memory_region_update_pending = false;
803 }
804
805 void memory_region_transaction_begin(void)
806 {
807 ++memory_region_transaction_depth;
808 }
809
810 void memory_region_transaction_commit(void)
811 {
812 assert(memory_region_transaction_depth);
813 --memory_region_transaction_depth;
814 if (!memory_region_transaction_depth && memory_region_update_pending) {
815 memory_region_update_topology(NULL);
816 }
817 }
818
819 static void memory_region_destructor_none(MemoryRegion *mr)
820 {
821 }
822
823 static void memory_region_destructor_ram(MemoryRegion *mr)
824 {
825 qemu_ram_free(mr->ram_addr);
826 }
827
828 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
829 {
830 qemu_ram_free_from_ptr(mr->ram_addr);
831 }
832
833 static void memory_region_destructor_iomem(MemoryRegion *mr)
834 {
835 cpu_unregister_io_memory(mr->ram_addr);
836 }
837
838 static void memory_region_destructor_rom_device(MemoryRegion *mr)
839 {
840 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
841 cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
842 }
843
844 static bool memory_region_wrong_endianness(MemoryRegion *mr)
845 {
846 #ifdef TARGET_BIG_ENDIAN
847 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
848 #else
849 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
850 #endif
851 }
852
853 void memory_region_init(MemoryRegion *mr,
854 const char *name,
855 uint64_t size)
856 {
857 mr->ops = NULL;
858 mr->parent = NULL;
859 mr->size = int128_make64(size);
860 if (size == UINT64_MAX) {
861 mr->size = int128_2_64();
862 }
863 mr->addr = 0;
864 mr->offset = 0;
865 mr->enabled = true;
866 mr->terminates = false;
867 mr->ram = false;
868 mr->readable = true;
869 mr->readonly = false;
870 mr->destructor = memory_region_destructor_none;
871 mr->priority = 0;
872 mr->may_overlap = false;
873 mr->alias = NULL;
874 QTAILQ_INIT(&mr->subregions);
875 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
876 QTAILQ_INIT(&mr->coalesced);
877 mr->name = g_strdup(name);
878 mr->dirty_log_mask = 0;
879 mr->ioeventfd_nb = 0;
880 mr->ioeventfds = NULL;
881 }
882
883 static bool memory_region_access_valid(MemoryRegion *mr,
884 target_phys_addr_t addr,
885 unsigned size,
886 bool is_write)
887 {
888 if (mr->ops->valid.accepts
889 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
890 return false;
891 }
892
893 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
894 return false;
895 }
896
897 /* Treat zero as compatibility all valid */
898 if (!mr->ops->valid.max_access_size) {
899 return true;
900 }
901
902 if (size > mr->ops->valid.max_access_size
903 || size < mr->ops->valid.min_access_size) {
904 return false;
905 }
906 return true;
907 }
908
909 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
910 target_phys_addr_t addr,
911 unsigned size)
912 {
913 uint64_t data = 0;
914
915 if (!memory_region_access_valid(mr, addr, size, false)) {
916 return -1U; /* FIXME: better signalling */
917 }
918
919 if (!mr->ops->read) {
920 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
921 }
922
923 /* FIXME: support unaligned access */
924 access_with_adjusted_size(addr + mr->offset, &data, size,
925 mr->ops->impl.min_access_size,
926 mr->ops->impl.max_access_size,
927 memory_region_read_accessor, mr);
928
929 return data;
930 }
931
932 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
933 {
934 if (memory_region_wrong_endianness(mr)) {
935 switch (size) {
936 case 1:
937 break;
938 case 2:
939 *data = bswap16(*data);
940 break;
941 case 4:
942 *data = bswap32(*data);
943 default:
944 abort();
945 }
946 }
947 }
948
949 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
950 target_phys_addr_t addr,
951 unsigned size)
952 {
953 uint64_t ret;
954
955 ret = memory_region_dispatch_read1(mr, addr, size);
956 adjust_endianness(mr, &ret, size);
957 return ret;
958 }
959
960 static void memory_region_dispatch_write(MemoryRegion *mr,
961 target_phys_addr_t addr,
962 uint64_t data,
963 unsigned size)
964 {
965 if (!memory_region_access_valid(mr, addr, size, true)) {
966 return; /* FIXME: better signalling */
967 }
968
969 adjust_endianness(mr, &data, size);
970
971 if (!mr->ops->write) {
972 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
973 return;
974 }
975
976 /* FIXME: support unaligned access */
977 access_with_adjusted_size(addr + mr->offset, &data, size,
978 mr->ops->impl.min_access_size,
979 mr->ops->impl.max_access_size,
980 memory_region_write_accessor, mr);
981 }
982
983 void memory_region_init_io(MemoryRegion *mr,
984 const MemoryRegionOps *ops,
985 void *opaque,
986 const char *name,
987 uint64_t size)
988 {
989 memory_region_init(mr, name, size);
990 mr->ops = ops;
991 mr->opaque = opaque;
992 mr->terminates = true;
993 mr->destructor = memory_region_destructor_iomem;
994 mr->ram_addr = cpu_register_io_memory(mr);
995 }
996
997 void memory_region_init_ram(MemoryRegion *mr,
998 const char *name,
999 uint64_t size)
1000 {
1001 memory_region_init(mr, name, size);
1002 mr->ram = true;
1003 mr->terminates = true;
1004 mr->destructor = memory_region_destructor_ram;
1005 mr->ram_addr = qemu_ram_alloc(size, mr);
1006 }
1007
1008 void memory_region_init_ram_ptr(MemoryRegion *mr,
1009 const char *name,
1010 uint64_t size,
1011 void *ptr)
1012 {
1013 memory_region_init(mr, name, size);
1014 mr->ram = true;
1015 mr->terminates = true;
1016 mr->destructor = memory_region_destructor_ram_from_ptr;
1017 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1018 }
1019
1020 void memory_region_init_alias(MemoryRegion *mr,
1021 const char *name,
1022 MemoryRegion *orig,
1023 target_phys_addr_t offset,
1024 uint64_t size)
1025 {
1026 memory_region_init(mr, name, size);
1027 mr->alias = orig;
1028 mr->alias_offset = offset;
1029 }
1030
1031 void memory_region_init_rom_device(MemoryRegion *mr,
1032 const MemoryRegionOps *ops,
1033 void *opaque,
1034 const char *name,
1035 uint64_t size)
1036 {
1037 memory_region_init(mr, name, size);
1038 mr->ops = ops;
1039 mr->opaque = opaque;
1040 mr->terminates = true;
1041 mr->destructor = memory_region_destructor_rom_device;
1042 mr->ram_addr = qemu_ram_alloc(size, mr);
1043 mr->ram_addr |= cpu_register_io_memory(mr);
1044 mr->ram_addr |= IO_MEM_ROMD;
1045 }
1046
1047 void memory_region_destroy(MemoryRegion *mr)
1048 {
1049 assert(QTAILQ_EMPTY(&mr->subregions));
1050 mr->destructor(mr);
1051 memory_region_clear_coalescing(mr);
1052 g_free((char *)mr->name);
1053 g_free(mr->ioeventfds);
1054 }
1055
1056 uint64_t memory_region_size(MemoryRegion *mr)
1057 {
1058 if (int128_eq(mr->size, int128_2_64())) {
1059 return UINT64_MAX;
1060 }
1061 return int128_get64(mr->size);
1062 }
1063
1064 const char *memory_region_name(MemoryRegion *mr)
1065 {
1066 return mr->name;
1067 }
1068
1069 bool memory_region_is_ram(MemoryRegion *mr)
1070 {
1071 return mr->ram;
1072 }
1073
1074 bool memory_region_is_logging(MemoryRegion *mr)
1075 {
1076 return mr->dirty_log_mask;
1077 }
1078
1079 bool memory_region_is_rom(MemoryRegion *mr)
1080 {
1081 return mr->ram && mr->readonly;
1082 }
1083
1084 void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
1085 {
1086 mr->offset = offset;
1087 }
1088
1089 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1090 {
1091 uint8_t mask = 1 << client;
1092
1093 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1094 memory_region_update_topology(mr);
1095 }
1096
1097 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1098 unsigned client)
1099 {
1100 assert(mr->terminates);
1101 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client);
1102 }
1103
1104 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
1105 {
1106 assert(mr->terminates);
1107 return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
1108 }
1109
1110 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1111 {
1112 FlatRange *fr;
1113
1114 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1115 if (fr->mr == mr) {
1116 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, log_sync);
1117 }
1118 }
1119 }
1120
1121 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1122 {
1123 if (mr->readonly != readonly) {
1124 mr->readonly = readonly;
1125 memory_region_update_topology(mr);
1126 }
1127 }
1128
1129 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1130 {
1131 if (mr->readable != readable) {
1132 mr->readable = readable;
1133 memory_region_update_topology(mr);
1134 }
1135 }
1136
1137 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1138 target_phys_addr_t size, unsigned client)
1139 {
1140 assert(mr->terminates);
1141 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1142 mr->ram_addr + addr + size,
1143 1 << client);
1144 }
1145
1146 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1147 {
1148 if (mr->alias) {
1149 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1150 }
1151
1152 assert(mr->terminates);
1153
1154 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1155 }
1156
1157 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1158 {
1159 FlatRange *fr;
1160 CoalescedMemoryRange *cmr;
1161 AddrRange tmp;
1162
1163 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1164 if (fr->mr == mr) {
1165 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1166 int128_get64(fr->addr.size));
1167 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1168 tmp = addrrange_shift(cmr->addr,
1169 int128_sub(fr->addr.start,
1170 int128_make64(fr->offset_in_region)));
1171 if (!addrrange_intersects(tmp, fr->addr)) {
1172 continue;
1173 }
1174 tmp = addrrange_intersection(tmp, fr->addr);
1175 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1176 int128_get64(tmp.size));
1177 }
1178 }
1179 }
1180 }
1181
1182 void memory_region_set_coalescing(MemoryRegion *mr)
1183 {
1184 memory_region_clear_coalescing(mr);
1185 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1186 }
1187
1188 void memory_region_add_coalescing(MemoryRegion *mr,
1189 target_phys_addr_t offset,
1190 uint64_t size)
1191 {
1192 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1193
1194 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1195 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1196 memory_region_update_coalesced_range(mr);
1197 }
1198
1199 void memory_region_clear_coalescing(MemoryRegion *mr)
1200 {
1201 CoalescedMemoryRange *cmr;
1202
1203 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1204 cmr = QTAILQ_FIRST(&mr->coalesced);
1205 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1206 g_free(cmr);
1207 }
1208 memory_region_update_coalesced_range(mr);
1209 }
1210
1211 void memory_region_add_eventfd(MemoryRegion *mr,
1212 target_phys_addr_t addr,
1213 unsigned size,
1214 bool match_data,
1215 uint64_t data,
1216 int fd)
1217 {
1218 MemoryRegionIoeventfd mrfd = {
1219 .addr.start = int128_make64(addr),
1220 .addr.size = int128_make64(size),
1221 .match_data = match_data,
1222 .data = data,
1223 .fd = fd,
1224 };
1225 unsigned i;
1226
1227 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1228 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1229 break;
1230 }
1231 }
1232 ++mr->ioeventfd_nb;
1233 mr->ioeventfds = g_realloc(mr->ioeventfds,
1234 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1235 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1236 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1237 mr->ioeventfds[i] = mrfd;
1238 memory_region_update_topology(mr);
1239 }
1240
1241 void memory_region_del_eventfd(MemoryRegion *mr,
1242 target_phys_addr_t addr,
1243 unsigned size,
1244 bool match_data,
1245 uint64_t data,
1246 int fd)
1247 {
1248 MemoryRegionIoeventfd mrfd = {
1249 .addr.start = int128_make64(addr),
1250 .addr.size = int128_make64(size),
1251 .match_data = match_data,
1252 .data = data,
1253 .fd = fd,
1254 };
1255 unsigned i;
1256
1257 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1258 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1259 break;
1260 }
1261 }
1262 assert(i != mr->ioeventfd_nb);
1263 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1264 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1265 --mr->ioeventfd_nb;
1266 mr->ioeventfds = g_realloc(mr->ioeventfds,
1267 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1268 memory_region_update_topology(mr);
1269 }
1270
1271 static void memory_region_add_subregion_common(MemoryRegion *mr,
1272 target_phys_addr_t offset,
1273 MemoryRegion *subregion)
1274 {
1275 MemoryRegion *other;
1276
1277 assert(!subregion->parent);
1278 subregion->parent = mr;
1279 subregion->addr = offset;
1280 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1281 if (subregion->may_overlap || other->may_overlap) {
1282 continue;
1283 }
1284 if (int128_gt(int128_make64(offset),
1285 int128_add(int128_make64(other->addr), other->size))
1286 || int128_le(int128_add(int128_make64(offset), subregion->size),
1287 int128_make64(other->addr))) {
1288 continue;
1289 }
1290 #if 0
1291 printf("warning: subregion collision %llx/%llx (%s) "
1292 "vs %llx/%llx (%s)\n",
1293 (unsigned long long)offset,
1294 (unsigned long long)int128_get64(subregion->size),
1295 subregion->name,
1296 (unsigned long long)other->addr,
1297 (unsigned long long)int128_get64(other->size),
1298 other->name);
1299 #endif
1300 }
1301 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1302 if (subregion->priority >= other->priority) {
1303 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1304 goto done;
1305 }
1306 }
1307 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1308 done:
1309 memory_region_update_topology(mr);
1310 }
1311
1312
1313 void memory_region_add_subregion(MemoryRegion *mr,
1314 target_phys_addr_t offset,
1315 MemoryRegion *subregion)
1316 {
1317 subregion->may_overlap = false;
1318 subregion->priority = 0;
1319 memory_region_add_subregion_common(mr, offset, subregion);
1320 }
1321
1322 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1323 target_phys_addr_t offset,
1324 MemoryRegion *subregion,
1325 unsigned priority)
1326 {
1327 subregion->may_overlap = true;
1328 subregion->priority = priority;
1329 memory_region_add_subregion_common(mr, offset, subregion);
1330 }
1331
1332 void memory_region_del_subregion(MemoryRegion *mr,
1333 MemoryRegion *subregion)
1334 {
1335 assert(subregion->parent == mr);
1336 subregion->parent = NULL;
1337 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1338 memory_region_update_topology(mr);
1339 }
1340
1341 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1342 {
1343 if (enabled == mr->enabled) {
1344 return;
1345 }
1346 mr->enabled = enabled;
1347 memory_region_update_topology(NULL);
1348 }
1349
1350 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1351 {
1352 MemoryRegion *parent = mr->parent;
1353 unsigned priority = mr->priority;
1354 bool may_overlap = mr->may_overlap;
1355
1356 if (addr == mr->addr || !parent) {
1357 mr->addr = addr;
1358 return;
1359 }
1360
1361 memory_region_transaction_begin();
1362 memory_region_del_subregion(parent, mr);
1363 if (may_overlap) {
1364 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1365 } else {
1366 memory_region_add_subregion(parent, addr, mr);
1367 }
1368 memory_region_transaction_commit();
1369 }
1370
1371 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1372 {
1373 target_phys_addr_t old_offset = mr->alias_offset;
1374
1375 assert(mr->alias);
1376 mr->alias_offset = offset;
1377
1378 if (offset == old_offset || !mr->parent) {
1379 return;
1380 }
1381
1382 memory_region_update_topology(mr);
1383 }
1384
1385 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1386 {
1387 return mr->ram_addr;
1388 }
1389
1390 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1391 {
1392 const AddrRange *addr = addr_;
1393 const FlatRange *fr = fr_;
1394
1395 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1396 return -1;
1397 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1398 return 1;
1399 }
1400 return 0;
1401 }
1402
1403 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1404 {
1405 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1406 sizeof(FlatRange), cmp_flatrange_addr);
1407 }
1408
1409 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1410 target_phys_addr_t addr, uint64_t size)
1411 {
1412 AddressSpace *as = memory_region_to_address_space(address_space);
1413 AddrRange range = addrrange_make(int128_make64(addr),
1414 int128_make64(size));
1415 FlatRange *fr = address_space_lookup(as, range);
1416 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1417
1418 if (!fr) {
1419 return ret;
1420 }
1421
1422 while (fr > as->current_map.ranges
1423 && addrrange_intersects(fr[-1].addr, range)) {
1424 --fr;
1425 }
1426
1427 ret.mr = fr->mr;
1428 range = addrrange_intersection(range, fr->addr);
1429 ret.offset_within_region = fr->offset_in_region;
1430 ret.offset_within_region += int128_get64(int128_sub(range.start,
1431 fr->addr.start));
1432 ret.size = int128_get64(range.size);
1433 ret.offset_within_address_space = int128_get64(range.start);
1434 return ret;
1435 }
1436
1437 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1438 {
1439 AddressSpace *as = memory_region_to_address_space(address_space);
1440 FlatRange *fr;
1441
1442 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1443 MEMORY_LISTENER_UPDATE_REGION(fr, as, log_sync);
1444 }
1445 }
1446
1447 void memory_global_dirty_log_start(void)
1448 {
1449 MemoryListener *listener;
1450
1451 cpu_physical_memory_set_dirty_tracking(1);
1452 global_dirty_log = true;
1453 QLIST_FOREACH(listener, &memory_listeners, link) {
1454 listener->log_global_start(listener);
1455 }
1456 }
1457
1458 void memory_global_dirty_log_stop(void)
1459 {
1460 MemoryListener *listener;
1461
1462 global_dirty_log = false;
1463 QLIST_FOREACH(listener, &memory_listeners, link) {
1464 listener->log_global_stop(listener);
1465 }
1466 cpu_physical_memory_set_dirty_tracking(0);
1467 }
1468
1469 static void listener_add_address_space(MemoryListener *listener,
1470 AddressSpace *as)
1471 {
1472 FlatRange *fr;
1473
1474 if (global_dirty_log) {
1475 listener->log_global_start(listener);
1476 }
1477 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1478 MemoryRegionSection section = {
1479 .mr = fr->mr,
1480 .address_space = as->root,
1481 .offset_within_region = fr->offset_in_region,
1482 .size = int128_get64(fr->addr.size),
1483 .offset_within_address_space = int128_get64(fr->addr.start),
1484 };
1485 listener->region_add(listener, &section);
1486 }
1487 }
1488
1489 void memory_listener_register(MemoryListener *listener)
1490 {
1491 QLIST_INSERT_HEAD(&memory_listeners, listener, link);
1492 listener_add_address_space(listener, &address_space_memory);
1493 listener_add_address_space(listener, &address_space_io);
1494 }
1495
1496 void memory_listener_unregister(MemoryListener *listener)
1497 {
1498 QLIST_REMOVE(listener, link);
1499 }
1500
1501 void set_system_memory_map(MemoryRegion *mr)
1502 {
1503 address_space_memory.root = mr;
1504 memory_region_update_topology(NULL);
1505 }
1506
1507 void set_system_io_map(MemoryRegion *mr)
1508 {
1509 address_space_io.root = mr;
1510 memory_region_update_topology(NULL);
1511 }
1512
1513 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1514 {
1515 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1516 }
1517
1518 void io_mem_write(int io_index, target_phys_addr_t addr,
1519 uint64_t val, unsigned size)
1520 {
1521 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1522 }
1523
1524 typedef struct MemoryRegionList MemoryRegionList;
1525
1526 struct MemoryRegionList {
1527 const MemoryRegion *mr;
1528 bool printed;
1529 QTAILQ_ENTRY(MemoryRegionList) queue;
1530 };
1531
1532 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1533
1534 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1535 const MemoryRegion *mr, unsigned int level,
1536 target_phys_addr_t base,
1537 MemoryRegionListHead *alias_print_queue)
1538 {
1539 MemoryRegionList *new_ml, *ml, *next_ml;
1540 MemoryRegionListHead submr_print_queue;
1541 const MemoryRegion *submr;
1542 unsigned int i;
1543
1544 if (!mr) {
1545 return;
1546 }
1547
1548 for (i = 0; i < level; i++) {
1549 mon_printf(f, " ");
1550 }
1551
1552 if (mr->alias) {
1553 MemoryRegionList *ml;
1554 bool found = false;
1555
1556 /* check if the alias is already in the queue */
1557 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1558 if (ml->mr == mr->alias && !ml->printed) {
1559 found = true;
1560 }
1561 }
1562
1563 if (!found) {
1564 ml = g_new(MemoryRegionList, 1);
1565 ml->mr = mr->alias;
1566 ml->printed = false;
1567 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1568 }
1569 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): alias %s @%s "
1570 TARGET_FMT_plx "-" TARGET_FMT_plx "\n",
1571 base + mr->addr,
1572 base + mr->addr
1573 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1574 mr->priority,
1575 mr->name,
1576 mr->alias->name,
1577 mr->alias_offset,
1578 mr->alias_offset
1579 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1580 } else {
1581 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): %s\n",
1582 base + mr->addr,
1583 base + mr->addr
1584 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1585 mr->priority,
1586 mr->name);
1587 }
1588
1589 QTAILQ_INIT(&submr_print_queue);
1590
1591 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1592 new_ml = g_new(MemoryRegionList, 1);
1593 new_ml->mr = submr;
1594 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1595 if (new_ml->mr->addr < ml->mr->addr ||
1596 (new_ml->mr->addr == ml->mr->addr &&
1597 new_ml->mr->priority > ml->mr->priority)) {
1598 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1599 new_ml = NULL;
1600 break;
1601 }
1602 }
1603 if (new_ml) {
1604 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1605 }
1606 }
1607
1608 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1609 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1610 alias_print_queue);
1611 }
1612
1613 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1614 g_free(ml);
1615 }
1616 }
1617
1618 void mtree_info(fprintf_function mon_printf, void *f)
1619 {
1620 MemoryRegionListHead ml_head;
1621 MemoryRegionList *ml, *ml2;
1622
1623 QTAILQ_INIT(&ml_head);
1624
1625 mon_printf(f, "memory\n");
1626 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1627
1628 /* print aliased regions */
1629 QTAILQ_FOREACH(ml, &ml_head, queue) {
1630 if (!ml->printed) {
1631 mon_printf(f, "%s\n", ml->mr->name);
1632 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1633 }
1634 }
1635
1636 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1637 g_free(ml);
1638 }
1639
1640 if (address_space_io.root &&
1641 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1642 QTAILQ_INIT(&ml_head);
1643 mon_printf(f, "I/O\n");
1644 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1645 }
1646 }
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