linux-user: Correct type for BLKSSZGET
[qemu/kevin.git] / user-exec.c
blob95f9f97c5c82480d9730f294001821589c591b17
1 /*
2 * User emulator execution
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "disas/disas.h"
22 #include "exec/exec-all.h"
23 #include "tcg.h"
24 #include "qemu/bitops.h"
25 #include "exec/cpu_ldst.h"
26 #include "translate-all.h"
28 #undef EAX
29 #undef ECX
30 #undef EDX
31 #undef EBX
32 #undef ESP
33 #undef EBP
34 #undef ESI
35 #undef EDI
36 #undef EIP
37 #ifdef __linux__
38 #include <sys/ucontext.h>
39 #endif
41 //#define DEBUG_SIGNAL
43 /* exit the current TB from a signal handler. The host registers are
44 restored in a state compatible with the CPU emulator
46 static void cpu_exit_tb_from_sighandler(CPUState *cpu, sigset_t *old_set)
48 /* XXX: use siglongjmp ? */
49 sigprocmask(SIG_SETMASK, old_set, NULL);
50 cpu_loop_exit_noexc(cpu);
53 /* 'pc' is the host PC at which the exception was raised. 'address' is
54 the effective address of the memory exception. 'is_write' is 1 if a
55 write caused the exception and otherwise 0'. 'old_set' is the
56 signal set which should be restored */
57 static inline int handle_cpu_signal(uintptr_t pc, unsigned long address,
58 int is_write, sigset_t *old_set)
60 CPUState *cpu;
61 CPUClass *cc;
62 int ret;
64 #if defined(DEBUG_SIGNAL)
65 printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
66 pc, address, is_write, *(unsigned long *)old_set);
67 #endif
68 /* XXX: locking issue */
69 if (is_write && h2g_valid(address)) {
70 switch (page_unprotect(h2g(address), pc)) {
71 case 0:
72 /* Fault not caused by a page marked unwritable to protect
73 * cached translations, must be the guest binary's problem
75 break;
76 case 1:
77 /* Fault caused by protection of cached translation; TBs
78 * invalidated, so resume execution
80 return 1;
81 case 2:
82 /* Fault caused by protection of cached translation, and the
83 * currently executing TB was modified and must be exited
84 * immediately.
86 cpu_exit_tb_from_sighandler(current_cpu, old_set);
87 g_assert_not_reached();
88 default:
89 g_assert_not_reached();
93 /* Convert forcefully to guest address space, invalid addresses
94 are still valid segv ones */
95 address = h2g_nocheck(address);
97 cpu = current_cpu;
98 cc = CPU_GET_CLASS(cpu);
99 /* see if it is an MMU fault */
100 g_assert(cc->handle_mmu_fault);
101 ret = cc->handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX);
102 if (ret < 0) {
103 return 0; /* not an MMU fault */
105 if (ret == 0) {
106 return 1; /* the MMU fault was handled without causing real CPU fault */
108 /* now we have a real cpu fault */
109 cpu_restore_state(cpu, pc);
111 sigprocmask(SIG_SETMASK, old_set, NULL);
112 cpu_loop_exit(cpu);
114 /* never comes here */
115 return 1;
118 #if defined(__i386__)
120 #if defined(__NetBSD__)
121 #include <ucontext.h>
123 #define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
124 #define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
125 #define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
126 #define MASK_sig(context) ((context)->uc_sigmask)
127 #elif defined(__FreeBSD__) || defined(__DragonFly__)
128 #include <ucontext.h>
130 #define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip))
131 #define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
132 #define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
133 #define MASK_sig(context) ((context)->uc_sigmask)
134 #elif defined(__OpenBSD__)
135 #define EIP_sig(context) ((context)->sc_eip)
136 #define TRAP_sig(context) ((context)->sc_trapno)
137 #define ERROR_sig(context) ((context)->sc_err)
138 #define MASK_sig(context) ((context)->sc_mask)
139 #else
140 #define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
141 #define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
142 #define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
143 #define MASK_sig(context) ((context)->uc_sigmask)
144 #endif
146 int cpu_signal_handler(int host_signum, void *pinfo,
147 void *puc)
149 siginfo_t *info = pinfo;
150 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
151 ucontext_t *uc = puc;
152 #elif defined(__OpenBSD__)
153 struct sigcontext *uc = puc;
154 #else
155 struct ucontext *uc = puc;
156 #endif
157 unsigned long pc;
158 int trapno;
160 #ifndef REG_EIP
161 /* for glibc 2.1 */
162 #define REG_EIP EIP
163 #define REG_ERR ERR
164 #define REG_TRAPNO TRAPNO
165 #endif
166 pc = EIP_sig(uc);
167 trapno = TRAP_sig(uc);
168 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
169 trapno == 0xe ?
170 (ERROR_sig(uc) >> 1) & 1 : 0,
171 &MASK_sig(uc));
174 #elif defined(__x86_64__)
176 #ifdef __NetBSD__
177 #define PC_sig(context) _UC_MACHINE_PC(context)
178 #define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
179 #define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
180 #define MASK_sig(context) ((context)->uc_sigmask)
181 #elif defined(__OpenBSD__)
182 #define PC_sig(context) ((context)->sc_rip)
183 #define TRAP_sig(context) ((context)->sc_trapno)
184 #define ERROR_sig(context) ((context)->sc_err)
185 #define MASK_sig(context) ((context)->sc_mask)
186 #elif defined(__FreeBSD__) || defined(__DragonFly__)
187 #include <ucontext.h>
189 #define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip))
190 #define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
191 #define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
192 #define MASK_sig(context) ((context)->uc_sigmask)
193 #else
194 #define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
195 #define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
196 #define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
197 #define MASK_sig(context) ((context)->uc_sigmask)
198 #endif
200 int cpu_signal_handler(int host_signum, void *pinfo,
201 void *puc)
203 siginfo_t *info = pinfo;
204 unsigned long pc;
205 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
206 ucontext_t *uc = puc;
207 #elif defined(__OpenBSD__)
208 struct sigcontext *uc = puc;
209 #else
210 struct ucontext *uc = puc;
211 #endif
213 pc = PC_sig(uc);
214 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
215 TRAP_sig(uc) == 0xe ?
216 (ERROR_sig(uc) >> 1) & 1 : 0,
217 &MASK_sig(uc));
220 #elif defined(_ARCH_PPC)
222 /***********************************************************************
223 * signal context platform-specific definitions
224 * From Wine
226 #ifdef linux
227 /* All Registers access - only for local access */
228 #define REG_sig(reg_name, context) \
229 ((context)->uc_mcontext.regs->reg_name)
230 /* Gpr Registers access */
231 #define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context)
232 /* Program counter */
233 #define IAR_sig(context) REG_sig(nip, context)
234 /* Machine State Register (Supervisor) */
235 #define MSR_sig(context) REG_sig(msr, context)
236 /* Count register */
237 #define CTR_sig(context) REG_sig(ctr, context)
238 /* User's integer exception register */
239 #define XER_sig(context) REG_sig(xer, context)
240 /* Link register */
241 #define LR_sig(context) REG_sig(link, context)
242 /* Condition register */
243 #define CR_sig(context) REG_sig(ccr, context)
245 /* Float Registers access */
246 #define FLOAT_sig(reg_num, context) \
247 (((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num])
248 #define FPSCR_sig(context) \
249 (*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4)))
250 /* Exception Registers access */
251 #define DAR_sig(context) REG_sig(dar, context)
252 #define DSISR_sig(context) REG_sig(dsisr, context)
253 #define TRAP_sig(context) REG_sig(trap, context)
254 #endif /* linux */
256 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
257 #include <ucontext.h>
258 #define IAR_sig(context) ((context)->uc_mcontext.mc_srr0)
259 #define MSR_sig(context) ((context)->uc_mcontext.mc_srr1)
260 #define CTR_sig(context) ((context)->uc_mcontext.mc_ctr)
261 #define XER_sig(context) ((context)->uc_mcontext.mc_xer)
262 #define LR_sig(context) ((context)->uc_mcontext.mc_lr)
263 #define CR_sig(context) ((context)->uc_mcontext.mc_cr)
264 /* Exception Registers access */
265 #define DAR_sig(context) ((context)->uc_mcontext.mc_dar)
266 #define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr)
267 #define TRAP_sig(context) ((context)->uc_mcontext.mc_exc)
268 #endif /* __FreeBSD__|| __FreeBSD_kernel__ */
270 int cpu_signal_handler(int host_signum, void *pinfo,
271 void *puc)
273 siginfo_t *info = pinfo;
274 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
275 ucontext_t *uc = puc;
276 #else
277 struct ucontext *uc = puc;
278 #endif
279 unsigned long pc;
280 int is_write;
282 pc = IAR_sig(uc);
283 is_write = 0;
284 #if 0
285 /* ppc 4xx case */
286 if (DSISR_sig(uc) & 0x00800000) {
287 is_write = 1;
289 #else
290 if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) {
291 is_write = 1;
293 #endif
294 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
295 is_write, &uc->uc_sigmask);
298 #elif defined(__alpha__)
300 int cpu_signal_handler(int host_signum, void *pinfo,
301 void *puc)
303 siginfo_t *info = pinfo;
304 struct ucontext *uc = puc;
305 uint32_t *pc = uc->uc_mcontext.sc_pc;
306 uint32_t insn = *pc;
307 int is_write = 0;
309 /* XXX: need kernel patch to get write flag faster */
310 switch (insn >> 26) {
311 case 0x0d: /* stw */
312 case 0x0e: /* stb */
313 case 0x0f: /* stq_u */
314 case 0x24: /* stf */
315 case 0x25: /* stg */
316 case 0x26: /* sts */
317 case 0x27: /* stt */
318 case 0x2c: /* stl */
319 case 0x2d: /* stq */
320 case 0x2e: /* stl_c */
321 case 0x2f: /* stq_c */
322 is_write = 1;
325 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
326 is_write, &uc->uc_sigmask);
328 #elif defined(__sparc__)
330 int cpu_signal_handler(int host_signum, void *pinfo,
331 void *puc)
333 siginfo_t *info = pinfo;
334 int is_write;
335 uint32_t insn;
336 #if !defined(__arch64__) || defined(CONFIG_SOLARIS)
337 uint32_t *regs = (uint32_t *)(info + 1);
338 void *sigmask = (regs + 20);
339 /* XXX: is there a standard glibc define ? */
340 unsigned long pc = regs[1];
341 #else
342 #ifdef __linux__
343 struct sigcontext *sc = puc;
344 unsigned long pc = sc->sigc_regs.tpc;
345 void *sigmask = (void *)sc->sigc_mask;
346 #elif defined(__OpenBSD__)
347 struct sigcontext *uc = puc;
348 unsigned long pc = uc->sc_pc;
349 void *sigmask = (void *)(long)uc->sc_mask;
350 #elif defined(__NetBSD__)
351 ucontext_t *uc = puc;
352 unsigned long pc = _UC_MACHINE_PC(uc);
353 void *sigmask = (void *)&uc->uc_sigmask;
354 #endif
355 #endif
357 /* XXX: need kernel patch to get write flag faster */
358 is_write = 0;
359 insn = *(uint32_t *)pc;
360 if ((insn >> 30) == 3) {
361 switch ((insn >> 19) & 0x3f) {
362 case 0x05: /* stb */
363 case 0x15: /* stba */
364 case 0x06: /* sth */
365 case 0x16: /* stha */
366 case 0x04: /* st */
367 case 0x14: /* sta */
368 case 0x07: /* std */
369 case 0x17: /* stda */
370 case 0x0e: /* stx */
371 case 0x1e: /* stxa */
372 case 0x24: /* stf */
373 case 0x34: /* stfa */
374 case 0x27: /* stdf */
375 case 0x37: /* stdfa */
376 case 0x26: /* stqf */
377 case 0x36: /* stqfa */
378 case 0x25: /* stfsr */
379 case 0x3c: /* casa */
380 case 0x3e: /* casxa */
381 is_write = 1;
382 break;
385 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
386 is_write, sigmask);
389 #elif defined(__arm__)
391 #if defined(__NetBSD__)
392 #include <ucontext.h>
393 #endif
395 int cpu_signal_handler(int host_signum, void *pinfo,
396 void *puc)
398 siginfo_t *info = pinfo;
399 #if defined(__NetBSD__)
400 ucontext_t *uc = puc;
401 #else
402 struct ucontext *uc = puc;
403 #endif
404 unsigned long pc;
405 int is_write;
407 #if defined(__NetBSD__)
408 pc = uc->uc_mcontext.__gregs[_REG_R15];
409 #elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
410 pc = uc->uc_mcontext.gregs[R15];
411 #else
412 pc = uc->uc_mcontext.arm_pc;
413 #endif
415 /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
416 * later processor; on v5 we will always report this as a read).
418 is_write = extract32(uc->uc_mcontext.error_code, 11, 1);
419 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
420 is_write,
421 &uc->uc_sigmask);
424 #elif defined(__aarch64__)
426 int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
428 siginfo_t *info = pinfo;
429 struct ucontext *uc = puc;
430 uintptr_t pc = uc->uc_mcontext.pc;
431 uint32_t insn = *(uint32_t *)pc;
432 bool is_write;
434 /* XXX: need kernel patch to get write flag faster. */
435 is_write = ( (insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */
436 || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */
437 || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */
438 || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */
439 || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */
440 || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */
441 || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */
442 /* Ingore bits 10, 11 & 21, controlling indexing. */
443 || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */
444 || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */
445 /* Ignore bits 23 & 24, controlling indexing. */
446 || (insn & 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */
448 return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
449 is_write, &uc->uc_sigmask);
452 #elif defined(__ia64)
454 #ifndef __ISR_VALID
455 /* This ought to be in <bits/siginfo.h>... */
456 # define __ISR_VALID 1
457 #endif
459 int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
461 siginfo_t *info = pinfo;
462 struct ucontext *uc = puc;
463 unsigned long ip;
464 int is_write = 0;
466 ip = uc->uc_mcontext.sc_ip;
467 switch (host_signum) {
468 case SIGILL:
469 case SIGFPE:
470 case SIGSEGV:
471 case SIGBUS:
472 case SIGTRAP:
473 if (info->si_code && (info->si_segvflags & __ISR_VALID)) {
474 /* ISR.W (write-access) is bit 33: */
475 is_write = (info->si_isr >> 33) & 1;
477 break;
479 default:
480 break;
482 return handle_cpu_signal(ip, (unsigned long)info->si_addr,
483 is_write,
484 (sigset_t *)&uc->uc_sigmask);
487 #elif defined(__s390__)
489 int cpu_signal_handler(int host_signum, void *pinfo,
490 void *puc)
492 siginfo_t *info = pinfo;
493 struct ucontext *uc = puc;
494 unsigned long pc;
495 uint16_t *pinsn;
496 int is_write = 0;
498 pc = uc->uc_mcontext.psw.addr;
500 /* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
501 of the normal 2 arguments. The 3rd argument contains the "int_code"
502 from the hardware which does in fact contain the is_write value.
503 The rt signal handler, as far as I can tell, does not give this value
504 at all. Not that we could get to it from here even if it were. */
505 /* ??? This is not even close to complete, since it ignores all
506 of the read-modify-write instructions. */
507 pinsn = (uint16_t *)pc;
508 switch (pinsn[0] >> 8) {
509 case 0x50: /* ST */
510 case 0x42: /* STC */
511 case 0x40: /* STH */
512 is_write = 1;
513 break;
514 case 0xc4: /* RIL format insns */
515 switch (pinsn[0] & 0xf) {
516 case 0xf: /* STRL */
517 case 0xb: /* STGRL */
518 case 0x7: /* STHRL */
519 is_write = 1;
521 break;
522 case 0xe3: /* RXY format insns */
523 switch (pinsn[2] & 0xff) {
524 case 0x50: /* STY */
525 case 0x24: /* STG */
526 case 0x72: /* STCY */
527 case 0x70: /* STHY */
528 case 0x8e: /* STPQ */
529 case 0x3f: /* STRVH */
530 case 0x3e: /* STRV */
531 case 0x2f: /* STRVG */
532 is_write = 1;
534 break;
536 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
537 is_write, &uc->uc_sigmask);
540 #elif defined(__mips__)
542 int cpu_signal_handler(int host_signum, void *pinfo,
543 void *puc)
545 siginfo_t *info = pinfo;
546 struct ucontext *uc = puc;
547 greg_t pc = uc->uc_mcontext.pc;
548 int is_write;
550 /* XXX: compute is_write */
551 is_write = 0;
552 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
553 is_write, &uc->uc_sigmask);
556 #else
558 #error host CPU specific signal handler needed
560 #endif