target/riscv/vector_internals.c

   1 /*
   2  * RISC-V Vector Extension Internals
   3  *
   4  * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2 or later, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #include "qemu/osdep.h"
  20 #include "vector_internals.h"
  21
  22 /* set agnostic elements to 1s */
  23 void vext_set_elems_1s(void *base, uint32_t is_agnostic, uint32_t cnt,
  24                        uint32_t tot)
  25 {
  26     if (is_agnostic == 0) {
  27         /* policy undisturbed */
  28         return;
  29     }
  30     if (tot - cnt == 0) {
  31         return ;
  32     }
  33
  34     if (HOST_BIG_ENDIAN) {
  35         /*
  36          * Deal the situation when the elements are insdie
  37          * only one uint64 block including setting the
  38          * masked-off element.
  39          */
  40         if (((tot - 1) ^ cnt) < 8) {
  41             memset(base + H1(tot - 1), -1, tot - cnt);
  42             return;
  43         }
  44         /*
  45          * Otherwise, at least cross two uint64_t blocks.
  46          * Set first unaligned block.
  47          */
  48         if (cnt % 8 != 0) {
  49             uint32_t j = ROUND_UP(cnt, 8);
  50             memset(base + H1(j - 1), -1, j - cnt);
  51             cnt = j;
  52         }
  53         /* Set other 64bit aligend blocks */
  54     }
  55     memset(base + cnt, -1, tot - cnt);
  56 }
  57
  58 void do_vext_vv(void *vd, void *v0, void *vs1, void *vs2,
  59                 CPURISCVState *env, uint32_t desc,
  60                 opivv2_fn *fn, uint32_t esz)
  61 {
  62     uint32_t vm = vext_vm(desc);
  63     uint32_t vl = env->vl;
  64     uint32_t total_elems = vext_get_total_elems(env, desc, esz);
  65     uint32_t vta = vext_vta(desc);
  66     uint32_t vma = vext_vma(desc);
  67     uint32_t i;
  68
  69     VSTART_CHECK_EARLY_EXIT(env);
  70
  71     for (i = env->vstart; i < vl; i++) {
  72         if (!vm && !vext_elem_mask(v0, i)) {
  73             /* set masked-off elements to 1s */
  74             vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz);
  75             continue;
  76         }
  77         fn(vd, vs1, vs2, i);
  78     }
  79     env->vstart = 0;
  80     /* set tail elements to 1s */
  81     vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);
  82 }
  83
  84 void do_vext_vx(void *vd, void *v0, target_long s1, void *vs2,
  85                 CPURISCVState *env, uint32_t desc,
  86                 opivx2_fn fn, uint32_t esz)
  87 {
  88     uint32_t vm = vext_vm(desc);
  89     uint32_t vl = env->vl;
  90     uint32_t total_elems = vext_get_total_elems(env, desc, esz);
  91     uint32_t vta = vext_vta(desc);
  92     uint32_t vma = vext_vma(desc);
  93     uint32_t i;
  94
  95     VSTART_CHECK_EARLY_EXIT(env);
  96
  97     for (i = env->vstart; i < vl; i++) {
  98         if (!vm && !vext_elem_mask(v0, i)) {
  99             /* set masked-off elements to 1s */
 100             vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz);
 101             continue;
 102         }
 103         fn(vd, s1, vs2, i);
 104     }
 105     env->vstart = 0;
 106     /* set tail elements to 1s */
 107     vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);
 108 }