| blob | c45b8fa1d80279f79f70be0531dd88b28208c206 |
1 #
2 # RISC-V translation routines for the RVXI Base Integer Instruction Set.
3 #
4 # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5 # Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6 #
7 # This program is free software; you can redistribute it and/or modify it
8 # under the terms and conditions of the GNU General Public License,
9 # version 2 or later, as published by the Free Software Foundation.
10 #
11 # This program is distributed in the hope it will be useful, but WITHOUT
12 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 # more details.
15 #
16 # You should have received a copy of the GNU General Public License along with
17 # this program. If not, see <http://www.gnu.org/licenses/>.
19 # Fields:
20 %rs3 27:5
21 %rs2 20:5
22 %rs1 15:5
23 %rd 7:5
24 %sh5 20:5
25 %sh6 20:6
27 %sh7 20:7
28 %csr 20:12
29 %rm 12:3
30 %nf 29:3 !function=ex_plus_1
32 # immediates:
33 %imm_i 20:s12
34 %imm_s 25:s7 7:5
35 %imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1
36 %imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1
37 %imm_u 12:s20 !function=ex_shift_12
38 %imm_bs 30:2 !function=ex_shift_3
39 %imm_rnum 20:4
40 %imm_z6 26:1 15:5
41 %imm_mop5 30:1 26:2 20:2
42 %imm_mop3 30:1 26:2
44 # Argument sets:
45 &empty
46 &b imm rs2 rs1
47 &i imm rs1 rd
48 &j imm rd
49 &r rd rs1 rs2
50 &r2 rd rs1
51 &r2_s rs1 rs2
52 &s imm rs1 rs2
53 &u imm rd
54 &shift shamt rs1 rd
55 &atomic aq rl rs2 rs1 rd
56 &rmrr vm rd rs1 rs2
57 &rmr vm rd rs2
58 &r2nfvm vm rd rs1 nf
59 &rnfvm vm rd rs1 rs2 nf
60 &k_aes shamt rs2 rs1 rd
61 &mop5 imm rd rs1
62 &mop3 imm rd rs1 rs2
64 # Formats 32:
65 @r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd
66 @i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd
67 @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1
68 @s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1
69 @u .................... ..... ....... &u imm=%imm_u %rd
70 @j .................... ..... ....... &j imm=%imm_j %rd
72 @sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd
73 @csr ............ ..... ... ..... ....... %csr %rs1 %rd
75 @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd
76 @atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd
78 @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
79 @r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
80 @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd
81 @r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd
82 @r2_vm_1 ...... . ..... ..... ... ..... ....... &rmr vm=1 %rs2 %rd
83 @r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
84 @r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
85 @r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd
86 @r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
87 @r2rd ....... ..... ..... ... ..... ....... %rs2 %rd
88 @r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
89 @r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd
90 @r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd
91 @r2_zimm6 ..... . vm:1 ..... ..... ... ..... ....... &rmrr %rs2 rs1=%imm_z6 %rd
92 @r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd
93 @r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd
94 @r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1
96 @hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1
97 @hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1
99 @sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1
100 @sfence_vm ....... ..... ..... ... ..... ....... %rs1
102 @k_aes .. ..... ..... ..... ... ..... ....... &k_aes shamt=%imm_bs %rs2 %rs1 %rd
103 @i_aes .. ..... ..... ..... ... ..... ....... &i imm=%imm_rnum %rs1 %rd
105 @mop5 . . .. .. .... .. ..... ... ..... ....... &mop5 imm=%imm_mop5 %rd %rs1
106 @mop3 . . .. .. . ..... ..... ... ..... ....... &mop3 imm=%imm_mop3 %rd %rs1 %rs2
108 # Formats 64:
109 @sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd
111 # Formats 128:
112 @sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd
114 # *** Privileged Instructions ***
115 ecall 000000000000 00000 000 00000 1110011
116 ebreak 000000000001 00000 000 00000 1110011
117 uret 0000000 00010 00000 000 00000 1110011
118 sret 0001000 00010 00000 000 00000 1110011
119 mret 0011000 00010 00000 000 00000 1110011
120 wfi 0001000 00101 00000 000 00000 1110011
121 sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma
122 sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm
124 # *** RV32I Base Instruction Set ***
125 lui .................... ..... 0110111 @u
126 auipc .................... ..... 0010111 @u
127 jal .................... ..... 1101111 @j
128 jalr ............ ..... 000 ..... 1100111 @i
129 beq ....... ..... ..... 000 ..... 1100011 @b
130 bne ....... ..... ..... 001 ..... 1100011 @b
131 blt ....... ..... ..... 100 ..... 1100011 @b
132 bge ....... ..... ..... 101 ..... 1100011 @b
133 bltu ....... ..... ..... 110 ..... 1100011 @b
134 bgeu ....... ..... ..... 111 ..... 1100011 @b
135 lb ............ ..... 000 ..... 0000011 @i
136 lh ............ ..... 001 ..... 0000011 @i
137 lw ............ ..... 010 ..... 0000011 @i
138 lbu ............ ..... 100 ..... 0000011 @i
139 lhu ............ ..... 101 ..... 0000011 @i
140 sb ....... ..... ..... 000 ..... 0100011 @s
141 sh ....... ..... ..... 001 ..... 0100011 @s
142 sw ....... ..... ..... 010 ..... 0100011 @s
143 addi ............ ..... 000 ..... 0010011 @i
144 slti ............ ..... 010 ..... 0010011 @i
145 sltiu ............ ..... 011 ..... 0010011 @i
146 xori ............ ..... 100 ..... 0010011 @i
147 # cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded.
148 ori ............ ..... 110 ..... 0010011 @i
149 andi ............ ..... 111 ..... 0010011 @i
150 slli 00000. ...... ..... 001 ..... 0010011 @sh
151 srli 00000. ...... ..... 101 ..... 0010011 @sh
152 srai 01000. ...... ..... 101 ..... 0010011 @sh
153 add 0000000 ..... ..... 000 ..... 0110011 @r
154 sub 0100000 ..... ..... 000 ..... 0110011 @r
155 sll 0000000 ..... ..... 001 ..... 0110011 @r
156 slt 0000000 ..... ..... 010 ..... 0110011 @r
157 sltu 0000000 ..... ..... 011 ..... 0110011 @r
158 xor 0000000 ..... ..... 100 ..... 0110011 @r
159 srl 0000000 ..... ..... 101 ..... 0110011 @r
160 sra 0100000 ..... ..... 101 ..... 0110011 @r
161 or 0000000 ..... ..... 110 ..... 0110011 @r
162 and 0000000 ..... ..... 111 ..... 0110011 @r
164 {
165 pause 0000 0001 0000 00000 000 00000 0001111
166 fence ---- pred:4 succ:4 ----- 000 ----- 0001111
167 }
169 fence_i ---- ---- ---- ----- 001 ----- 0001111
170 csrrw ............ ..... 001 ..... 1110011 @csr
171 csrrs ............ ..... 010 ..... 1110011 @csr
172 csrrc ............ ..... 011 ..... 1110011 @csr
173 csrrwi ............ ..... 101 ..... 1110011 @csr
174 csrrsi ............ ..... 110 ..... 1110011 @csr
175 csrrci ............ ..... 111 ..... 1110011 @csr
177 # *** RV64I Base Instruction Set (in addition to RV32I) ***
178 lwu ............ ..... 110 ..... 0000011 @i
179 ld ............ ..... 011 ..... 0000011 @i
180 sd ....... ..... ..... 011 ..... 0100011 @s
181 addiw ............ ..... 000 ..... 0011011 @i
182 slliw 0000000 ..... ..... 001 ..... 0011011 @sh5
183 srliw 0000000 ..... ..... 101 ..... 0011011 @sh5
184 sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5
185 addw 0000000 ..... ..... 000 ..... 0111011 @r
186 subw 0100000 ..... ..... 000 ..... 0111011 @r
187 sllw 0000000 ..... ..... 001 ..... 0111011 @r
188 srlw 0000000 ..... ..... 101 ..... 0111011 @r
189 sraw 0100000 ..... ..... 101 ..... 0111011 @r
191 # *** RV128I Base Instruction Set (in addition to RV64I) ***
192 ldu ............ ..... 111 ..... 0000011 @i
193 {
194 [
195 # *** RV32 Zicbom Standard Extension ***
196 cbo_clean 0000000 00001 ..... 010 00000 0001111 @sfence_vm
197 cbo_flush 0000000 00010 ..... 010 00000 0001111 @sfence_vm
198 cbo_inval 0000000 00000 ..... 010 00000 0001111 @sfence_vm
200 # *** RV32 Zicboz Standard Extension ***
201 cbo_zero 0000000 00100 ..... 010 00000 0001111 @sfence_vm
202 ]
204 # *** RVI128 lq ***
205 lq ............ ..... 010 ..... 0001111 @i
206 }
207 sq ............ ..... 100 ..... 0100011 @s
208 addid ............ ..... 000 ..... 1011011 @i
209 sllid 000000 ...... ..... 001 ..... 1011011 @sh6
210 srlid 000000 ...... ..... 101 ..... 1011011 @sh6
211 sraid 010000 ...... ..... 101 ..... 1011011 @sh6
212 addd 0000000 ..... ..... 000 ..... 1111011 @r
213 subd 0100000 ..... ..... 000 ..... 1111011 @r
214 slld 0000000 ..... ..... 001 ..... 1111011 @r
215 srld 0000000 ..... ..... 101 ..... 1111011 @r
216 srad 0100000 ..... ..... 101 ..... 1111011 @r
218 # *** RV32M Standard Extension ***
219 mul 0000001 ..... ..... 000 ..... 0110011 @r
220 mulh 0000001 ..... ..... 001 ..... 0110011 @r
221 mulhsu 0000001 ..... ..... 010 ..... 0110011 @r
222 mulhu 0000001 ..... ..... 011 ..... 0110011 @r
223 div 0000001 ..... ..... 100 ..... 0110011 @r
224 divu 0000001 ..... ..... 101 ..... 0110011 @r
225 rem 0000001 ..... ..... 110 ..... 0110011 @r
226 remu 0000001 ..... ..... 111 ..... 0110011 @r
228 # *** RV64M Standard Extension (in addition to RV32M) ***
229 mulw 0000001 ..... ..... 000 ..... 0111011 @r
230 divw 0000001 ..... ..... 100 ..... 0111011 @r
231 divuw 0000001 ..... ..... 101 ..... 0111011 @r
232 remw 0000001 ..... ..... 110 ..... 0111011 @r
233 remuw 0000001 ..... ..... 111 ..... 0111011 @r
235 # *** RV128M Standard Extension (in addition to RV64M) ***
236 muld 0000001 ..... ..... 000 ..... 1111011 @r
237 divd 0000001 ..... ..... 100 ..... 1111011 @r
238 divud 0000001 ..... ..... 101 ..... 1111011 @r
239 remd 0000001 ..... ..... 110 ..... 1111011 @r
240 remud 0000001 ..... ..... 111 ..... 1111011 @r
242 # *** RV32A Standard Extension ***
243 lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
244 sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st
245 amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st
246 amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st
247 amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st
248 amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st
249 amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st
250 amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st
251 amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st
252 amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st
253 amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st
255 # *** RV64A Standard Extension (in addition to RV32A) ***
256 lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
257 sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st
258 amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st
259 amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st
260 amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st
261 amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st
262 amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st
263 amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st
264 amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st
265 amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st
266 amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st
268 # *** RV32F Standard Extension ***
269 flw ............ ..... 010 ..... 0000111 @i
270 fsw ....... ..... ..... 010 ..... 0100111 @s
271 fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm
272 fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm
273 fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm
274 fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm
275 fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm
276 fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm
277 fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm
278 fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm
279 fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm
280 fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r
281 fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r
282 fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r
283 fmin_s 0010100 ..... ..... 000 ..... 1010011 @r
284 fmax_s 0010100 ..... ..... 001 ..... 1010011 @r
285 fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm
286 fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm
287 fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2
288 feq_s 1010000 ..... ..... 010 ..... 1010011 @r
289 flt_s 1010000 ..... ..... 001 ..... 1010011 @r
290 fle_s 1010000 ..... ..... 000 ..... 1010011 @r
291 fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2
292 fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm
293 fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm
294 fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2
296 # *** RV64F Standard Extension (in addition to RV32F) ***
297 fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm
298 fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm
299 fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm
300 fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm
302 # *** RV32D Standard Extension ***
303 fld ............ ..... 011 ..... 0000111 @i
304 fsd ....... ..... ..... 011 ..... 0100111 @s
305 fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm
306 fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm
307 fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm
308 fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm
309 fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm
310 fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm
311 fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm
312 fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm
313 fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm
314 fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r
315 fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r
316 fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r
317 fmin_d 0010101 ..... ..... 000 ..... 1010011 @r
318 fmax_d 0010101 ..... ..... 001 ..... 1010011 @r
319 fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm
320 fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm
321 feq_d 1010001 ..... ..... 010 ..... 1010011 @r
322 flt_d 1010001 ..... ..... 001 ..... 1010011 @r
323 fle_d 1010001 ..... ..... 000 ..... 1010011 @r
324 fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2
325 fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm
326 fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm
327 fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm
328 fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm
330 # *** RV64D Standard Extension (in addition to RV32D) ***
331 fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm
332 fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm
333 fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2
334 fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm
335 fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm
336 fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2
338 # *** RV32H Base Instruction Set ***
339 hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2
340 hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2
341 hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2
342 hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2
343 hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2
344 hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2
345 hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2
346 hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s
347 hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s
348 hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s
349 hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma
350 hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma
352 # *** RV64H Base Instruction Set ***
353 hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2
354 hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2
355 hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s
357 # *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
358 # Vector unit-stride load/store insns.
359 vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
360 vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
361 vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
362 vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
363 vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
364 vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
365 vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
366 vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
368 # Vector unit-stride mask load/store insns.
369 vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2
370 vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2
372 # Vector strided insns.
373 vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
374 vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
375 vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
376 vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
377 vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
378 vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
379 vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
380 vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
382 # Vector ordered-indexed and unordered-indexed load insns.
383 vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm
384 vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm
385 vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm
386 vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm
388 # Vector ordered-indexed and unordered-indexed store insns.
389 vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm
390 vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm
391 vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm
392 vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm
394 # Vector unit-stride fault-only-first load insns.
395 vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
396 vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
397 vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
398 vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
400 # Vector whole register insns
401 vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2
402 vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2
403 vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2
404 vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2
405 vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2
406 vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2
407 vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2
408 vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2
409 vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2
410 vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2
411 vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2
412 vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2
413 vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2
414 vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2
415 vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2
416 vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2
417 vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2
418 vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2
419 vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2
420 vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2
422 # *** new major opcode OP-V ***
423 vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm
424 vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm
425 vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm
426 vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm
427 vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm
428 vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm
429 vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm
430 vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm
431 vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm
432 vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm
433 vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm
434 vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm
435 vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm
436 vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm
437 vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm
438 vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm
439 vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm
440 vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm
441 vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm
442 vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm
443 vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm
444 vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm
445 vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm
446 vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1
447 vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1
448 vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1
449 vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm
450 vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm
451 vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm
452 vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1
453 vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1
454 vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm
455 vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm
456 vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm
457 vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm
458 vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm
459 vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm
460 vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm
461 vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm
462 vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm
463 vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm
464 vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm
465 vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm
466 vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm
467 vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm
468 vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm
469 vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm
470 vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm
471 vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm
472 vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm
473 vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm
474 vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm
475 vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm
476 vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm
477 vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm
478 vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm
479 vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm
480 vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm
481 vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm
482 vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm
483 vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm
484 vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm
485 vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm
486 vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm
487 vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm
488 vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm
489 vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm
490 vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm
491 vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm
492 vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm
493 vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm
494 vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm
495 vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm
496 vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm
497 vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm
498 vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm
499 vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm
500 vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm
501 vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm
502 vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm
503 vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm
504 vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm
505 vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm
506 vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm
507 vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm
508 vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm
509 vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm
510 vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm
511 vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm
512 vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm
513 vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm
514 vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm
515 vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm
516 vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm
517 vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm
518 vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm
519 vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm
520 vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm
521 vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm
522 vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm
523 vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm
524 vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm
525 vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm
526 vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm
527 vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm
528 vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm
529 vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm
530 vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm
531 vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm
532 vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm
533 vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm
534 vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm
535 vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm
536 vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm
537 vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm
538 vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm
539 vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm
540 vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm
541 vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm
542 vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm
543 vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm
544 vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm
545 vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2
546 vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2
547 vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2
548 vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
549 vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
550 vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
551 vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm
552 vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm
553 vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm
554 vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm
555 vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm
556 vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm
557 vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm
558 vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm
559 vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm
560 vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm
561 vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm
562 vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm
563 vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm
564 vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm
565 vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm
566 vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm
567 vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm
568 vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm
569 vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm
570 vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm
571 vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm
572 vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm
573 vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm
574 vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm
575 vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm
576 vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm
577 vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm
578 vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm
579 vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm
580 vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm
581 vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm
582 vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm
583 vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm
584 vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm
585 vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm
586 vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm
587 vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm
588 vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm
589 vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm
590 vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm
591 vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm
592 vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm
593 vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm
594 vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm
595 vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm
596 vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm
597 vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm
598 vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm
599 vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm
600 vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm
601 vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm
602 vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm
603 vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm
604 vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm
605 vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm
606 vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm
607 vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm
608 vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm
609 vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm
610 vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm
611 vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm
612 vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm
613 vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm
614 vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm
615 vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm
616 vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm
617 vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm
618 vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm
619 vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm
620 vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm
621 vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm
622 vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm
623 vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm
624 vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm
625 vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm
626 vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm
627 vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm
628 vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm
629 vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm
630 vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm
631 vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm
632 vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm
633 vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm
634 vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm
635 vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm
636 vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm
637 vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm
638 vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm
639 vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm
640 vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm
641 vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm
642 vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm
643 vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm
644 vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm
645 vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm
646 vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm
647 vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm
648 vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm
649 vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm
650 vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm
651 vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm
652 vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm
653 vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
654 vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2
656 vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm
657 vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm
658 vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm
659 vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm
660 vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm
661 vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm
663 vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm
664 vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm
665 vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm
666 vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm
667 vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm
668 vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm
669 vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm
671 vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm
672 vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm
673 vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm
674 vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm
675 vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm
676 vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm
677 vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm
678 vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm
680 vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm
681 vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm
682 vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm
683 vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm
684 vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm
685 vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm
686 vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm
687 vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm
688 vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm
689 vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm
690 # Vector ordered and unordered reduction sum
691 vfredusum_vs 000001 . ..... ..... 001 ..... 1010111 @r_vm
692 vfredosum_vs 000011 . ..... ..... 001 ..... 1010111 @r_vm
693 vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm
694 vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm
695 # Vector widening ordered and unordered float reduction sum
696 vfwredusum_vs 110001 . ..... ..... 001 ..... 1010111 @r_vm
697 vfwredosum_vs 110011 . ..... ..... 001 ..... 1010111 @r_vm
698 vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r
699 vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r
700 vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r
701 vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r
702 vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r
703 vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r
704 vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r
705 vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r
706 vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm
707 vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm
708 vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm
709 vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm
710 vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm
711 viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm
712 vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm
713 vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd
714 vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2
715 vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd
716 vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2
717 vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm
718 vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm
719 vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm
720 vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm
721 vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm
722 vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm
723 vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm
724 vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm
725 vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm
726 vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm
727 vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r
728 vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd
729 vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd
730 vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd
731 vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd
733 # Vector Integer Extension
734 vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm
735 vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm
736 vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm
737 vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm
738 vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm
739 vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm
741 vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11
742 vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10
743 vsetvl 1000000 ..... ..... 111 ..... 1010111 @r
745 # *** Zawrs Standard Extension ***
746 wrs_nto 000000001101 00000 000 00000 1110011
747 wrs_sto 000000011101 00000 000 00000 1110011
749 # *** RV32 Zba Standard Extension ***
750 sh1add 0010000 .......... 010 ..... 0110011 @r
751 sh2add 0010000 .......... 100 ..... 0110011 @r
752 sh3add 0010000 .......... 110 ..... 0110011 @r
754 # *** RV64 Zba Standard Extension (in addition to RV32 Zba) ***
755 add_uw 0000100 .......... 000 ..... 0111011 @r
756 sh1add_uw 0010000 .......... 010 ..... 0111011 @r
757 sh2add_uw 0010000 .......... 100 ..... 0111011 @r
758 sh3add_uw 0010000 .......... 110 ..... 0111011 @r
759 slli_uw 00001 ............ 001 ..... 0011011 @sh
761 # *** RV32 Zbb/Zbkb Standard Extension ***
762 andn 0100000 .......... 111 ..... 0110011 @r
763 rol 0110000 .......... 001 ..... 0110011 @r
764 ror 0110000 .......... 101 ..... 0110011 @r
765 rori 01100 ............ 101 ..... 0010011 @sh
766 # The encoding for rev8 differs between RV32 and RV64.
767 # rev8_32 denotes the RV32 variant.
768 rev8_32 011010 011000 ..... 101 ..... 0010011 @r2
769 # The encoding for zext.h differs between RV32 and RV64.
770 # zext_h_32 denotes the RV32 variant.
771 {
772 zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2
773 pack 0000100 ..... ..... 100 ..... 0110011 @r
774 }
775 xnor 0100000 .......... 100 ..... 0110011 @r
776 # *** RV32 extra Zbb Standard Extension ***
777 clz 011000 000000 ..... 001 ..... 0010011 @r2
778 cpop 011000 000010 ..... 001 ..... 0010011 @r2
779 ctz 011000 000001 ..... 001 ..... 0010011 @r2
780 max 0000101 .......... 110 ..... 0110011 @r
781 maxu 0000101 .......... 111 ..... 0110011 @r
782 min 0000101 .......... 100 ..... 0110011 @r
783 minu 0000101 .......... 101 ..... 0110011 @r
784 orc_b 001010 000111 ..... 101 ..... 0010011 @r2
785 orn 0100000 .......... 110 ..... 0110011 @r
786 sext_b 011000 000100 ..... 001 ..... 0010011 @r2
787 sext_h 011000 000101 ..... 001 ..... 0010011 @r2
788 # *** RV32 extra Zbkb Standard Extension ***
789 brev8 0110100 00111 ..... 101 ..... 0010011 @r2 #grevi
790 packh 0000100 .......... 111 ..... 0110011 @r
791 unzip 0000100 01111 ..... 101 ..... 0010011 @r2 #unshfl
792 zip 0000100 01111 ..... 001 ..... 0010011 @r2 #shfl
794 # *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) ***
795 # The encoding for rev8 differs between RV32 and RV64.
796 # When executing on RV64, the encoding used in RV32 is an illegal
797 # instruction, so we use different handler functions to differentiate.
798 rev8_64 011010 111000 ..... 101 ..... 0010011 @r2
799 rolw 0110000 .......... 001 ..... 0111011 @r
800 roriw 0110000 .......... 101 ..... 0011011 @sh5
801 rorw 0110000 .......... 101 ..... 0111011 @r
802 # The encoding for zext.h differs between RV32 and RV64.
803 # When executing on RV64, the encoding used in RV32 is an illegal
804 # instruction, so we use different handler functions to differentiate.
805 {
806 zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2
807 packw 0000100 ..... ..... 100 ..... 0111011 @r
808 }
809 # *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) ***
810 clzw 0110000 00000 ..... 001 ..... 0011011 @r2
811 ctzw 0110000 00001 ..... 001 ..... 0011011 @r2
812 cpopw 0110000 00010 ..... 001 ..... 0011011 @r2
814 # *** RV32 Zbc/Zbkc Standard Extension ***
815 clmul 0000101 .......... 001 ..... 0110011 @r
816 clmulh 0000101 .......... 011 ..... 0110011 @r
817 # *** RV32 extra Zbc Standard Extension ***
818 clmulr 0000101 .......... 010 ..... 0110011 @r
820 # *** RV32 Zbkx Standard Extension ***
821 xperm4 0010100 .......... 010 ..... 0110011 @r
822 xperm8 0010100 .......... 100 ..... 0110011 @r
824 # *** RV32 Zbs Standard Extension ***
825 bclr 0100100 .......... 001 ..... 0110011 @r
826 bclri 01001. ........... 001 ..... 0010011 @sh
827 bext 0100100 .......... 101 ..... 0110011 @r
828 bexti 01001. ........... 101 ..... 0010011 @sh
829 binv 0110100 .......... 001 ..... 0110011 @r
830 binvi 01101. ........... 001 ..... 0010011 @sh
831 bset 0010100 .......... 001 ..... 0110011 @r
832 bseti 00101. ........... 001 ..... 0010011 @sh
834 # *** Zfa Standard Extension ***
835 fli_s 1111000 00001 ..... 000 ..... 1010011 @r2
836 fli_d 1111001 00001 ..... 000 ..... 1010011 @r2
837 fli_h 1111010 00001 ..... 000 ..... 1010011 @r2
838 fminm_s 0010100 ..... ..... 010 ..... 1010011 @r
839 fmaxm_s 0010100 ..... ..... 011 ..... 1010011 @r
840 fminm_d 0010101 ..... ..... 010 ..... 1010011 @r
841 fmaxm_d 0010101 ..... ..... 011 ..... 1010011 @r
842 fminm_h 0010110 ..... ..... 010 ..... 1010011 @r
843 fmaxm_h 0010110 ..... ..... 011 ..... 1010011 @r
844 fround_s 0100000 00100 ..... ... ..... 1010011 @r2_rm
845 froundnx_s 0100000 00101 ..... ... ..... 1010011 @r2_rm
846 fround_d 0100001 00100 ..... ... ..... 1010011 @r2_rm
847 froundnx_d 0100001 00101 ..... ... ..... 1010011 @r2_rm
848 fround_h 0100010 00100 ..... ... ..... 1010011 @r2_rm
849 froundnx_h 0100010 00101 ..... ... ..... 1010011 @r2_rm
850 fcvtmod_w_d 1100001 01000 ..... 001 ..... 1010011 @r2
851 fmvh_x_d 1110001 00001 ..... 000 ..... 1010011 @r2
852 fmvp_d_x 1011001 ..... ..... 000 ..... 1010011 @r
853 fleq_s 1010000 ..... ..... 100 ..... 1010011 @r
854 fltq_s 1010000 ..... ..... 101 ..... 1010011 @r
855 fleq_d 1010001 ..... ..... 100 ..... 1010011 @r
856 fltq_d 1010001 ..... ..... 101 ..... 1010011 @r
857 fleq_h 1010010 ..... ..... 100 ..... 1010011 @r
858 fltq_h 1010010 ..... ..... 101 ..... 1010011 @r
860 # *** RV32 Zfh Extension ***
861 flh ............ ..... 001 ..... 0000111 @i
862 fsh ....... ..... ..... 001 ..... 0100111 @s
863 fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm
864 fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm
865 fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm
866 fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm
867 fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm
868 fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm
869 fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm
870 fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm
871 fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm
872 fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r
873 fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r
874 fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r
875 fmin_h 0010110 ..... ..... 000 ..... 1010011 @r
876 fmax_h 0010110 ..... ..... 001 ..... 1010011 @r
877 fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm
878 fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm
879 fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm
880 fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm
881 fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm
882 fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm
883 fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2
884 feq_h 1010010 ..... ..... 010 ..... 1010011 @r
885 flt_h 1010010 ..... ..... 001 ..... 1010011 @r
886 fle_h 1010010 ..... ..... 000 ..... 1010011 @r
887 fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2
888 fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm
889 fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm
890 fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2
892 # *** RV64 Zfh Extension (in addition to RV32 Zfh) ***
893 fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm
894 fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm
895 fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm
896 fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm
898 # *** Svinval Standard Extension ***
899 sinval_vma 0001011 ..... ..... 000 00000 1110011 @sfence_vma
900 sfence_w_inval 0001100 00000 00000 000 00000 1110011
901 sfence_inval_ir 0001100 00001 00000 000 00000 1110011
902 hinval_vvma 0010011 ..... ..... 000 00000 1110011 @hfence_vvma
903 hinval_gvma 0110011 ..... ..... 000 00000 1110011 @hfence_gvma
905 # *** RV32 Zknd Standard Extension ***
906 aes32dsmi .. 10111 ..... ..... 000 ..... 0110011 @k_aes
907 aes32dsi .. 10101 ..... ..... 000 ..... 0110011 @k_aes
908 # *** RV64 Zknd Standard Extension ***
909 aes64dsm 00 11111 ..... ..... 000 ..... 0110011 @r
910 aes64ds 00 11101 ..... ..... 000 ..... 0110011 @r
911 aes64im 00 11000 00000 ..... 001 ..... 0010011 @r2
912 # *** RV32 Zkne Standard Extension ***
913 aes32esmi .. 10011 ..... ..... 000 ..... 0110011 @k_aes
914 aes32esi .. 10001 ..... ..... 000 ..... 0110011 @k_aes
915 # *** RV64 Zkne Standard Extension ***
916 aes64es 00 11001 ..... ..... 000 ..... 0110011 @r
917 aes64esm 00 11011 ..... ..... 000 ..... 0110011 @r
918 # *** RV64 Zkne/zknd Standard Extension ***
919 aes64ks2 01 11111 ..... ..... 000 ..... 0110011 @r
920 aes64ks1i 00 11000 1.... ..... 001 ..... 0010011 @i_aes
921 # *** RV32 Zknh Standard Extension ***
922 sha256sig0 00 01000 00010 ..... 001 ..... 0010011 @r2
923 sha256sig1 00 01000 00011 ..... 001 ..... 0010011 @r2
924 sha256sum0 00 01000 00000 ..... 001 ..... 0010011 @r2
925 sha256sum1 00 01000 00001 ..... 001 ..... 0010011 @r2
926 sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r
927 sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r
928 sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r
929 sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r
930 sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r
931 sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r
932 # *** RV64 Zknh Standard Extension ***
933 sha512sig0 00 01000 00110 ..... 001 ..... 0010011 @r2
934 sha512sig1 00 01000 00111 ..... 001 ..... 0010011 @r2
935 sha512sum0 00 01000 00100 ..... 001 ..... 0010011 @r2
936 sha512sum1 00 01000 00101 ..... 001 ..... 0010011 @r2
937 # *** RV32 Zksh Standard Extension ***
938 sm3p0 00 01000 01000 ..... 001 ..... 0010011 @r2
939 sm3p1 00 01000 01001 ..... 001 ..... 0010011 @r2
940 # *** RV32 Zksed Standard Extension ***
941 sm4ed .. 11000 ..... ..... 000 ..... 0110011 @k_aes
942 sm4ks .. 11010 ..... ..... 000 ..... 0110011 @k_aes
944 # *** RV32 Zicond Standard Extension ***
945 czero_eqz 0000111 ..... ..... 101 ..... 0110011 @r
946 czero_nez 0000111 ..... ..... 111 ..... 0110011 @r
948 # *** Zfbfmin Standard Extension ***
949 fcvt_bf16_s 0100010 01000 ..... ... ..... 1010011 @r2_rm
950 fcvt_s_bf16 0100000 00110 ..... ... ..... 1010011 @r2_rm
952 # *** Zvfbfmin Standard Extension ***
953 vfncvtbf16_f_f_w 010010 . ..... 11101 001 ..... 1010111 @r2_vm
954 vfwcvtbf16_f_f_v 010010 . ..... 01101 001 ..... 1010111 @r2_vm
956 # *** Zvfbfwma Standard Extension ***
957 vfwmaccbf16_vv 111011 . ..... ..... 001 ..... 1010111 @r_vm
958 vfwmaccbf16_vf 111011 . ..... ..... 101 ..... 1010111 @r_vm
960 # *** Zvbc vector crypto extension ***
961 vclmul_vv 001100 . ..... ..... 010 ..... 1010111 @r_vm
962 vclmul_vx 001100 . ..... ..... 110 ..... 1010111 @r_vm
963 vclmulh_vv 001101 . ..... ..... 010 ..... 1010111 @r_vm
964 vclmulh_vx 001101 . ..... ..... 110 ..... 1010111 @r_vm
966 # *** Zvbb vector crypto extension ***
967 vrol_vv 010101 . ..... ..... 000 ..... 1010111 @r_vm
968 vrol_vx 010101 . ..... ..... 100 ..... 1010111 @r_vm
969 vror_vv 010100 . ..... ..... 000 ..... 1010111 @r_vm
970 vror_vx 010100 . ..... ..... 100 ..... 1010111 @r_vm
971 vror_vi 01010. . ..... ..... 011 ..... 1010111 @r2_zimm6
972 vbrev8_v 010010 . ..... 01000 010 ..... 1010111 @r2_vm
973 vrev8_v 010010 . ..... 01001 010 ..... 1010111 @r2_vm
974 vandn_vv 000001 . ..... ..... 000 ..... 1010111 @r_vm
975 vandn_vx 000001 . ..... ..... 100 ..... 1010111 @r_vm
976 vbrev_v 010010 . ..... 01010 010 ..... 1010111 @r2_vm
977 vclz_v 010010 . ..... 01100 010 ..... 1010111 @r2_vm
978 vctz_v 010010 . ..... 01101 010 ..... 1010111 @r2_vm
979 vcpop_v 010010 . ..... 01110 010 ..... 1010111 @r2_vm
980 vwsll_vv 110101 . ..... ..... 000 ..... 1010111 @r_vm
981 vwsll_vx 110101 . ..... ..... 100 ..... 1010111 @r_vm
982 vwsll_vi 110101 . ..... ..... 011 ..... 1010111 @r_vm
984 # *** Zvkned vector crypto extension ***
985 vaesef_vv 101000 1 ..... 00011 010 ..... 1110111 @r2_vm_1
986 vaesef_vs 101001 1 ..... 00011 010 ..... 1110111 @r2_vm_1
987 vaesdf_vv 101000 1 ..... 00001 010 ..... 1110111 @r2_vm_1
988 vaesdf_vs 101001 1 ..... 00001 010 ..... 1110111 @r2_vm_1
989 vaesem_vv 101000 1 ..... 00010 010 ..... 1110111 @r2_vm_1
990 vaesem_vs 101001 1 ..... 00010 010 ..... 1110111 @r2_vm_1
991 vaesdm_vv 101000 1 ..... 00000 010 ..... 1110111 @r2_vm_1
992 vaesdm_vs 101001 1 ..... 00000 010 ..... 1110111 @r2_vm_1
993 vaesz_vs 101001 1 ..... 00111 010 ..... 1110111 @r2_vm_1
994 vaeskf1_vi 100010 1 ..... ..... 010 ..... 1110111 @r_vm_1
995 vaeskf2_vi 101010 1 ..... ..... 010 ..... 1110111 @r_vm_1
997 # *** Zvknh vector crypto extension ***
998 vsha2ms_vv 101101 1 ..... ..... 010 ..... 1110111 @r_vm_1
999 vsha2ch_vv 101110 1 ..... ..... 010 ..... 1110111 @r_vm_1
1000 vsha2cl_vv 101111 1 ..... ..... 010 ..... 1110111 @r_vm_1
1002 # *** Zvksh vector crypto extension ***
1003 vsm3me_vv 100000 1 ..... ..... 010 ..... 1110111 @r_vm_1
1004 vsm3c_vi 101011 1 ..... ..... 010 ..... 1110111 @r_vm_1
1006 # *** Zvkg vector crypto extension ***
1007 vghsh_vv 101100 1 ..... ..... 010 ..... 1110111 @r_vm_1
1008 vgmul_vv 101000 1 ..... 10001 010 ..... 1110111 @r2_vm_1
1010 # *** Zvksed vector crypto extension ***
1011 vsm4k_vi 100001 1 ..... ..... 010 ..... 1110111 @r_vm_1
1012 vsm4r_vv 101000 1 ..... 10000 010 ..... 1110111 @r2_vm_1
1013 vsm4r_vs 101001 1 ..... 10000 010 ..... 1110111 @r2_vm_1
1015 # *** RV32 Zacas Standard Extension ***
1016 amocas_w 00101 . . ..... ..... 010 ..... 0101111 @atom_st
1017 amocas_d 00101 . . ..... ..... 011 ..... 0101111 @atom_st
1018 # *** RV64 Zacas Standard Extension ***
1019 amocas_q 00101 . . ..... ..... 100 ..... 0101111 @atom_st
1021 # *** Zimop may-be-operation extension ***
1022 mop_r_n 1 . 00 .. 0111 .. ..... 100 ..... 1110011 @mop5
1023 mop_rr_n 1 . 00 .. 1 ..... ..... 100 ..... 1110011 @mop3
1025 # *** Zabhb Standard Extension ***
1026 amoswap_b 00001 . . ..... ..... 000 ..... 0101111 @atom_st
1027 amoadd_b 00000 . . ..... ..... 000 ..... 0101111 @atom_st
1028 amoxor_b 00100 . . ..... ..... 000 ..... 0101111 @atom_st
1029 amoand_b 01100 . . ..... ..... 000 ..... 0101111 @atom_st
1030 amoor_b 01000 . . ..... ..... 000 ..... 0101111 @atom_st
1031 amomin_b 10000 . . ..... ..... 000 ..... 0101111 @atom_st
1032 amomax_b 10100 . . ..... ..... 000 ..... 0101111 @atom_st
1033 amominu_b 11000 . . ..... ..... 000 ..... 0101111 @atom_st
1034 amomaxu_b 11100 . . ..... ..... 000 ..... 0101111 @atom_st
1035 amoswap_h 00001 . . ..... ..... 001 ..... 0101111 @atom_st
1036 amoadd_h 00000 . . ..... ..... 001 ..... 0101111 @atom_st
1037 amoxor_h 00100 . . ..... ..... 001 ..... 0101111 @atom_st
1038 amoand_h 01100 . . ..... ..... 001 ..... 0101111 @atom_st
1039 amoor_h 01000 . . ..... ..... 001 ..... 0101111 @atom_st
1040 amomin_h 10000 . . ..... ..... 001 ..... 0101111 @atom_st
1041 amomax_h 10100 . . ..... ..... 001 ..... 0101111 @atom_st
1042 amominu_h 11000 . . ..... ..... 001 ..... 0101111 @atom_st
1043 amomaxu_h 11100 . . ..... ..... 001 ..... 0101111 @atom_st
1044 amocas_b 00101 . . ..... ..... 000 ..... 0101111 @atom_st
1045 amocas_h 00101 . . ..... ..... 001 ..... 0101111 @atom_st